1. General description
The 74LVC16240A is a high-performance, low power, low voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families. Inputs can be driven from
either 3.3 Vor 5 V devices. In 3-state operation, outputs can handle 5 V. These features
allow the use of these devices as a mixed 3.3 Vand 5 V environment.
The 74LVC16240A is a 16-bit inverting buffer/line driver with 3-state outputs. The device
can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device features
four output enables (1OE, 2OE, 3OE and 4OE), each controlling four of the 3-state
outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry
disables the output, preventing the damaging backflow current through the device when it
is powered down.
The 74LVC16240A is identical to the 74LVC16244A but has inverting outputs.
2. Features
■5 V tolerant inputs/outputs for interfacing with 5 V logic
■Wide supply voltage range from 1.2 V to 3.6 V
■CMOS low power consumption
■MULTIBYTE flow-through standard pin-out architecture
■Low inductance multiple power and ground pins for minimum noise and ground
bounce
■Direct interface with TTL levels
■Complies with JEDEC standard no. 8-1 A
■ESD protection:
◆HBM EIA/JESD22-A114-A exceeds 2000 V
◆MM EIA/JESD22-A115-A exceeds 200 V.
■Specified from −40 °Cto+85°C and from −40 °C to +125 °C.
74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs;
inverting; 3-state
Rev. 03 — 5 March 2004 Product data sheet
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Product data sheet Rev. 03 — 5 March 2004 2 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
3. Quick reference data
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD=C
PD ×VCC2×fi×N+Σ(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = total load switching outputs;
Σ(CL×VCC2×fo) = sum of the outputs.
[2] The condition is VI= GND to VCC.
4. Ordering information
Table 1: Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
tPHL, tPLH propagation delay
nAn to nYn CL=50pF;
VCC = 3.3 V 1.0 2.8 4.2 ns
tPZH, tPZL 3-state output enable
time nOE to nYn CL=50pF;
VCC = 3.3 V 1.0 3.5 5.0 ns
tPHZ, tPLZ 3-state output disable
time nOE to nYn CL=50pF;
VCC = 3.3 V 1.5 3.9 4.9 ns
CIinput capacitance - 5.0 - pF
CPD power dissipation
capacitance per gate VCC = 3.3 V [1] [2]
outputs enabled - 12 - pF
outputs disabled - 4.0 - pF
Table 2: Ordering information
Type number Package
Temperature range Name Description Version
74LVC16240ADGG −40 °C to +125 °C TSSOP48 plastic thin shrink small outline package;
48 leads; body width 6.1 mm SOT362-1
74LVC16240ADL −40 °C to +125 °C SSOP48 plastic shrink small outline package; 48 leads;
body width 7.5 mm SOT370-1
9397 750 12871 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 5 March 2004 3 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
5. Functional diagram
Fig 1. Logic symbol.
1A3
1A2
1A1
1A0 1Y0
1Y1
1Y2
1Y3
1OE
2OE
47
46
44
43
1
2
3
5
6
2A3
2A2
2A1
2A0 2Y0
2Y1
2Y2
2Y3
41
40
38
37
48
8
9
11
12
3A3
3A2
3A1
3A0 3Y0
3Y1
3Y2
3Y3
3OE
36
35
33
32
25
13
14
16
17
4A3
4A2
4A1
4A0 4Y0
4Y1
4Y2
4Y3
4OE
30
29
27
26
24
19
20
22
23
001aaa439
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Product data sheet Rev. 03 — 5 March 2004 4 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
Fig 2. IEC logic symbol.
23
001aaa442
37 12
11
9
8
6
5
47
46
44
43
41
40
38
2A3
1A0
1A1
1A2
1A3
2A0
2A1
2A2
2
3
2Y3
2Y2
2Y1
2Y0
1Y3
1Y2
1Y0
1Y1
26
22
20
19
17
16
36
35
33
32
30
29
27
4A3
3A0
3A1
3A2
3A3
4A0
4A1
4A2
13
14
4Y3
4Y2
4Y1
4Y0
3Y3
3Y2
3Y0
3Y1
24
4OE 4EN
25
3OE 3EN
1OE 11EN
2OE 48 2EN
11
31
21
41
9397 750 12871 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 5 March 2004 5 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
6. Pinning information
6.1 Pinning
6.2 Pin description
Fig 3. Pin configuration SSOP48 and TSSOP48.
16240
1OE 2OE
1Y0 1A0
1Y1 1A1
GND GND
1Y2 1A2
1Y3 1A3
VCC VCC
2Y0 2A0
2Y1 2A1
GND GND
2Y2 2A2
2Y3 2A3
3Y0 3A0
3Y1 3A1
GND GND
3Y2 3A2
3Y3 3A3
VCC VCC
4Y0 4A0
4Y1 4A1
GND GND
4Y2 4A2
4Y3 4A3
4OE 3OE
001aaa440
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Table 3: Pin description
Pin Symbol Description
11
OE output enable input (active LOW)
2 1Y0 data output
3 1Y1 data output
4, 10, 15, 21, 28, 34, 39, 45 GND ground (0 V)
5 1Y2 data output
6 1Y3 data output
7, 18, 31, 42 VCC supply voltage
8 2Y0 data output
9 2Y1 data output
11 2Y2 data output
12 2Y3 data output
9397 750 12871 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 5 March 2004 6 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
7. Functional description
7.1 Function table
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
13 3Y0 data output
14 3Y1 data output
16 3Y2 data output
17 3Y3 data output
19 4Y0 data output
20 4Y1 data output
22 4Y2 data output
23 4Y3 data output
24 4OE output enable input (active LOW)
25 3OE output enable input (active LOW)
26 4A3 data input
27 4A2 data input
29 4A1 data input
30 4A0 data input
32 3A3 data input
33 3A2 data input
35 3A1 data input
36 3A0 data input
37 2A3 data input
38 2A2 data input
40 2A1 data input
41 2A0 data input
43 1A3 data input
44 1A2 data input
46 1A1 data input
47 1A0 data input
48 2OE output enable input (active LOW)
Table 3: Pin description
…continued
Pin Symbol Description
Table 4: Function table [1]
Input Output
nOE nAn nYn
LLH
LHL
HXZ
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Product data sheet Rev. 03 — 5 March 2004 7 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Above 60 °C the value of Ptot derates linearly with 5.5 mW/K.
9. Recommended operating conditions
10. Static characteristics
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage −0.5 +6.5 V
IIK input diode current VI<0V - −50 mA
VIinput voltage [1] −0.5 +6.5 V
IOK output diode current VO>V
CC or VO<0V - ±50 mA
VOoutput voltage output HIGH or LOW state [1] −0.5 VCC + 0.5 V
output 3-state [1] −0.5 +6.5 V
IOoutput source or sink
current VO= 0 V to VCC -±50 mA
ICC,I
GND VCC or GND current - ±100 mA
Tstg storage temperature −65 +150 °C
Ptot power dissipation Tamb =−40 °C to +125 °C[2] - 500 mW
Table 6: Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage for maximum speed
performance 2.7 - 3.6 V
for low-voltage applications 1.2 - 3.6 V
VIinput voltage 0 - 5.5 V
VOoutput voltage output HIGH or LOW state 0 - VCC V
output 3-state 0 - 5.5 V
Tamb operating ambient
temperature in free air −40 - +125 °C
tr, tfinput rise and fall
times VCC = 1.2 V to 2.7 V - - 20 ns/V
VCC = 2.7 V to 3.6 V - - 10 ns/V
Table 7: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
Tamb =−40 °C to +85 °C[1]
VIH HIGH-level input
voltage VCC = 1.2 V VCC -- V
VCC = 2.7 V to 3.6 V 2.0 - - V
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Product data sheet Rev. 03 — 5 March 2004 8 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
VIL LOW-level input voltage VCC = 1.2 V - - GND V
VCC = 2.7 V to 3.6 V - - 0.8 V
VOH HIGH-level output
voltage VI=V
IH or VIL
IO=−100 µA; VCC = 2.7 V to 3.6 V VCC −0.2 VCC -V
IO=−12 mA; VCC = 2.7 V VCC −0.5 - - V
IO=−18 mA; VCC = 3.0 V VCC −0.6 - - V
IO=−24 mA; VCC = 3.0 V VCC −0.8 - - V
VOL LOW-level output
voltage VI=V
IH or VIL
IO= 100 µA; VCC = 2.7 V to 3.6 V - 0 0.20 V
IO= 12 mA; VCC = 2.7 V - - 0.40 V
IO= 24 mA; VCC = 3.0 V - - 0.55 V
ILI input leakage current VI= 5.5 Vor GND; VCC = 3.6 V - ±0.1 ±5µA
IOZ 3-state output
OFF-state current VI=V
IH or VIL; VO= 5.5 Vor GND;
VCC = 3.6 V - 0.1 ±5µA
Ioff power-off leakage
supply current VIor VO= 5.5 V; VCC = 0.0 V - 0.1 ±10 µA
ICC quiescent supply
current VI=V
CC or GND; IO=0A;
VCC = 3.6 V - 0.1 20 µA
∆ICC additional quiescent
supplycurrent per input
pin
VI=V
CC −0.6 V; IO=0A;
VCC = 2.7 V to 3.6 V - 5 500 µA
CIinput capacitance - 5.0 - pF
Tamb =−40 °C to +125 °C
VIH HIGH-level input
voltage VCC = 1.2 V VCC -- V
VCC = 2.7 V to 3.6 V 2.0 - - V
VIL LOW-level input voltage VCC = 1.2 V - - GND V
VCC = 2.7 V to 3.6 V - - 0.8 V
VOH HIGH-level output
voltage VI=V
IH or VIL
IO=−100 µA; VCC = 2.7 V to 3.6 V VCC −0.3 - - V
IO=−12 mA; VCC = 2.7 V VCC −0.65 - - V
IO=−18 mA; VCC = 3.0 V VCC −0.75 - - V
IO=−24 mA; VCC = 3.0 V VCC −1.0 - - V
VOL LOW-level output
voltage VI=V
IH or VIL
IO= 100 µA; VCC = 2.7 V to 3.6 V - - 0.3 V
IO= 12 mA; VCC = 2.7 V - - 0.6 V
IO= 24 mA; VCC = 3.0 V - - 0.8 V
ILI input leakage current VI= 5.5 Vor GND; VCC = 3.6 V - - ±20 µA
IOZ 3-state output
OFF-state current VI=V
IH or VIL; VO= 5.5 Vor GND;
VCC = 3.6 V --±20 µA
Table 7: Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
9397 750 12871 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 5 March 2004 9 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
[1] All typical values are measured at VCC = 3.3 V and Tamb =25°C.
11. Dynamic characteristics
Ioff power-off leakage
supply current VIor VO= 5.5 V; VCC = 0.0 V - - ±20 µA
ICC quiescent supply
current VI=V
CC or GND; IO=0A;
VCC = 3.6 V --80µA
∆ICC additional quiescent
supplycurrent per input
pin
VI=V
CC −0.6 V; IO=0A;
VCC = 2.7 V to 3.6 V - - 5000 µA
Table 7: Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
Table 8: Dynamic characteristics
GND = 0 V; t
r
= t
f
≤
2.5 ns; C
L
= 50 pF; R
L
= 500
Ω
; see Figure 6.
Symbol Parameter Conditions Min Typ Max Unit
Tamb =−40 °Cto+85°C[1]
tPHL, tPLH propagation delay
nAn to nYn see Figure 4
VCC = 1.2 V - 12.0 - ns
VCC = 2.7 V 1.0 - 5.2 ns
VCC = 3.0 V to 3.6 V [2] 1.0 2.8 4.2 ns
tPZH, tPZL 3-state output enable
time nOE to nYn see Figure 5
VCC = 1.2 V - 18.0 - ns
VCC = 2.7 V 1.5 - 5.8 ns
VCC = 3.0 V to 3.6 V [2] 1.0 3.5 5.0 ns
tPHZ, tPLZ 3-state output disable
time nOE to nYn see Figure 5
VCC = 1.2 V - 11.0 - ns
VCC = 2.7 V 1.5 - 5.1 ns
VCC = 3.0 V to 3.6 V [2] 1.5 3.9 4.9 ns
tsk(0) skew VCC = 3.0 V to 3.6 V [3] - - 1.0 ns
CPD power dissipation
capacitance per gate VCC = 3.3 V [4] [5]
outputs enabled - 12 - pF
outputs disabled - 4.0 - pF
Tamb =−40 °C to +125 °C
tPHL, tPLH propagation delay
nAn to nYn see Figure 4
VCC = 1.2 V - - - ns
VCC = 2.7 V 1.0 - 6.5 ns
VCC = 3.0 V to 3.6 V 1.0 - 5.5 ns
tPZH, tPZL 3-state output enable
time nOE to nYn see Figure 5
VCC = 1.2 V - - - ns
VCC = 2.7 V 1.5 - 7.5 ns
VCC = 3.0 V to 3.6 V 1.0 - 6.5 ns
9397 750 12871 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 5 March 2004 10 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
[1] All typical values are measured at Tamb =25°C.
[2] These typical values are measured at VCC = 3.3 V.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PD in µW).
PD=C
PD ×VCC2×fi×N+Σ(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = total load switching outputs;
Σ(CL×VCC2×fo) = sum of the outputs.
[5] The condition is VI= GND to VCC.
12. Waveforms
tPHZ, tPLZ 3-state output disable
time nOE to nYn see Figure 5
VCC = 1.2 V - - - ns
VCC = 2.7 V 1.5 - 6.5 ns
VCC = 3.0 V to 3.6 V 1.5 - 6.5 ns
tsk(0) skew VCC = 3.0 V to 3.6 V [3] - - 1.5 ns
Table 8: Dynamic characteristics
…continued
GND = 0 V; t
r
= t
f
≤
2.5 ns; C
L
= 50 pF; R
L
= 500
Ω
; see Figure 6.
Symbol Parameter Conditions Min Typ Max Unit
Measurement points are given in Table 9.
VOL and VOH are typical output voltage drop that occur with the output load.
Fig 4. The input nAn to output nYn propagation delays.
Table 9: Measurement points
Supply voltage Input Output
VCC VMVM
1.2 V 0.5 ×VCC 0.5 ×VCC
2.7 V 1.5 V 1.5 V
3.0 V to 3.6 V 1.5 V 1.5 V
mgu7
81
nAn input
nYn output
tPHL tPLH
GND
VI
VMVM
VMVM
VOH
VOL
9397 750 12871 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 5 March 2004 11 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
Measurement points are given in Table 10.
VOL and VOH are typical output voltage drop that occur with the output load.
Fig 5. 3-state enable and disable times.
Table 10: Measurement points
Supply voltage Input Output
VCC VMVMVXVY
1.2 V 0.5 ×VCC 0.5 ×VCC VOL + 0.1 V VOH −0.1 V
2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH −0.3 V
3.0 V to 3.6 V 1.5 V 1.5 V VOL + 0.3 V VOH −0.3 V
mna362
tPLZ
tPHZ
outputs
disabled outputs
enabled
VY
VX
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
nOE input
VI
VOL
VOH
VCC
VM
GND
GND
tPZL
tPZH
VM
VM
9397 750 12871 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 5 March 2004 12 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
[1] The circuit performs better when RL= 1000 Ω.
Test data is given in Table 11.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
VEXT = Test voltage for switching times.
Fig 6. Load circuitry for switching times.
Table 11: Test data
Supply voltage Input Load VEXT
VCC VItr, tfCLRLtPLH, tPHL tPZH, tPHZ tPZL, tPLZ
1.2 V VCC ≤2.5 ns 50 pF 500 Ω[1] open GND 2 ×VCC
2.7 V 2.7 V ≤2.5 ns 50 pF 500 Ωopen GND 2 ×VCC
3.0 V to 3.6 V 2.7 V ≤2.5 ns 50 pF 500 Ωopen GND 2 ×VCC
VEXT
VCC
VIVO
mna616
D.U.T.
CL
RT
RL
RL
PULSE
GENERATOR
9397 750 12871 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 5 March 2004 13 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
13. Package outline
Fig 7. Package outline TSSOP48.
UNIT A1A2A3bpcD
(1) E(2) eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.2
0.1 8
0
o
o
0.1
DIMENSIONS (mm are the original dimensions).
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
SOT362-1 99-12-27
03-02-19
wM
θ
A
A1
A2
D
Lp
Q
detail X
E
Z
e
c
L
X
(A )
3
0.25
124
48 25
y
pin 1 index
b
H
1.05
0.85 0.28
0.17 0.2
0.1 12.6
12.4 6.2
6.0 0.5 1 0.25
8.3
7.9 0.50
0.35 0.8
0.4
0.08
0.8
0.4
p
EvMA
A
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1
A
max.
1.2
0
2.5
5 mm
scale
MO-153
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Product data sheet Rev. 03 — 5 March 2004 14 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
Fig 8. Package outline SSOP48.
UNIT A1A2A3bpcD
(1) E(1) eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.4
0.2 2.35
2.20 0.25 0.3
0.2 0.22
0.13 16.00
15.75 7.6
7.4 0.635 1.4 0.25
10.4
10.1 1.0
0.6 1.2
1.0 0.85
0.40 8
0
o
o
0.18 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT370-1 99-12-27
03-02-19
(1)
wM
bp
D
HE
E
Z
e
c
vMA
X
A
y
48 25
MO-118
24
1
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
pin 1 index
0 5 10 mm
scale
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1
A
max.
2.8
9397 750 12871 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 5 March 2004 15 of 17
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
14. Revision history
Table 12: Revision history
Document ID Release date Data sheet status Change
notice Order number Supersedes
74LVC16240A_3 20040305 Product data - 9397 750 12871 74LVC16240A_2
Modifications: •The format of this data sheet has been redesigned to comply with the current presentation
and information standard of Philips Semiconductors.
•Table 7: added values for Tamb =−40 °C to +125 °C
•Table 8: added values for Tamb =−40 °C to +125 °C
74LVC16240A_2 19970729 Product data - 9397 750 04526 74LVC16240A_1
74LVC16240A_1 19951226 Product data - - -
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
9397 750 12871 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 5 March 2004 16 of 17
15. Data sheet status
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
16. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
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Level Data sheet status[1] Product status[2] [3] Definition
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Semiconductors reserves the right to change the specification in any manner without notice.
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© Koninklijke Philips Electronics N.V. 2004
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
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consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights. Date of release: 5 March 2004
Document order number: 9397 750 12871
Published in The Netherlands
Philips Semiconductors 74LVC16240A
16-bit buffer/line driver with 5 V tolerant inputs/outputs
19. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 5
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Functional description . . . . . . . . . . . . . . . . . . . 6
7.1 Function table. . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7
9 Recommended operating conditions. . . . . . . . 7
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15
15 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 16
16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
17 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
18 Contact information . . . . . . . . . . . . . . . . . . . . 16
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The 74LVC16240A is a high-performance, low power, low voltage, Si-gate CMOS device, superior to most advanced CMOS compatible
TTL families. Inputs can be driven from either 3.3 V or 5 V devices. In 3-state operation, outputs can handle 5 V. These features allow the use of these devices as a mixed 3.3 V and 5 V
environment.
The 74LVC16240A is a 16-bit inverting buffer/line driver with 3-state outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device features four
output enables (1OE, 2OE, 3OE and 4OE), each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
This device is fully specified for partial power-down applications using Ioff . The Ioff circuitry disables the output, preventing the damaging backflow current through the device when it is
powered down.
The 74LVC16240A is identical to the 74LVC16244A but has inverting outputs.
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
MULTIBYTE flow-through standard pin-out architecture
Low inductance multiple power and ground pins for minimum noise and ground bounce
Direct interface with TTL levels
Complies with JEDEC standard no. 8-1 A
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2 000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Specified from -40 Cel to +85Cel and from -40 Cel to +125 Cel.
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Datasheet
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Download all documentation
(Product Specification)
v.3, 05-Mar-04, 17 Pages,
92kB
16-bit buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-
state
All information hereunder is subject to the subsequent disclaimers
General description
Features
Products/packages
Quality/reliability/chemical
content
Pricing/ordering/availability
Samples
Discontinued information
Applications
Block diagrams/pinning
Design support
Parametrics/similar products
Print/email
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See also
Preview Product information Selection guide
74LVC16240A
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Products ... Buffers/drivers Buffers/drivers: others 74LVC16240ADGG
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The variants in the table below are discontinued. See the table Discontinued information for more information.
The variants in the table below are discontinued. See the table Discontinued information for more information.
Quality and reliability disclaimer
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Products/
p
acka
g
es Hide
Type number Orderable part number Ordering code (12NC) Product status Package Packing Marking ECCN
74LVC16240ADGG 74LVC16240ADGG,112 9352 351 10112 Volume production SOT362-1
(TSSOP48) Tube Standard Marking
74LVC16240ADGG 74LVC16240ADGG,118 9352 351 10118 Volume production SOT362-1
(TSSOP48) Reel Pack, SMD, 13" Standard Marking
74LVC16240ADL 74LVC16240ADL,112 9352 351 00112 Volume production SOT370-1
(SSOP48) Tube Standard Marking
74LVC16240ADL 74LVC16240ADL,118 9352 351 00118 Volume production SOT370-1
(SSOP48) Tape reel smd Standard Marking
Type number Orderable part number Ordering code (12NC) Product status Package Packing Marking ECCN
74LVC16240ADGG 74LVC16240ADGG,512 9352 351 10512 Withdrawn
Replacement product
SOT362-1
(TSSOP48) Tube Dry Pack Standard Marking
74LVC16240ADGG 74LVC16240ADGG,518 9352 351 10518 Withdrawn
Replacement product
SOT362-1
(TSSOP48) Reel Dry Pack, SMD, 13" Standard Marking
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Qualit
y
/reliabilit
y
/chemical content Hide
Type number Orderable part number Chemical content RoHS Leadfree conversion date RHF IFR (FIT) MTBF (hours) MSL Lead-free
74LVC16240ADGG 74LVC16240ADGG,112 74LVC16240ADGG Always Pb-free 3,87 2,58E+08 1
74LVC16240ADGG 74LVC16240ADGG,118 74LVC16240ADGG Always Pb-free 3,87 2,58E+08 1
74LVC16240ADL 74LVC16240ADL,112 74LVC16240ADL week 13, 2005 3,87 2,58E+08 1
74LVC16240ADL 74LVC16240ADL,118 74LVC16240ADL week 13, 2005 3,87 2,58E+08 1
Type number Orderable part number Chemical content RoHS Leadfree conversion date RHF IFR (FIT) MTBF (hours) MSL Lead-free
74LVC16240ADGG 74LVC16240ADGG,512 74LVC16240ADGG week 14, 2005 3,87 2,58E+08 1
74LVC16240ADGG 74LVC16240ADGG,518 74LVC16240ADGG week 14, 2005 3,87 2,58E+08 1
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Pricin
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Type number Ordering code
(12NC)
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price/unit($)
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stock
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quantity
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date
Buy
online
Samples
74LVC16240ADGG 9352 351 10112 74LVC16240ADGG,112 JAPAN CHIP ONE
STOP no 03/19/2010 Buy
online not available
Pa
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-2010http://www.nxp.com
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Related applications
Intelligent washing machine
Transceiver board
Main CPU board
Application Notes
Interfacing 3 Volt and 5 Volt Applications (1995-09-15)
Power considerations when using CMOS and BiCMOS logic devices (2002-02-05)
74LVC16240ADGG 9352 351 10118 74LVC16240ADGG,118 JAPAN CHIP ONE
STOP no 03/19/2010 Buy
online
Order
samples
74LVC16240ADL 9352 351 00112 74LVC16240ADL,112 0.8900 JAPAN CHIP ONE
STOP no 03/19/2010 Buy
online not available
74LVC16240ADL 9352 351 00118 74LVC16240ADL,118 0.8900 JAPAN CHIP ONE
STOP no 03/19/2010 Buy
online
Order
samples
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Discontinued information Hide
Type number Ordering code (12NC) Last-time buy date Last-time delivery date Replacement product DN Notice Status Comments
74LVC16240ADGG 935235110512 DN
74LVC16240ADGG 935235110518 DN
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-2010http://www.nxp.com
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Similar products
74LVC16240A links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products
page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category.
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General product disclaimer
Quality and reliability disclaimer
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roducts Hide
Type number Package Description Propagation
Delay(ns)
Voltage No. of
Pins
Power Dissipation
Considerations
Logic Switching
Levels
Output Drive
Capability
74LVC16240ADGG SOT362-1
(TSSOP48)
3.3V 16-Bit Buffer/Line Driver;
Inverting (3-State) 2.7@3.3V 1.2-3.6 48 Low Power or Battery
Applications TTL +/- 24 mA
74LVC16240ADL SOT370-1
(SSOP48)
3.3V 16-Bit Buffer/Line Driver;
Inverting (3-State) 2.7@3.3V 1.2-3.6 48 Low Power or Battery
Applications TTL +/- 24 mA
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