MB88151PNF-G-200-JNE1 - Fujitsu Limited

DS04-29116-2E

FUJITSU SEMICONDUCTOR

DATA SHEET

Spread Spectrum Clock Generator

MB88151

■DESCRIPTION

MB88151 is a clock generator for EMI (Electro Magnetic Interf erence) reduction. The peak of unnecessary radi-

ation noise (EMI) can be attenuated by making the oscillation frequency slightly modulate per iodically with the

inter nal modulator. It corresponds to both of the center spread which modulates frequency in modulation off as

Middle Centered and down spread which modulates so as not to exceed frequency in modulation off.

■FEATURES

• Input frequency : 16.6 MHz to 33.4 MHz

• Multiplication rate : 1/2, 1, 2, 4

• Output frequency : 8.3 MHz to 16.7 MHz, 16.6 MHz to 33.4 MHz, 33.3 MHz to 66.7 MHz, 66.6 MHz to 133.4 MHz

• Modulation rate : ± 0.5%, ± 1.5% (Center spread), − 1.0%, − 3.0% (Down spread)

• Equipped with oscillation circuit : Range of oscillation 16.6 MHz to 33.4 MHz

• Modulation clock output Duty : 40% to 60%(Continued)

■PACKAGE

8-pin plastic SOP

(FPT-8P-M02)

MB88151

(Continued)

• Modulation clock

Cycle-Cycle Jitter

MB88151-100, 200 : Less than 100 ps

MB88151-400 : Less than 150 ps

MB88151-500 : Less than 200 ps

• Low current consumption by CMOS process : 5 mA (24 MHz : Typ-sample, no load)

• Power supply voltage : 3.3 V ± 0.3 V

• Operating temperature : − 40 °C to + 85 °C

• Package : SOP 8-pin

■PRODUCT LINEUP

MB88151 has four kinds of multiplication type.

■PIN ASSIGNMENT

■PIN DESCRIPTION

Product Input frequency range Multiplier ratio Output frequency range

MB88151-100

16.6 MHz to 33.4 MHz

Multiplied by 1 16.6 MHz to 33.4 MHz

MB88151-200 Multiplied by 2 33.3 MHz to 66.7 MHz

MB88151-400 Multiplied by 4 66.6 MHz to 133.4 MHz

MB88151-500 Multiplied by 1/2 8.3 MHz to 16.7 MHz

Pin name I/O Pin no. Description

XIN I 1 Resonator connection pin/clock input pin

VSS ⎯2 GND pin

SEL0 I 3 Modulation rate setting pin

SEL1 I 4 Modulation rate setting pin

CKOUT O 5 Modulated clock output pin

ENS I 6 Modulation enable setting pin (with pull-up resistance)

VDD ⎯7 Power supply voltage pin

XOUT O 8 Resonator connection pin

XIN

EL0

EL1

XOUT

ENS

CKOU

MB88151

TOP VIEW

FPT-8P-M02

MB88151

■I/O CIRCUIT TYPE

Note : For XIN and XOUT pins, see “■OSCILLATION CIRCUIT”.

Pin Circuit type Remarks

SEL0

SEL1

• CMOS hysteresis input

ENS

• CMOS hysteresis input with pull-up

resistor 50 kΩ (Typ)

CKOUT

• CMOS output

•I

OL = 4 mA

50 kΩ

MB88151

■HANDLING DEVICES

Preventing Latchup

A latchup can occur if, on this device, (a) a voltage higher than VDD or a voltage lower than VSS is applied to an

input or output pin or (b) a voltage higher than the rating is applied between VDD and VSS. The latchup, if it occurs,

significantly increases the powe r supply current and may cause thermal destruction of an element. When you

use this device, be very careful not to exceed the maximum rating.

Handling unused pins

Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or

pull-down resistor.

Unused output pin should be opened.

The attention when the external clock is used

Input the clock to XIN pin, and XOUT pin should be opened when you use the external clock.

Please pay attention so that an overshoot and an undershoot do not occur to an input clock of XIN pin.

Power supply pins

Please design connecting the pow er supply pin of this de vice by as lo w impedance as possib le from the current

supply source.

We recommend connecting electrolytic capacitor (about 10 µF) and the ceramic capacitor (about 0.01 µF) in

parallel between VSS and VDD near the device, as a bypass capacitor.

Oscillation circuit

Noise near the XIN and XOUT pins may cause the device to malfunction. Design printed circuit boards so that

electric wiring of XIN or XOUT pin and the resonator do not intersect other wiring.

Design the printed circuit board that surrounds the XIN and XOUT pins with ground.

MB88151

■BLOCK DIAGRAM

CKOU

= 1 MΩ

SEL1

XOUT

XIN

SEL0

ENS

−

IDAC ICO

Clock output

Modulation rate

setting

Modulation rate

setting

Modulation enable setting

Reference clock

PLL block

Reference clock

Phase

compare V/I

conversion

Modulation logic Modulation

rate setting/

Modulation

enable setting

Loop filter

Modulation clock

output

MB88151 PLL block

Charge

pump

A glitchless IDAC (current output D/A converter) provides precise modulation,

thereby dramatically reducing EMI.

MB88151

■PIN SETTING

When changing the pin setting, the stabilization wait time for the modulation clock is required. The stabilization

wait time for the modulation clock take the maximum value of “■ ELECTRICAL CHARACTERISTICS • AC

characteristics Lock-Up time”.

ENS modulation enable setting

Note : Spectrum does not spread when “L” is set to ENS. The clock with low jitter can be obtained. Because of

ENS has Pull-up resistance, spectrum spread when “H” is set to it or open the ter m inal.

SEL0, SEL1 Modulation rate setting

Note : The modulation rate can be changed at the level of the terminal.

• Center spread

Spectrum is spread (modulated) by centering on the frequency in modulation off.

ENS Modulation

L No modulation

H Modulation

SEL1 SEL0 Modulation rate Modulation type

LL ± 1.5%Center spread

LH ± 0.5%Center spread

HL − 1.0%Down spread

HH − 3.0%Down spread

−1.5% +1.5%

Radiation level

Frequency

Frequency in modulation off

Center spread example of ± 1.5% modulation rate

Modulation width 3.0%

MB88151

• Down spread

Spectrum is spread (modulated) below the frequency in modulation off.

−3.0%

Frequency in modulation off

Frequency

Radiation level

Down spread example of − 3.0% modulation rate

Modulation width 3.0%

MB88151

■ABSOLUTE MAXIMUM RATINGS

* : The parameter is based on VSS = 0.0 V.

WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,

temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

Parameter Symbol Rating Unit

Min Max

Power supply voltage* VDD − 0.5 + 4.0 V

Input voltage* VIVSS − 0.5 VDD + 0.5 V

Output voltage* VOVSS − 0.5 VDD + 0.5 V

Storage temperature TST − 55 + 125 °C

Operation junction temperature TJ − 40 + 125 °C

Output current IO − 14 + 14 mA

Overshoot VIOVER ⎯VDD + 1.0 (tOVER ≤ 50 ns) V

Undershoot VIUNDER VSS−1.0 (tUNDER ≤ 50 ns) ⎯V

nput pin

Overshoot/Undershoot

tUNDER ≤ 50 ns

tOVER ≤ 50 ns

VIOVER ≤ VDD + 1.0 V

VIUNDER ≤ VSS − 1.0 V

MB88151

■RECOMMENDED OPERATING CONDITIONS (VSS = 0.0 V)

WARNING: The recommended operating conditions are required in order to ensure the normal operation of the

semiconductor device. All of the device’s electrical characteristics are warranted when the device is

operated within these ranges.

Always use semiconductor devices within their recommended operating condition ranges. Operation

outside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented on

the data sheet. Users considering application outside the listed conditions are advised to contact their

FUJITSU representatives beforehand.

Parameter Symbol Pin Conditions Value Unit

Min Typ Max

Power supply voltage VDD VDD ⎯3.0 3.3 3.6 V

“H” level input voltage VIH XIN,

SEL0,

SEL1,

ENS

⎯VDD × 0.80 ⎯VDD + 0.3 V

“L” level input voltage VIL ⎯VSS ⎯VDD × 0.20 V

Input clock

duty cycle tDCI XIN 16.6 MHz to

33.4 MHz 40 50 60 %

Operating temperature Ta ⎯⎯ − 40 ⎯ + 85 °C

CKIN

1.5 V

Input clock duty cycle (tDCI = tb/ta)

MB88151

■ELECTRICAL CHARACTERISTICS

• DC Characteristics (Ta = − 40 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V)

Parameter Symbol Pin Conditions Value Unit

Min Typ Max

Power supply current ICC VDD No load capacitance at

output 24 MHz

MB88151-100 ⎯5.0 7.0 mA

Output voltage VOH CKOUT

“H” level output,

IOH = − 4 mA VDD − 0.5 ⎯VDD V

VOL “L” level output,

IOL = 4 mA VSS ⎯0.4 V

Output impedance ZOCKOUT 8.3 MHz to 133.4 MHz ⎯45 ⎯Ω

Input capacitance CIN

XIN,

SEL0,

SEL1,

ENS

Ta = + 25 °C,

VDD = VI = 0.0 V,

f = 1 MHz ⎯⎯16 pF

Load capacitance CLCKOUT

8.3 MHz to 66.7 MHz ⎯⎯15

pF66.7 MHz to 100 MHz ⎯⎯10

100 MHz to 133.4 MHz ⎯⎯ 7

Input pull-up resistance RPU ENS VIL = 0.0 V 25 50 200 kΩ

MB88151

• AC Characteristics (Ta = − 40 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V)

Note : The modulation clock stabilization wait time is required after the power is turned on, the IC recovers from

power saving, or after FREQ (frequency range) or ENS (modulation ON/OFF) setting is changed. For the

modulation clock stabilization wait time, assign the maximum value for lock-up time.

Parameter Symbol Pin Conditions Value Unit

Min Typ Max

Oscillation frequency fxXIN,

XOUT Fundamental

oscillation 16.6 ⎯33.4 MHz

Input frequency fin XIN External clock input 16.6 ⎯33.4 MHz

Output frequency fOUT CKOUT

MB88151-100

(Multiply by 1) 16.6 ⎯33.4

MHz

MB88151-200

(Multiply by 2) 33.3 ⎯66.7

MB88151-400

(Multiply by 4) 66.6 ⎯133.4

MB88151-500

(2-frequency division) 8.3 ⎯16.7

Output slew rate SR CKOUT 0.4 V to 2.4 V

Load capacitance 15 pF 0.4 ⎯4.0 V/ns

Output clock duty cycle tDCC CKOUT 1.5 V 4 0 ⎯60 %

Modulation frequency fMOD CKOUT ⎯⎯12.5 ⎯kHz

Lock-Up time tLK CKOUT ⎯⎯25ms

Cycle-cycle jitter tJC CKOUT

MB88151-100, 200

No load capacitance,

Ta = + 25 °C,

VDD = 3.3 V,

Standard deviation σ

⎯⎯100

MB88151-400

No load capacitance,

Ta = + 25 °C,

VDD = 3.3 V,

Standard deviation σ

⎯⎯150

MB88151-500

No load capacitance,

Ta = + 25 °C,

VDD = 3.3 V,

Standard deviation σ

⎯⎯200

MB88151

■OUTPUT CLOCK DUTY CYCLE (tDCC = tb/ta)

■INPUT FREQUENCY (fin = 1/tin)

■OUTPUT SLEW RATE (SR)

■CYCLE-CYCLE JITTER (tJC = | tn − tn+1 |)

CKOUT

1.5 V

0.8 V

CKIN

2.4 V

0.4 V

tftr

KOUT

Note : SR = (2.4 − 0.4) /tr, SR = (2.4 − 0.4) /tf

tn+1tn

CKOUT

Note : Cycle-cycle jitter is defined the difference between a certain cycle and immediately after

(or, immediately before) .

MB88151

■MODULATION WAVEFORM

fMOD = 12.5 kHz (Typ)

− 1.5 %

+ 1.5 %

fMOD = 12.5 kHz (Typ)

− 1.0 %

− 0.5 %

• ±1.5% modulation rate, Example of center spread

• −1.0% modulation rate, Example of down spread

CKOUT

output frequency

CKOUT

output frequency

Frequency at modulation OFF

Time

MB88151

■LOCK-UP TIME

If the setting pin is fixed at the “H” or “L” level, the maximum time after the power is turned on until the set clock

signal is output from CKOUT pin is (the stabilization wait time of input clock to XIN pin) + (the lock-up time “tLK”).

For the input clock stabilization time, check the characteristics of the resonator or oscillator used.

For modulation enable control using the ENS pin during normal operation, the set clock signal is output from

CKOUT pin at most the lock-up time (tLK) after the level at the ENS pin is determined.

Note : When the pin setting is changed, the CKOUT pin output clock stabilization time is required. Until the output

clock signal becomes stable, the output frequency, output clock duty cycle, modulation period, and cycle-

cycle jitter cannot be guaranteed. It is theref ore advisab le to perf orm processing such as cancelling a reset

of the device at the succeeding stage after the lock-up time.

3.0 V

VDD

XIN

VIH

CKOUT

Setting pin

SEL0,

SEL1,

ENS

Internal clock

stabilization wait tim

tLK

(lock-up time )

XIN

ENS

CKOUT

tLK

(lock-up time ) tLK

(lock-up time )

MB88151

■OSCILLATION CIRCUIT

The figure below sho ws the connection example about general resonator. The oscillation circuit has the built-in

resistance (1 MΩ) . The value of capacity (C1 and C2) is required adjusting to the most suitable value of individual

resonator.

The most suitable value is different by individual resonator. Please refer to the resonator manufacturer which

you use for the most suitable value.

Input the clock to XIN pin, and do not connect an ything with XOUT pin if you use the e xternal clock (y ou do not

use the resonator).

Rf (1 MΩ)

XIN Pin

LSI Internal

LSI External

XOUT Pin

• When using the resonator

• When using an external clock

OPEN

Rf (1 MΩ)

Note : Note that a jitter characteristic of an input clock may cause an affect a cycle-cycle jitter

characteristic.

LSI Internal

LSI External

XOUT Pin

XIN Pin

External clock

MB88151

■INTERCONNECTION CIRCUIT EXAMPLE

MB88151

C1C2

C4C3

SEL0

SEL1

Xtal

ENS

C1, C2 : Oscillation stabilization capacitance (see “■OSCILLATION CIRCUIT”.)

C3 : Capacitor of 10 µF or higher

C4 : Capacitor about 0.01 µF (connect a capacitor of good high frequency

property (ex. laminated ceramic capacitor) to close to this device)

R1 : Impedance matching resistor for board pattern

MB88151

■SPECTRU M EXAMPLE CHARACTERISTICS

The condition of the examples of the characteristic is shown as follows : Input frequency = 20 MHz (Output

frequency = 20 MHz : Using MB88151-100 (Multiply by 1)), P ow er - supply v oltage = 3.3 V, None load capacity,

Modulation rate = ± 1.5% (center spread).

Spectrum analyzer HP4396B is connected with CKOUT. The result of the measurement with RBW = 1 kHz

(ATT use for − 6dB).

CH B Spectrum 10 dB /REF 0 dBm

RBW# 1 kHZVBW 1 kHZATT 6 dB

CENTER 20 MHZ

SWP 2.505 s

SPAN 4 MHZ

No modulation

−6.54 dBm

±1.5% modulation

−24.45 dBm

MB88151

■ORDERING INFORMATION

Part number Input frequency

range Multiplier

ratio Output frequency

range Package Remarks

MB88151PNF-G-100-JNE1

MB88151PNF-G-200-JNE1

MB88151PNF-G-400-JNE1

MB88151PNF-G-500-JNE1

16.6 MHz to

33.4 MHz

Multiplied by 1

Multiplied by 2

Multiplied by 4

Multiplied by 1/2

16.6 MHz to 33.4 MHz

33.3 MHz to 66.7 MHz

66.6 MHz to 133.4 MHz

8.3 MHz to 16.7 MHz

8-pin plastic

SOP

(FPT-8P-M02)

MB88151PNF-G-100-JN-EFE1

MB88151PNF-G-200-JN-EFE1

MB88151PNF-G-400-JN-EFE1

MB88151PNF-G-500-JN-EFE1

Multiplied by 1

Multiplied by 2

Multiplied by 4

Multiplied by 1/2

16.6 MHz to 33.4 MHz

33.3 MHz to 66.7 MHz

66.6 MHz to 133.4 MHz

8.3 MHz to 16.7 MHz

8-pin plastic

SOP

(FPT-8P-M02)

Emboss

taping

(EF type)

MB88151PNF-G-100-JN-ERE1

MB88151PNF-G-200-JN-ERE1

MB88151PNF-G-400-JN-ERE1

MB88151PNF-G-500-JN-ERE1

Multiplied by 1

Multiplied by 2

Multiplied by 4

Multiplied by 1/2

16.6 MHz to 33.4 MHz

33.3 MHz to 66.7 MHz

66.6 MHz to 133.4 MHz

8.3 MHz to 16.7 MHz

8-pin plastic

SOP

(FPT-8P-M02)

Emboss

taping

(ER type)

MB88151

■PACKAGE DIMENSION

8-pin plastic SOP

(FPT-8P-M02)

Note 1) *1 : These dimensions include resin protrusion.

Note 2) *2 : These dimensions do not include resin protrusion.

Note 3) Pins width and pins thickness include plating thickness.

Note 4) Pins width do not include tie bar cutting remainder.

Dimensions in mm (inches)

Note: The values in parentheses are reference values.

2002 FUJITSU LIMITED F08004S-c-4-7

1.27(.050)

3.90±0.30 6.00±0.40

.199 –.008

+.010

–0.20

+0.25

5.05

0.13(.005) M

(.154±.012) (.236±.016)

0.10(.004)

0.44±0.08

(.017±.003)

–0.07

+0.03

0.22

.009 +.001

–.003

45˚

0.40(.016) "A" 0~8˚

0.25(.010)

(Mounting height)

Details of "A" part

1.55±0.20

(.061±.008)

0.50±0.20

(.020±.008)

0.60±0.15

(.024±.006)

0.15±0.10

(.006±.004)

(Stand off)

0.10(.004)

MB88151

FUJITSU LIMITED

The contents of this document are subject to change without notice.

Customers are advised to consult with FUJITSU sales

representatives before ordering.

The information, such as descriptions of function and application

circuit examples, in this document are presented solely for the

purpose of reference to show examples of operations and uses of

Fujitsu semiconductor device; Fujitsu does not warrant proper

operation of the device with respect to use based on such

information. When you develop equipment incorporating the

device based on such information, you must assume any

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assumes no liability for any damages whatsoever arising out of

the use of the information.

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function and schematic diagrams, shall not be construed as license

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Fujitsu assumes no liability for any infringement of the intellectual

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and manufactured as contemplated for general use, including

without limitation, ordinary industrial use, general office use,

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reaction control in nuclear facility, aircraft flight control, air traffic

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satellite).

Please note that Fujitsu will not be liable against you and/or any

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Any semiconductor devices have an inherent chance of failure. You

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F0502