LTC4232 5A Integrated Hot Swap Controller Features Description Allows Safe Board Insertion into a Live Backplane nn Small Footprint nn 33m MOSFET with R SENSE nn Wide Operating Voltage Range: 2.9V to 15V nn Adjustable, 10% Accurate Current Limit nn Current and Temperature Monitor Outputs nn Overtemperature Protection nn Adjustable Current Limit Timer Before Fault nn Power Good and Fault Outputs nn Adjustable Inrush Current Control nn 2% Accurate Undervoltage and Overvoltage Protection nn Pin Compatible with LTC4217 (DFN Package Only) nn Available in 16-Lead 5mm x 3mm DFN Package The LTC(R)4232 is an integrated solution for Hot Swap applications that allows a board to be safely inserted and removed from a live backplane. The part integrates a Hot Swap controller, power MOSFET and current sense resistor in a single package for small form factor applications. nn The LTC4232 provides separate inrush current control and a 10% accurate 5A current limit with foldback current limiting. The current limit threshold can be adjusted dynamically using an external pin. Additional features include a current monitor output that amplifies the sense resistor voltage for ground referenced current sensing and a MOSFET temperature monitor output. Thermal limit, overvoltage, undervoltage and power good monitoring are also provided. For a 2A pin compatible version, see LTC4217. Applications The LTC4232-1 (separate data sheet) allows faster turn-on than the LTC4232 by providing 16ms debounce delay and external control of the GATE ramp rate. RAID Systems, Solid State Drives nn Server I/O Cards nn Industrial nn L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and PowerPath is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application 12V, 5A Card Resident Application with Auto-Retry 12V * 107k VDD UV Power-Up Waveforms OUT LTC4232DHC + 150k FB 20k FLT VOUT 12V 5A 330F 10k 5.23k 10k CONTACT BOUNCE IIN 0.1A/DIV VOUT 10V/DIV GATE OV VIN 10V/DIV PG 1F TIMER ISET INTVCC IMON GND ADC 20k 4232 TA01a PG 10V/DIV 25ms/DIV 4232 TA01b *TVS: DIODES INC. SMAJI7A 4232fc For more information www.linear.com/LTC4232 1 LTC4232 Absolute Maximum Ratings Pin Configuration (Notes 1, 2) Supply Voltage (VDD).................................. -0.3V to 28V Input Voltages FB, OV, UV...............................................-0.3V to 12V TIMER.................................................... -0.3V to 3.5V SENSE.............................. VDD - 10V or - 0.3V to VDD Output Voltages ISET, IMON.................................................. -0.3V to 3V PG, FLT................................................... -0.3V to 35V OUT............................................. -0.3V to VDD + 0.3V INTVCC................................................... -0.3V to 3.5V GATE (Note 3)......................................... -0.3V to 33V Operating Ambient Temperature Range LTC4232C................................................. 0C to 70C LTC4232I..............................................-40C to 85C Junction Temperature (Notes 4, 5)......................... 125C Storage Temperature Range................... -65C to 150C TOP VIEW VDD 1 16 VDD UV 2 15 ISET OV 3 TIMER 4 14 IMON INTVCC 5 GND 6 11 PG OUT 7 10 GATE OUT 8 9 17 SENSE 13 FB 12 FLT OUT DHC PACKAGE 16-LEAD (5mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 46C/W EXPOSED PAD (PIN 17) IS SENSE, JA = 46C/W SOLDERED, OTHERWISE JA = 140C/W Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC4232CDHC#PBF LTC4232CDHC#TRPBF 4232 16-Lead (5mm x 3mm) Plastic DFN 0C to 70C LTC4232IDHC#PBF LTC4232IDHC#TRPBF 4232 16-Lead (5mm x 3mm) Plastic DFN -40C to 85C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. Electrical Characteristics The l denotes those specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VDD = 12V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS DC Characteristics VDD Input Supply Range IDD Input Supply Current MOSFET On, No Load l VDD(UVL) Input Supply Undervoltage Lockout VDD Rising l IOUT OUT Leakage Current VOUT = VGATE = 0V, VDD = 15V VOUT = VGATE = 12V l l dVGATE/dt GATE Pin Turn-On Ramp Rate RON MOSFET + Sense Resistor On-Resistance ILIM(TH) Current Limit Threshold 2 15 V 1.6 3 mA 2.63 2.73 2.85 V 1 0 2 150 4 A A l 0.15 0.3 0.55 V/ms l 15 33 50 m V = 1.23V, ISET Open l 5.0 5.6 6.1 A VFB = 0V, ISET Open l 1.2 1.5 1.8 A VFB = 1.23V, RSET = 20k l 2.6 2.9 3.3 A l 2.9 4232fc For more information www.linear.com/LTC4232 LTC4232 Electrical Characteristics The l denotes those specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VDD = 12V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Inputs IIN OV, UV, FB Input Current V = 1.2V l 0 1 A VTH OV, UV, FB Threshold Voltage VPIN Rising l 1.21 1.235 1.26 V VOV(HYST) OV Hysteresis l 10 20 30 mV VUV(HYST) UV Hysteresis l 50 80 110 mV VUV(RTH) UV Reset Threshold Voltage l 0.55 0.62 0.7 V VFB(HYST) FB Power Good Hysteresis l 10 20 30 mV RISET ISET Internal Resistor l 19 20 21 k 2.8 3.1 3.3 V 0.4 0.8 V VUV Falling Outputs VINTVCC INTVCC Output Voltage VDD = 5V, 15V, ILOAD = 0mA, -10mA l VOL PG, FLT Output Low Voltage ISINK = 2mA l IOH PG, FLT Input Leakage Current V = 30V l 0 10 A VTIMER(H) TIMER High Threshold VTIMER Rising l 1.2 1.235 1.28 V VTIMER(L) TIMER Low Threshold VTIMER Falling l 0.1 0.21 0.3 V ITIMER(UP) TIMER Pull-Up Current VTIMER = 0V l -80 -100 -120 A ITIMER(DN) TIMER Pull-Down Current VTIMER = 1.2V l 1.4 2 2.6 A ITIMER(RATIO) TIMER Current Ratio ITIMER(DN)/ITIMER(UP) l 1.6 2 2.7 % AIMON IMON Current Gain l 18.5 20 21.5 A/A BWIMON IMON Bandwidth IOUT = 2.5A 250 kHz IOFF(IMON) IMON Offset Current IOUT = 150mA l 0 4.5 A IGATE(UP) Gate Pull-Up Current Gate Drive On, VGATE = VOUT = 12V l -18 -24 -29 A IGATE(DN) Gate Pull-Down Current Gate Drive Off, VGATE = 18V, VOUT = 12V l 180 250 400 A IGATE(FST) Gate Fast Pull-Down Current Fast Turn Off, VGATE = 18V, VOUT = 12V 140 mA AC Characteristics tPHL(GATE) Input High (OV), Input Low (UV) to Gate Low Propagation Delay VGATE < 16.5V Falling l 8 10 s tPHL(ILIM) Short-Circuit to Gate Low VFB = 0, Step ISENSE to 6A, VGATE < 15V Falling l 1 5 s tD(ON) Turn-On Delay Step VUV to 2V, VGATE > 13V l 100 150 ms tD(FAULT) UV Low to Clear Fault Latch Delay tD(CB) Circuit Breaker Filter Delay Time (Internal) 50 1 VFB = 0V, Step ISENSE to 3A tD(AUTO-RETRY) Auto-Retry Turn-On Delay (Internal) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into pins are positive, all voltages are referenced to GND unless otherwise specified. Note 3: An internal clamp limits the GATE pin to a maximum of 6.5V above OUT. Driving this pin to voltages beyond the clamp may damage the device. s l 1.3 2 2.7 ms l 50 100 150 ms Note 4: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 5: TJ is calculated from the ambient temperature, TA, and power dissipation, PD, according to the formula: TJ = TA + (PD * 46C/W) 4232fc For more information www.linear.com/LTC4232 3 LTC4232 Typical Performance Characteristics 3.5 2.0 2.5 1.6 INTVCC (V) 25C 1.4 -40C VDD = 3.3V 2.0 1.5 1.0 1.2 0.5 5 0 10 15 VDD (V) 20 25 0 30 0 -2 -4 4232 G01 -6 -8 ILOAD (mA) -10 0.08 0.06 -25 0 25 50 TEMPERATURE (C) 75 100 3 2 1 0.2 0.4 0.6 0.8 FB VOLTAGE (V) 1.0 1.2 4232 G07 4 100 -95 -90 -50 -25 50 0 25 TEMPERATURE (C) 75 100 10 1 0.1 100 20 10 OUTPUT CURRENT (A) 0 30 4232 G05 4232 G06 Internal ISET Resistor (RISET) vs Temperature Current Limit Adjustment (IOUT vs RSET) 22 5 ISET RESISTOR (k) 4 75 1000 -100 CURRENT LIMIT THRESHOLD VALUE (A) CURRENT LIMIT VALUE (A) 5 50 0 25 TEMPERATURE (C) 4232 G03 6 ISET OPEN -25 Current Limit Delay (tPHL(ILIM) vs Overdrive) -105 Current Limit Threshold Foldback 0 1.228 4232 G02 4232 G04 6 1.230 1.226 -50 -14 -110 TIMER PULL-UP CURRENT (A) 0.10 0.04 -50 1.232 Timer Pull-Up Current vs Temperature UV Hysteresis vs Temperature 0 -12 CURRENT PROPAGATION DELAY (s) IDD (mA) 85C UV HYSTERESIS (V) 1.234 VDD = 5V 3.0 1.8 1.0 UV Low-High Threshold vs Temperature INTVCC Load Regulation UV LOW-HIGH THRESHOLD (V) IDD vs VDD TA = 25C, VDD = 12V unless otherwise noted. 4 3 2 21 20 19 1 0 1k 10k 100k RSET () 1M 10M 4232 G08 18 -50 -25 50 0 25 TEMPERATURE (C) 75 100 4232 G09 4232fc For more information www.linear.com/LTC4232 LTC4232 Typical Performance Characteristics RON vs VDD and Temperature TA = 25C, VDD = 12V unless otherwise noted. PG, FLT Output Low Voltage vs Current MOSFET SOA Curve 10 60 14 12 50 ID (A) RON (m) 1ms 30 10ms 100ms 0.1 20 10 0 -50 -25 0 25 50 TEMPERATURE (C) 75 0.01 100 TA = 25C MULTIPLE PULSE DUTY CYCLE = 0.2 0.1 1 10 95 90 10 12 4232 G12 7 -25.5 IGATE PULL-UP (A) IMON (A) 4 6 8 CURRENT (mA) VDD = 12V 6 85 -25.0 -24.5 5 4 3 VDD = 3.3V 2 1 80 -50 -25 0 25 50 TEMPERATURE (C) 75 100 -24.0 -50 -25 50 0 25 TEMPERATURE (C) 75 Gate Drive vs VDD Gate Drive vs Temperature 6.15 6.0 6.14 5.8 5.6 5.4 5 10 15 VDD (V) 20 25 30 4232 G16 0 -5 -10 -25 -30 4232 G15 VISET vs Temperature 0.8 0.7 6.13 6.12 0.6 0.5 6.11 6.10 -50 -15 -20 IGATE (A) 0.9 VISET (V) VGATE (VGATE - VOUT) (V) 6.2 0 0 100 4232 G14 4232 G13 VGATE (VGATE - VOUT) (V) 2 Gate Drive vs Gate Pull-Up Current -26.0 VDD = 3.3V, 12V ILOAD = 5A 0 4232 G11 GATE Pull-Up Current vs Temperature 100 5.2 6 0 VGATE (VGATE - VOUT) (V) 105 8 2 100 4232 G10 FLT 4 1s 10s DC VDS (V) IMON vs Temperature and VDD PG 10 1 PG, FLT VOL (V) VDD = 3.3V, 12V 40 0.4 -25 0 25 50 TEMPERATURE (C) 75 100 4232 G17 0.3 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C) 4232 G18 4232fc For more information www.linear.com/LTC4232 5 LTC4232 Pin Functions FB: Foldback and Power Good Input. Connect this pin to an external resistive divider from OUT. If the voltage falls below 0.6V, the current limit is reduced using a foldback profile (see the Typical Performance Characteristics section). If the voltage falls below 1.21V, the PG pin will pull low to indicate the power is bad. FLT: Overcurrent Fault Indicator. Open-drain output pulls low when an overcurrent fault has occurred and the circuit breaker trips. For overcurrent auto-retry tie to UV pin (see the Applications Information section for details). GATE: Gate Drive for Internal N-channel MOSFET. An internal 24A current source charges the gate of the Nchannel MOSFET. At start-up the GATE pin ramps up at a 0.3V/ms rate determined by internal circuitry. During an undervoltage or overvoltage condition a 250A pull-down current turns the MOSFET off. During a short-circuit or undervoltage lockout condition, a 140mA pull-down current source between GATE and OUT is activated. GND: Device Ground. IMON: Current Monitor Output. The current in the internal MOSFET switch is divided by 50,000 and sourced from this pin. Placing a 20k resistor from this pin to GND creates a 0V to 2V voltage swing when current ranges from 0A to 5A. INTVCC: Internal 3.1V Supply Decoupling Output. This pin must have a 1F or larger bypass capacitor. Overloading this pin can disrupt internal operation. ISET: Current Limit Adjustment Pin. For a 5.6A current limit value open this pin. This pin is driven by a 20k resistor in series with a voltage source. The pin voltage is used to generate the current limit threshold. The internal 20k resistor (RISET) and an external resistor (RSET) between ISET and ground create an attenuator that lowers the current limit value. Due to circuit tolerance, RSET should not be less than 2k. In order to match the temperature variation of the sense resistor, the voltage on this pin increases at the same rate as the sense resistance increases. Therefore the voltage at ISET pin is made proportional to temperature of the MOSFET switch. 6 OUT: Output of Internal MOSFET Switch. Connect this pin directly to the load. OV: Overvoltage Comparator Input. Connect this pin to an external resistive divider from VDD. If the voltage at this pin rises above 1.235V, an overvoltage is detected and the switch turns off. Tie to GND if unused. PG: Power Good Indicator. Open-drain output pulls low when the FB pin drops below 1.21V indicating the power is bad. If the FB pin rises above 1.23V and the GATE to OUT voltage exceeds 4.2V, the open-drain pull-down releases the PG pin to go high. SENSE: Current Sense Node and MOSFET Drain. The current limit circuit controls the GATE pin to limit the sense voltage between the VDD and SENSE pins to 42mV (5.6A) or less depending on the voltage at the FB pin. The exposed pad on DHC packages are connected to SENSE and must be soldered to an electrically isolated printed circuit board trace to properly transfer the heat out of the package. TIMER: Timer Input. Connect a capacitor between this pin and ground to set a 12ms/F duration for current limit before the switch is turned off. If the UV pin is toggled low while the MOSFET switch is off, the switch will turn on again following a cooldown time of 518ms/F duration. Tie this pin to INTVCC for a fixed 2ms overcurrent delay and 100ms auto-retry time. UV: Undervoltage Comparator Input. Tie high if unused. Connect this pin to an external resistive divider from VDD. If the UV pin voltage falls below 1.15V, an undervoltage is detected and the switch turns off. Pulling this pin below 0.62V resets the overcurrent fault and allows the switch to turn back on (see the Applications Information section for details). If overcurrent auto-retry is desired then tie this pin to the FLT pin. VDD: Supply Voltage and Current Sense Input. This pin has an undervoltage lockout threshold of 2.73V. 4232fc For more information www.linear.com/LTC4232 LTC4232 Functional Diagram SENSE (EXPOSED PAD) VDD INTERNAL 7.5m SENSE RESISTOR GATE 6.15V INTERNAL 25m MOSFET OUT IMON - CS +- CLAMP CHARGE PUMP AND GATE DRIVER f = 2MHz + ISET INRUSH 0.6V POSITIVE TEMPERATURE COEFFICIENT REFERENCE 0.3V/ms RISET 20k X1 OUT FB CM FOLDBACK 0.6V + + 1.235V UV PG - - UV LOGIC 1.235V PG 0.62V + RST - 0.21V + FLT TM1 - + OV INTVCC 100A OV 1.235V - 2A + VDD TM2 VDD - 1.235V - 3.1V GEN UVLO1 + INTVCC - 2.73V UVLO2 TIMER 2.65V + 4232 BD GND 4232fc For more information www.linear.com/LTC4232 7 LTC4232 Operation The Functional Diagram displays the main circuits of the device. The LTC4232 is designed to turn a board's supply voltage on and off in a controlled manner allowing the board to be safely inserted and removed from a live backplane. The LTC4232 includes a 25m MOSFET and a 7.5m current sense resistor. During normal operation, the charge pump and gate driver turn on the pass MOSFET's gate to provide power to the load. The inrush current control is accomplished by the INRUSH circuit. This circuit limits the GATE ramp rate to 0.3V/ms and hence controls the voltage ramp rate of the output capacitor. The current sense (CS) amplifier monitors the load current using the voltage sensed across the current sense resistor. The CS amplifier limits the current in the load by reducing the GATE-to-OUT voltage in an active control loop. It is simple to adjust the current limit threshold using the current limit adjustment (ISET) pin. This allows a different threshold during other times such as start-up. A short circuit on the output to ground causes significant power dissipation during active current limiting. To limit this power, the foldback amplifier reduces the current limit value from 5.6A to 1.5A in a linear manner as the FB pin drops below 0.6V (see the Typical Performance Characteristics section). If an overcurrent condition persists, the TIMER pin ramps up with a 100A current source until the pin voltage exceeds 1.235V (comparator TM2). This indicates to the logic that it is time to turn off the pass MOSFET to prevent overheating. At this point the TIMER pin ramps down using the 8 2A current source until the voltage drops below 0.21V (Comparator TM1) which tells the logic to start an internal 100ms timer. At this point, the pass transistor has cooled and it is safe to turn it on again. It is suitable for many applications to use an internal 2ms overcurrent timer with a 100ms cooldown period. Tying the TIMER pin to INTVCC sets this default timing. Latchoff is the normal operating condition following overcurrent turnoff. Retry is initiated by pulling the UV pin low for a minimum of 1s then high. Auto retry is implemented by tying the FLT to the UV pin. The output voltage is monitored using the FB pin and the PG comparator to determine if the power is available for the load. The power good condition is signaled by the PG pin using an open-drain pull-down transistor. The Functional Diagram also shows the monitoring blocks of the LTC4232. The two comparators on the left side include the UV and OV comparators. These comparators determine if the external conditions are valid prior to turning on the MOSFET. But first the undervoltage lockout circuits UVLO1 and UVLO2 must validate the input supply and the internally generated 3.1V supply (INTVCC) and generate the power up initialization to the logic circuits. If the external conditions remain valid for 100ms the MOSFET is allowed to turn on. Other features include MOSFET current and temperature monitoring. The current monitor (CM) outputs a current proportional to the sense resistor current. This current can drive an external resistor or other circuits for monitoring purposes. A voltage proportional to the MOSFET temperature is output to the ISET pin. The MOSFET is protected by a thermal shutdown circuit. 4232fc For more information www.linear.com/LTC4232 LTC4232 Applications Information The typical LTC4232 application is in a high availability system that uses a positive voltage supply to distribute power to individual cards. A complete application circuit is shown in Figure 1. External component selection is discussed in detail in the following sections. OUT VDD 12V Z1* R3 140k FB UV R1 226k R2 20k LTC4232 GATE FLT R4 20k OV PG ISET CCOMP 3.3nF RGATE 100k CGATE 0.1F R5 150k + R6 20k CT 0.1F C1 1F GND OUT t1 t2 4232 F02 Figure 2. Supply Turn-On R7 10k RSET 20k ADC RMON 20k VDD CL 330F UV = 9.88V OV = 15.2V PG = 10.5V IMON GATE SLOPE = 0.3[V/ms] VOUT 12V 2A TIMER INTVCC VDD + 6.15V 4232 F01 *TVS Z1: DIODES INC. SMAJ17A Figure 1. 2A, 12V Card Resident Application Turn-On Sequence Several conditions must be present before the internal pass MOSFET can be turned on. First the supply VDD must exceed its undervoltage lockout level. Next the internally generated supply INTVCC must cross its 2.65V undervoltage threshold. This generates a 25s power-on-reset pulse which clears the fault register and initializes internal latches. This gate slope is designed to charge up a 1000F capacitor to 12V in 40ms, with an inrush current of 300mA. This allows the inrush current to stay under the current limit threshold (1.5A) for capacitors less than 1000F. Included in the Typical Performance Characteristics section is a graph of the Safe Operating Area for the MOSFET. It is evident from this graph that the power dissipation at 12V, 300mA for 40ms is in the safe region. Adding the RGATE, CGATE and CCOMP network on the GATE pin will lower the inrush current below the default value set by the INRUSH circuit. The GATE is charged with an 24A current source (when INRUSH circuit is not driving the GATE). The voltage at the GATE pin rises with a slope equal to 24A/CGATE and the supply inrush current is set at: IINRUSH= CL CGATE * 24A After the power-on-reset pulse, the UV and OV pins must indicate that the input voltage is within the acceptable range. All of these conditions must be satisfied for the duration of 100ms to ensure that any contact bounce during the insertion has ended. When the GATE voltage reaches the MOSFET threshold voltage, the switch begins to turn on and the OUT voltage follows the GATE voltage as it increases. Once OUT reaches VDD, the GATE will ramp up until clamped by the 6.15V Zener between GATE and OUT. The MOSFET is turned on by charging up the GATE with a charge pump generated 24A current source whose value is adjusted by shunting a portion of the pull-up current to ground. The charging current is controlled by the INRUSH circuit that maintains a constant slope of GATE voltage versus time (Figure 2). The voltage at the GATE pin rises with a slope of 0.3[V/ms] and the supply inrush current is set at: As the OUT voltage rises, so will the FB pin which is monitoring it. Once the FB pin crosses its 1.235V threshold and the GATE to OUT voltage exceeds 4.2V, the PG pin will cease to pull low and indicate that the power is good. IINRUSH = CL * 0.3[V/ms] Parasitic MOSFET Oscillation When the N-channel MOSFET ramps up the output during power-up it operates as a source follower. The source follower configuration may self-oscillate in the range of 25kHz to 300kHz when the load capacitance is less than 4232fc For more information www.linear.com/LTC4232 9 LTC4232 Applications Information 10F, especially if the wiring inductance from the supply to the VDD pin is greater than 3H. The possibility of oscillation will increase as the load current (during power-up) increases. There are two ways to prevent this type of oscillation. The simplest way is to avoid load capacitances below 10F. For wiring inductance larger than 20H, the minimum load capacitance may extend to 100F. A second choice is to connect an external gate capacitor CP >1.5nF as shown in Figure 3. LTC4232 GATE CP 2.2nF OPTIONAL RC TO LOWER INRUSH CURRENT 4232 F03 Figure 3. Compensation for Small CLOAD Turn-Off Sequence The switch can be turned off by a variety of conditions. A normal turn-off is initiated by the UV pin going below its 1.235V threshold. Additionally, several fault conditions will turn off the switch. These include an input overvoltage (OV pin), overcurrent circuit breaker (SENSE pin) or overtemperature. Normally the switch is turned off with a 250A current pulling down the GATE pin to ground. With the switch turned off, the OUT voltage drops which pulls the FB pin below its threshold. PG then pulls low to indicate output power is no longer good. If VDD drops below 2.65V for greater than 5s or INTVCC drops below 2.5V for greater than 1s, a fast shutdown of the switch is initiated. The GATE is pulled down with a 140mA current to the OUT pin. Overcurrent Fault The LTC4232 features an adjustable current limit with foldback that protects against short-circuits and excessive load current. To prevent excessive power dissipation in the switch during active current limit, the available current is reduced as a function of the output voltage sensed by the FB pin. A graph in the Typical Performance Characteristics curves shows the Current Limit Threshold Foldback. 10 An overcurrent fault occurs when the current limit circuitry has been engaged for longer than the timeout delay set by the TIMER. Current limiting begins when the MOSFET current reaches 1.5A to 5.6A (depending on the foldback). The GATE pin is then brought down with a 140mA GATEto-OUT current. The voltage on the GATE is regulated in order to limit the current to less than 5.6A. At this point, a circuit breaker time delay starts by charging the external timing capacitor with a 100A pull-up current from the TIMER pin. If the TIMER pin reaches its 1.235V threshold, the internal switch turns off (with a 250A current from GATE to ground). Included in the Typical Performance Characteristics curves is a graph of the Safe Operating Area for the MOSFET. From this graph one can determine the MOSFET's maximum time in current limit for a given output power. Tying the TIMER pin to INTVCC will force the part to use the internally generated (circuit breaker) delay of 2ms. In either case the FLT pin is pulled low to indicate an overcurrent fault has turned off the pass MOSFET. For a given circuit breaker time delay, the equation for setting the timing capacitor's value is as follows: CT = tCB * 0.083[F/ms] After the switch is turned off, the TIMER pin begins discharging the timing capacitor with a 2A pull-down current. When the TIMER pin reaches its 0.21V threshold, an internal 100ms timer is started. After the 100ms delay, the switch is allowed to turn on again if the overcurrent fault latch has been cleared. Bringing the UV pin below 0.6V for a minimum of 1s and then high will clear the fault latch. If the TIMER pin is tied to INTVCC then the switch is allowed to turn on again (after an internal 100ms delay), if the overcurrent fault latch is cleared. Tying the FLT pin to the UV pin allows the part to self-clear the fault and turn the MOSFET on as soon as TIMER pin has ramped below 0.21V. In this auto-retry mode the LTC4232 repeatedly tries to turn on after an overcurrent at a period determined by the capacitor on the TIMER pin. The auto-retry mode also functions when the TIMER pin is tied to INTVCC. The waveform in Figure 4 shows how the output latches off following a short-circuit. The current in the MOSFET is 1.4A as the timer ramps up. 4232fc For more information www.linear.com/LTC4232 LTC4232 Applications Information The ISET voltage follows the formula: VOUT 10V/DIV VISET = IOUT 2A/DIV RSET * ( T + 273C) * 2.093 [mV / C] RSET +RISET The MOSFET temperature is calculated using RISET of 20k. VGATE 10V/DIV T= TIMER 2V/DIV 1ms/DIV (RSET + 20k) * VISET - 273C RSET * 2.093 [mV / C] 4232 F04 Figure 4. Short-Circuit Waveform When RSET is not present, T becomes: T= Current Limit Adjustment The default value of the active current limit is 5.6A. The current limit threshold can be adjusted lower by placing a resistor between the ISET pin and ground. As shown in the Functional Block Diagram the voltage at the ISET pin (via the clamp circuit) sets the CS amplifier's built-in offset voltage. This offset voltage directly determines the active current limit value. With the ISET pin open, the voltage at the ISET pin is determined by a positive temperature coefficient reference. This voltage is set to 0.618V at room temperature which corresponds to a 5.6A current limit at room temperature. An external resistor RSET placed between the ISET pin and ground forms a resistive divider with the internal 20k RISET sourcing resistor. The divider acts to lower the voltage at the ISET pin and therefore lower the current limit threshold. The overall current limit threshold precision is reduced to 12% when using a 20k resistor to halve the threshold. Using a switch (connected to ground) in series with RSET allows the active current limit to change only when the switch is closed. This feature can be used to program a reduced running current while the maximum available current limit is used at startup. Monitor MOSFET Temperature The voltage at the ISET pin increases linearly with increasing temperature. The temperature profile of the ISET pin is shown in the Typical Performance Characteristics section. Using a comparator or ADC to measure the ISET voltage provides an indicator of the MOSFET temperature. VISET - 273C 2.093 [mV / C] There is an overtemperature circuit in the LTC4232 that monitors an internal voltage similar to the ISET pin voltage. When the die temperature exceeds 145C the circuit turns off the MOSFET until the temperature drops to 125C. Monitor MOSFET Current The current in the MOSFET passes through an internal 7.5m sense resistor. The voltage on the sense resistor is converted to a current that is sourced out of the IMON pin. The gain of ISENSE amplifier is 20A/A referenced from the MOSFET current. This output current can be converted to a voltage using an external resistor to drive a comparator or ADC. The voltage compliance for the IMON pin is from 0V to INTVCC - 0.7V. A microcontroller with a built-in comparator can build a simple integrating single-slope ADC by resetting a capacitor that is charged with this current. When the capacitor voltage trips the comparator and the capacitor is reset, a timer is started. The time between resets will indicate the MOSFET current. Monitor OV and UV Faults Protecting the load from an overvoltage condition is the main function of the OV pin. In Figure 1 an external resistive divider (driving the OV pin) connects to a comparator to turn off the MOSFET when the VDD voltage exceeds 15.2V. If the VDD pin subsequently falls back below 14.9V, the switch will be allowed to turn on immediately. In the LTC4232 the OV pin threshold is 1.235V when rising, and 1.215V when falling out of overvoltage. 4232fc For more information www.linear.com/LTC4232 11 LTC4232 Applications Information The UV pin functions as an undervoltage protection pin or as an "ON" pin. In the Figure 1 application the MOSFET turns off when VDD falls below 9.23V. If the VDD pin subsequently rises above 9.88V for 100ms, the switch will be allowed to turn on again. The LTC4232 UV turn-on/off thresholds are 1.235V (rising) and 1.155V (falling). In the cases of an undervoltage or overvoltage the MOSFET turns off and there is indication on the PG status pin. When the overvoltage is removed the MOSFET's gate ramps up immediately at the rate determined by the INRUSH block. Power Good Indication In addition to setting the foldback current limit threshold, the FB pin is used to determine a power good condition. The Figure 1 application uses an external resistive divider on the OUT pin to drive the FB pin. The PG comparator indicates logic high when OUT pin rises above 10.5V. If the OUT pin subsequently falls below 10.3V the comparator toggles low. On the LTC4232 the PG comparator drives high when the FB pin rises above 1.235V and low when it falls below 1.215V. Once the PG comparator is high the GATE pin voltage is monitored with respect to the OUT pin. Once the GATE minus OUT voltage exceeds 4.2V the PG pin goes high. This indicates to the system that it is safe to load the OUT pin while the MOSFET is completely turned "on". The PG pin goes low when the GATE is commanded off (using the UV, OV or SENSE pins) or when the PG comparator drives low. Design Example Consider the following design example (Figure 5): VIN = 12V, IMAX = 5A. IINRUSH = 100mA, CL = 330F, VUVON = 9.88V, VOVOFF = 15.2V, VPGTHRESHOLD = 10.5V. A current limit fault triggers an automatic restart of the power-up sequence. The inrush current is defined by the current required to charge the output capacitor using the fixed 0.3V/ms GATE charge-up rate. The inrush current is defined as: IINRUSH = CL * 0.3[V/ms] = 330F * 0.3[V/ms] = 100mA OUT VDD 12V Z1* R3 140k R4 20k UV R1 226k R2 20k LTC4232 FB FLT OV R5 150k + CL 330F R6 20k R7 10k UV = 9.88V OV = 15.2V PG = 10.5V GATE PG ISET TIMER INTVCC C1 1F VOUT 12V 5A GND ADC IMON RMON 20k 4232 F05 *TVS Z1: DIODES INC. SMAJ17A Figure 5. 5A, 12V Card Resident Application As mentioned previously the charge-up time is the output voltage (12V) divided by the output rate of 0.3V/ms resulting in 40ms. The peak power dissipation of 12V at 100mA (or 1.2W) is within the SOA of the pass MOSFET for 40ms (see MOSFET SOA curve in the Typical Performance Characteristics section). Next the power dissipated in the MOSFET during overcurrent must be limited. The active current limit uses a timer to prevent excessive energy dissipation in the MOSFET. The worst-case power dissipation occurs when the voltage versus current profile of the foldback current limit is at the maximum. This occurs when the current is 6.1A and the voltage is one half of the VIN or 6V. See the Current Limit Threshold Foldback in the Typical Performance Characteristics section to view this profile. In order to survive 36W, the MOSFET SOA dictates a maximum time of 10ms (see SOA graph). Use the internal 2ms timer invoked by tying the TIMER pin to INTVCC. After the 2ms timeout the FLT pin needs to pull-down on the UV pin to restart the power-up sequence. The values for overvoltage, undervoltage and power good thresholds using the resistive dividers on the UV, OV and FB pins match the requirements of turn-on at 9.88V and turn-off at 15.2V. The final schematic in Figure 5 results in very few external components. The pull-up resistor, R7, connects to the PG pin while the 20k (RMON) converts the IMON current to a voltage at a ratio: VIMON = 20[A/A] * 20k * IOUT = 0.4[V/A] * IOUT In addition there is a 1F bypass (C1) on the INTVCC pin. 12 4232fc For more information www.linear.com/LTC4232 LTC4232 Applications Information Layout Considerations Additional Applications In Hot Swap applications where load currents can be 5A, narrow PCB tracks exhibit more resistance than wider tracks and operate at elevated temperatures. The minimum trace width for 1oz copper foil is 0.02" per amp to make sure the trace stays at a reasonable temperature. Using 0.03" per amp or wider is recommended. Note that 1oz copper exhibits a sheet resistance of about 0.5m/square. Small resistances add up quickly in high current applications. The LTC4232 has a wide operating range from 2.9V to 15V. The UV, OV and PG thresholds are set with few resistors. All other functions are independent of supply voltage. There are two VDD pins on opposite sides of the package that connect to the sense resistor and MOSFET. The PCB layout should be balanced and symmetrical to each VDD pin to balance current in the MOSFET bond wires. Figure 6 shows a recommended layout for the LTC4232. In addition to Hot Swap applications, the LTC4232 also functions as a backplane resident switch for removable load cards (see Figure 7). The last page shows a 3.3V application with a UV threshold of 2.87V, an OV threshold of 3.77V and a PG threshold of 3.05V. HEAT SINK VDD Although the MOSFET is self protected from overtemperature, it is recommended to solder the backside of the package to a copper trace to provide a good heat sink. Note that the backside is connected to the SENSE pin and cannot be soldered to the ground plane. During normal loads the power dissipated in the MOSFET is as high as 1.9W. A 10mm x 10mm area of 1oz copper should be sufficient. This area of copper can be divided in many layers. VIA TO SINK C GND 4232 F06 Figure 6. Recommended Layout It is also important to put C1, the bypass capacitor for the INTVCC pin as close as possible between the INTVCC and GND. 12V Z1* R1 226k R7 10k OUT VDD LTC4232DHC PG FB OV GATE R2 20k R5 150k R6 20k FLT R4 20k UV = 9.88V OV = 15.2V PG = 10.5V R3 140k LOAD ISET INTVCC C1 1F VOUT 12V 5A 12V UV TIMER OUT GND ADC IMON RMON 20k 4232 F07 *TVS Z1: DIODES INC. SMAJ17A Figure 7. 12V, 5A Backplane Resident Application with Insertion Activated Turn-On 4232fc For more information www.linear.com/LTC4232 13 LTC4232 Package Description Please refer to http://www.linear.com/product/LTC4232#packaging for the most recent package drawings. DHC Package 16-Lead Plastic DFN (5mm x 3mm) (Reference LTC DWG # 05-08-1706) 0.65 0.05 3.50 0.05 1.65 0.05 2.20 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 4.40 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 5.00 0.10 (2 SIDES) R = 0.20 TYP 3.00 0.10 (2 SIDES) 9 R = 0.115 TYP 0.40 0.10 16 1.65 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) PIN 1 NOTCH 8 0.200 REF 1 0.25 0.05 0.50 BSC 0.75 0.05 0.00 - 0.05 (DHC16) DFN 1103 4.40 0.10 (2 SIDES) BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 14 4232fc For more information www.linear.com/LTC4232 LTC4232 Revision History REV DATE DESCRIPTION PAGE NUMBER A 12/12 Modifications to application drawings 1, 9, 12, 13, 16 Updated conditions on ILIM(TH), IIN, VTH, VOL, IOH B 04/15 Switched MIN / MAX values for ITIMER(UP) and IGATE(UP) 3 Changed formula in Note 5 to use JA 46C/W 3 Added test condition to Current Limit Threshold Foldback graph, G07 4 Updated title and axes on G12 5 Updated INTVCC voltage to 3.1V 6 Typical Application, Figure 5 and Figure 7: Added SMAJ22A (Z1); updated C1 value Raised IGATE(DN) maximum from 340A to 400A Updated TPCs G08, G11 C 01/16 2, 3 1, 12, 13, 16 3 4, 5 INTVCC Pin Function: Raised bypass capacitor value from 0.1F to 1F 6 ISET Pin Function: Recommended minimum resistor value to be 2k 6 Figure 1: Added Z1, CCOMP; updated C1, RGATE 9 Changed TVS to SMAJ17A in application circuit 1, 9, 12, 13, 16 Clarified that operating temperature range refers to ambient 2 Added BWIMON and tD(FAULT) specifications 3 Updated INTVCC and ISET pin functions 6 Added equations to calculate MOSFET temperature from VISET 11 4232fc For more information www.linear.com/LTC4232 15 LTC4232 Typical Application 3.3V, 5A Card Resident Application with Auto-Retry * 14.7k LTC4232DHC 17.4k + FB UV 3.16k VOUT 3.3V 5A OUT VDD 3.3V 10k FLT GATE OV PG 10k 100F 10k UV = 2.87V OV = 3.77V PG = 3.05V ISET TIMER INTVCC IMON GND 1F ADC 20k 4232 TA02 *TVS: DIODES INC. SMAJ17A Related Parts PART NUMBER DESCRIPTION COMMENTS LTC4210 Single Channel Hot Swap Controller Operates from 2.7V to 16.5V, Active Current Limiting, SOT23-6 LTC4211 Single Channel Hot Swap Controller Operates from 2.5V to 16.5V, Multifunction Current Control, MSOP-8 or MSOP-10 LTC4212 Single Channel Hot Swap Controller Operates from 2.5V to 16.5V, Power-Up Timeout, MSOP-10 LTC4214 Negative Voltage Hot Swap Controller Operates from 0V to -16V, MSOP-10 LTC4215 Hot Swap Controller with I2C Compatible Monitoring Operates from 2.9V to 15V, 8-Bit ADC Monitors Current and Voltage LTC4217 2A Integrated Hot Swap Controller Operates from 2.9V to 26.5V, Adjustable 5% Accurate Current Limit LTC4218 Hot Swap Controller with 5% Accurate (15mV) Current Limit Operates from 2.9V to 26.5V, Adjustable Current Limit, SSOP-16, DFN-16 LTC4219 5A Integrated Hot Swap Controller 12V and 5V Preset Versions, 10% Accurate Current Limit LT4220 Positive and Negative Voltage Dual Channel, Hot Swap Controller Operates from 2.7V to 16.5V, SSOP-16 LTC4221 Dual Hot Swap Controller/Sequencer Operates from 1V to 13.5V, Multifunction Current Control, SSOP-16 LTC4230 Triple Channel Hot Swap Controller Operates from 1.7V to 16.5V, Multifunction Current Control, SSOP-20 LTC4227 Dual Ideal Diode and Single Hot Swap Controller Operates from 2.9V to 18V, PowerPathTM and Inrush Current Control for Redundant Supplies LTC4228 Dual Ideal Diode and Hot Swap Controller Operates from 2.9V to 18V, PowerPath and Inrush Current Control for Two Rails, MicroTCA, Redundant Power Supplies, and Supply Holdup Applications LTC4233 10A Guaranteed SOA Hot Swap Controller Operates from 2.9V to 15V, Adjustable 11% Accurate Current Limit LTC4234 20A Guaranteed SOA Hot Swap Controller Operates from 2.9V to 15V, Adjustable 11% Accurate Current Limit 16 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC4232 (408) 432-1900 FAX: (408) 434-0507 www.linear.com/LTC4232 4232fc LT 0116 REV C * PRINTED IN USA (c) LINEAR TECHNOLOGY CORPORATION 2011