LM2696
LM2696 3A, Constant On Time Buck Regulator
Literature Number: SNVS375A
LM2696
May 18, 2009
3A, Constant On Time Buck Regulator
General Description
The LM2696 is a pulse width modulation (PWM) buck regu-
lator capable of delivering up to 3A into a load. The control
loop utilizes a constant on-time control scheme with input
voltage feed forward. This provides a topology that has ex-
cellent transient response without the need for compensation.
The input voltage feed forward ensures that a constant
switching frequency is maintained across the entire VIN range.
The LM2696 is capable of switching frequencies in the range
of 100 kHz to 500 kHz. Combined with an integrated 130
m high side NMOS switch the LM2696 can utilize small
sized external components and provide high efficiency. An
internal soft-start and power-good flag are also provided to
allow for simple sequencing between multiple regulators.
The LM2696 is available with an adjustable output in an ex-
posed pad TSSOP-16 package.
Features
Input voltage range of 4.5V–24V
Constant On-Time
No compensation needed
Maximum Load Current of 3A
Switching frequency of 100 kHz–500 kHz
Constant frequency across input range
TTL compatible shutdown thresholds
Low standby current of 12 µA
130 m internal MOSFET switch
Applications
High efficiency step-down switching regulators
LCD Monitors
Set-Top Boxes
Typical Application Circuit
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© 2009 National Semiconductor Corporation 201534 www.national.com
LM2696 3A, Constant On Time Buck Regulator
Connection Diagram
Top View
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eTSSOP-16 Package
Pin Descriptions
Pin # Name Function
1, 2, 3 SW Switching node
4 CBOOT Bootstrap capacitor input
5 AVIN Analog voltage input
6 EXTVCC Output of internal regulator for decoupling
7 FB Feedback signal from output
8 N/C No connect
9 GND Ground
10 SS Soft-start pin
11 PGOOD Power-good flag, open drain output
12 RON Sets the switch on-time dependent on current
13 SD Shutdown pin
14, 15, 16 PVIN Power voltage input
- Exposed Pad Must be connected to ground
Ordering Information
Order Number Package Type NSC Package
Drawing Supplied As
LM2696MXA eTSSOP-16 MXA16A 92 units/rail
LM2696MXAX eTSSOP-16 MXA16A 2,500 Units Tape and Reel
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LM2696
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Voltages from the indicated pins to GND
AVIN −0.3V to +26V
PVIN −0.3V to (AVIN+0.3V)
CBOOT −0.3V to +33V
CBOOT to SW −0.3V to +7V
FB, SD, SS, PGOOD −0.3V to +7V
Storage Temperature Range −65°C to +150°C
Junction Temperature +150°C
Lead Temperature
(Soldering, 10 sec.) 260°C
Minimum ESD Rating 1.5 kV
Operating Range
Junction
Temperature
−40°C to +125°C
AVIN to GND 4.5V to 24V
PVIN 4.5V to 24V
Electrical Characteristics Specifications with standard typeface are for TJ = 25°C, and those in boldface type
apply over the full Operating Temperature Range (TJ = −40°C to +125°C). Minimum and Maximum limits are guaranteed through
test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C and are provided for
reference purposes only. Unless otherwise specified VIN = 12V.
Symbol Parameter Condition Min Typ Max Units
VFB Feedback Pin Voltage VIN = 4.5V to 24V
ISW = 0A to 3A 1.225 1.254 1.282 V
ICL Switch Current Limit VCBOOT = VSW + 5V 3.6 4.9 6.4 A
RDS_ON Switch On Resistance ISW = 3A 0.13 0.22
IQOperating Quiescent Current VFB = 1.5V 1.3 2mA
VUVLO AVIN Under Voltage Lockout Rising VIN 3.9 4.125 4.3 V
VUVLO HYS AVIN Under Voltage Lockout Hysteresis 60 120 mV
ISD Shutdown Quiescent Current VSD = 0V 12 25 µA
kON Switch On-Time Constant ION = 50 µA to 100 µA 50 66 82 µA µs
VD ON RON Voltage 0.35 0.65 0.95 V
TOFF_MIN Minimum Off Time FB = 1.24V
FB = 0V 165
12
250
30
ns
µs
TON MIN Minimum On-time 400 ns
VEXTVCC EXTVCC Voltage 3.30 3.65 4.00 V
ΔVEXTVCC
EXTVCC Load Regulation IEXTVCC = 0 µA to 50 µA 0.03 0.5 %
VPWRGD PGOOD Threshold (PGOOD Transition
from Low to High)
With respect to VFB 91.5 93.5 95.5 %
VPG_HYS PGOOD Hysteresis 1 2.1 %
IOL PGOOD Low Sink Current VPGOOD = 0.4V 0.5 2 mA
IOH PGOOD High Leakage Current 50 nA
IFB Feedback Pin Bias Current VFB = 1.2V 0 nA
ISS_SOURCE Soft-Start Pin Source Current VSS = 0V 0.7 11.4 µA
ISS SINK Soft-Start Pin Sink Current VSS = 1.2V
VSD = 0V 15 mA
ISD Shutdown Pull-Up Current VSD = 0V 1 3µA
VIH SD Pin Minimum High Input Level 1.8 V
VIL SD Pin Maximum Low Input Level 0.6 V
θJ-A Thermal Resistance 35.1 °C/W
Note 1: Absolute Maximum Ratings indicate limits beyond which damage may occur to the device. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications, see Electrical Characteristics.
Note 2: Without PCB copper enhancements. The maximum power dissipation must be derated at elevated temperatures and is limited by TJMAX (maximum
junction temperature), θJ-A (junction to ambient thermal resistance) and TA (ambient temperature). The maximum power dissipation at any temperature is:
PDissMAX = (TJMAX - TA) /θJ-A up to the value listed in the Absolute Maximum Ratings. θJ-A for TSSOP-16 package is 38.1°C/W, TJMAX = 125°C.
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LM2696
Typical Performance Characteristics
IQ vs Temp
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IQ vs VIN
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IQ in Shutdown vs Temp
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IQ vs VIN in Shutdown
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Shutdown Thresholds vs Temp
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EXTVCC vs Temp
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LM2696
EXTVCC vs VIN
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EXTVCC vs Load Current
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Feedback Threshold Voltage vs Temp
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kON vs Temp
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Switch ON Time vs RON Pin Current
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Min Off-Time vs Temp
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LM2696
Max and Min Duty-Cycle vs Freq
(Min TON = 400 ns, Min TOFF = 200 ns)
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FET Resistance vs Temp
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RON Pin Voltage vs Temp
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Current Limit vs Temp
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LM2696
Block Diagram
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Application Information
CONSTANT ON-TIME CONTROL OVERVIEW
The LM2696 buck DC-DC regulator is based on the constant
on-time control scheme. This topology relies on a fixed switch
on-time to regulate the output. The on-time can be set man-
ually by adjusting the size of an external resistor (RON). The
LM2696 automatically adjusts the on-time inversely with the
input voltage (AVIN) to maintain a constant frequency. In con-
tinuous conduction mode (CCM) the frequency depends only
on duty cycle and on-time. This is in contrast to hysteretic
regulators where the switching frequency is determined by
the output inductor and capacitor. In discontinuous conduc-
tion mode (DCM), experienced at light loads, the frequency
will vary according to the load. This leads to high efficiency
and excellent transient response.
The on-time will remain constant for a given VIN unless an
over-current or over-voltage event is encountered. If these
conditions are encountered the FET will turn off for a minimum
pre-determined time period. This minimum TOFF (250 ns) is
internally set and cannot be adjusted. After the TOFF period
has expired the FET will remain off until the comparator trip-
point has been reached. Upon passing this trip-point the FET
will turn back on, and the process will repeat.
Switchers that regulate using an internal comparator to sense
the output voltage for switching decisions, such as hysteretic
or constant on-time, require a minimum ESR. A minimum
ESR is required so that the control signal will be dominated
by ripple that is in phase with the switchpin. Using a control
signal dominated by voltage ripple that is in phase with the
switchpin eliminates the need for compensation, thus reduc-
ing parts count and simplifying design. Alternatively, an RC
feed forward scheme may be used to eliminate the need for
a minimum ESR.
INTERNAL OPERATION
UNDER-VOLTAGE COMPARATOR
An internal comparator is used to monitor the feedback pin for
sensing under-voltage output events. If the output voltage
drops below the UVP threshold the power-good flag will fall.
ON-TIME GENERATOR SHUTDOWN
The on-time for the LM2696 is inversely proportional to the
input voltage. This scheme of on-time control maintains a
constant frequency over the input voltage range. The on-time
can be adjusted by using an external resistor connected be-
tween the PVIN and RON pins.
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LM2696
CURRENT LIMIT
The LM2696 contains an intelligent current limit off-timer. If
the peak current in the internal FET exceeds 4.9A the present
on-time is terminated; this is a cycle-by-cycle current limit.
Following the termination of the on-time, a non-resetable ex-
tended off timer is initiated. The length of the off-time is
proportional to the feedback voltage. When FB = 0V the off-
time is preset to 20 µs. This condition is often a result of in
short circuit operation when a maximum amount of off-time is
required. This amount of time ensures safe short circuit op-
eration up to the maximum input voltage of 24V.
In cases of overload (not complete short circuit, FB > 0V) the
current limit off-time is reduced. Reduction of the off-time dur-
ing smaller overloads reduces the amount of fold back. This
also reduces the initial startup time.
N-CHANNEL HIGH SIDE SWITCH AND DRIVER
The LM2696 utilizes an integrated N-Channel high side
switch and associated floating high voltage gate driver. This
gate driver circuit works in conjunction with an external boot-
strap capacitor and an internal diode. The minimum off-time
(165 ns) is set to ensure that the bootstrap capacitor has suf-
ficient time to charge.
THERMAL SHUTDOWN
An internal thermal sensor is incorporated to monitor the die
temperature. If the die temp exceeds 165ºC then the sensor
will trip causing the part to stop switching. Soft-start will restart
after the temperature falls below 155ºC.
COMPONENT SELECTION
As with any DC-DC converter, numerous trade-offs are
present that allow the designer to optimize a design for effi-
ciency, size and performance. These trade-offs are taken into
consideration throughout this section.
The first calculation for any buck converter is duty cycle. Ig-
noring voltage drops associated with parasitic resistances
and non-ideal components, the duty cycle may be expressed
as:
A duty cycle relationship that considers the voltage drop
across the internal FET and voltage drop across the external
catch diode may be expressed as:
Where VD is the forward voltage of the external catch diode
(DCATCH) and VSW is the voltage drop across the internal FET.
FREQUENCY SELECTION
Switching frequency affects the selection of the output induc-
tor, capacitor, and overall efficiency. The trade-offs in fre-
quency selection may be summarized as; higher switching
frequencies permit use of smaller inductors possibly saving
board space at the trade-off of lower efficiency. It is recom-
mended that a nominal frequency of 300 kHz should be used
in the initial stages of design and iterated if necessary.
The switching frequency of the LM2696 is set by the resistor
connected to the RON pin. This resistor controls the current
flowing into the RON pin and is directly related to the on-time
pulse. Connecting a resistor from this pin to PVIN allows the
switching frequency to remain constant as the input voltage
changes. In normal operation this pin is approximately 0.65V
above GND. In shutdown, this pin becomes a high impedance
node to prevent current flow.
The ON time may be expressed as:
Where VIN is the voltage at the high side of the RON resistor
(typically PVIN), VD is the diode voltage present at the RON
pin (0.65V typical), RON is in k, and kON is a constant value
set internally (66 µA•µs nominal). This equation can be re-
arranged such that RON is a function of switching frequency:
Where fSW is in kHz.
In CCM the frequency may be determined using the relation-
ship:
(TON is in µs)
Which is typically used to set the switching frequency.
Under no condition should a bypass capacitor be connected
to the RON pin. Doing so couples any AC perturbations into
the pin and prevents proper operation.
INDUCTOR SELECTION
Selecting an inductor is a process that may require several
iterations. The reason for this is that the size of the inductor
influences the amount of ripple present at the output that is
critical to the stability of an adaptive on-time circuit. Typically,
an inductor is selected such that the maximum peak-to-peak
ripple current is equal to 30% of the maximum load current.
The inductor current ripple (ΔIL) may be expressed as:
Therefore, L can be initially set to the following by applying
the 30% guideline:
The other features of the inductor that should be taken into
account are saturation current and core material. A shielded
inductor or low profile unshielded inductor is recommended
to reduce EMI.
OUTPUT CAPACITOR
The output capacitor size and ESR have a direct affect on the
stability of the loop. This is because the adaptive on-time
control scheme works by sensing the output voltage ripple
and switching appropriately. The output voltage ripple on a
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LM2696
buck converter can be approximated by assuming that the AC
inductor ripple current flows entirely into the output capacitor
and the ESR of the capacitor creates the voltage ripple. This
is expressed as:
ΔVOUT ΔIL • RESR
To ensure stability, two constraints need to be met. These
constraints are the voltage ripple at the feedback pin must be
greater than some minimum value and the voltage ripple must
be in phase with the switch pin.
The ripple voltage necessary at the feedback pin may be es-
timated using the following relationship:
ΔVFB > −0.057 • fSW + 35
Where fSW is in kHz and ΔVFB is in mV.
This minimum ripple voltage is necessary in order for the
comparator to initiate switching. The voltage ripple at the
feedback pin must be in-phase with the switch. Because the
ripple due to the capacitor charging and capacitor ESR are
out of phase, the ripple due to capacitor ESR must dominate.
The ripple at the output may be calculated by multiplying the
feedback ripple voltage by the gain seen through the feed-
back resistors. This gain H may be expressed as:
To simplify design and eliminate the need for high ESR output
capacitors, an RC network may be used to feed forward a
signal from the switchpin to the feedback (FB) pin. See the
‘Ripple Feed Forward’ section for more details.
Typically, the best performance is obtained using POSCAPs,
SP CAPs, tantalum, Niobium Oxide, or similar chemistry type
capacitors. Low ESR ceramic capacitors may be used in con-
junction with the RC feed forward scheme; however, the feed
forward voltage at the feedback pin must be greater than 30
mV.
RIPPLE FEED FORWARD
An RC network may be used to eliminate the need for high
ESR capacitors. Such a network is connected as shown in
Figure 1.
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FIGURE 1. RC Feed Forward Network
The value of Rff should be large in order to prevent any po-
tential offset in VOUT. Typically the value of Rff is on the order
of 1 M and the value of RFB1 should be less than 10 k. The
large difference in resistor values minimizes output voltage
offset errors in DCM. The value of the capacitor may be se-
lected using the following relationship:
Where the on-time (TON_MIN) is in µs, and the resistance (Rff)
is in MΩ.
FEEDBACK RESISTORS
The feedback resistors are used to scale the output voltage
to the internal reference value such that the loop can be reg-
ulated. The feedback resistors should not be made arbitrarily
large as this creates a high impedance node at the feedback
pin that is more susceptible to noise. Typically, RFB2 is on the
order of 1 k. To calculate the value of RFB1, one may use
the relationship:
Where VFB is the internal reference voltage that can be found
in the electrical characteristics table (1.254V typical).
The output voltage value can be set in a precise manner by
taking into account the fact that the reference voltage is reg-
ulating the bottom of the output ripple as opposed to the
average value. This relationship is shown in Figure 2.
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LM2696
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FIGURE 2. Average and Ripple Output Voltages
It can be seen that the average output voltage is higher than
the gained up reference by exactly half the output voltage rip-
ple. The output voltage may then be appended according to
the voltage ripple. The appended VOUT term may be ex-
pressed using the relationship:
One should note that for high output voltages (>5V), a load of
approximately 15 mA may be required for the output voltage
to reach the desired value.
INPUT CAPACITOR
Because PVIN is the power rail from which the output voltage
is derived, the input capacitor is typically selected according
to the load current. In general, package size and ESR deter-
mine the current capacity of a capacitor. If these criteria are
met, there should be enough capacitance to prevent
impedance interactions with the source. In general, it is rec-
ommended to use a low ESR, high capacitance electrolytic
and ceramic capacitor in parallel. Using two capacitors in par-
allel ensures adequate capacitance and low ESR over the
operating range. The Sanyo MV-WX series electrolytic ca-
pacitors and a ceramic capacitor with X5R or X7R dielectric
are an excellent combination. To calculate the input capacitor
RMS, one may use the following relationship:
that can be approximated by,
Typical values are 470 µF for the electrolytic capacitor and
0.1 µF for the ceramic capacitor.
AVIN CAPACITOR
AVIN is the analog bias rail of the device. It should be by-
passed externally with a small (1 µF) ceramic capacitor to
prevent unwanted noise from entering the device. In a shut-
down state the current needed by AVIN will drop to approxi-
mately 12 µA, providing a low power sleep state.
In most cases of operation, AVIN is connected to PVIN; how-
ever, it is possible to have split rail operation where AVIN is at
a higher voltage than PVIN. AVIN should never be lower than
PVIN. Splitting the rails allows the power conversion to occur
from a lower rail than the AVIN operating range.
SOFT-START CAPACITOR
The SS capacitor is used to slowly ramp the reference from
0V to its final value of 1.25V (during shutdown this pin will be
discharged to 0V). This controlled startup ability eliminates
large in-rush currents in an attempt to charge up the output
capacitor. By changing the value of this capacitor, the dura-
tion of the startup may be changed accordingly. The startup
time may be calculated using the following relationship:
Where ISS is the soft-start pin source current (1 µA typical)
that may be found in the electrical characteristics table. While
the CSS capacitor can be sized to meet the startup require-
ments, there are limitations to its size. If the capacitor is too
small, the soft-start will have little effect as the reference volt-
age is rising faster than the output capacitor can be charged
causing the part to go into current limit. Therefore a minimum
soft-start time should be taken into account. This can be de-
termined by:
While COUT and VOUT control the slew rate of the output volt-
age, the total amount of time the LM2696 takes to startup is
dependent on two other terms. See the “Startup” section for
more information.
EXTVCC CAPACITOR
External VCC is a 3.65V rail generated by an internal sub-reg-
ulator that powers the parts internal circuitry. This rail should
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LM2696
be bypassed with a 1 µF ceramic capacitor (X5R or equivalent
dielectric). Although EXTVCC is for internal use, it can be used
as an external rail for extremely light loads (<50 µA). If
EXTVCC is accidentally shorted to GND the part is protected
by a 5 mA current limit. This rail also has an under-voltage
lockout that will prevent the part from switching if the
EXTVCC voltage drops.
SHUTDOWN
The state of the shutdown pin enables the device or places it
in a sleep state. This pin has an internal pull-up and may be
left floating or connected to a high logic level. Connecting this
pin to GND will shutdown the part. Shutting down the part will
prevent the part from switching and reduce the quiescent cur-
rent drawn by the part. This pin must be bypassed with a 1 nF
ceramic capacitor (X5R or Y5V) to ensure proper logic thresh-
olds.
CBOOT CAPACITOR
The purpose of an external bootstrap capacitor is to turn the
FET on by using the SW node as a pedestal. This allows the
voltage on the CBOOT pin to be greater than VIN. Whenever
the catch diode is conducting and the SW node is at GND, an
internal diode will conduct that charges the CBOOT capacitor
to approximately 4V. When the SW node rises, the CBOOT
pin will rise to approximately 4V above the SW node. For op-
timal performance, a 0.1 µF ceramic capacitor (X5R or equiv-
alent dielectric) should be used.
PGOOD RESISTOR
The PGOOD resistor is used to pull the PGOOD pin high
whenever a steady state operating range is achieved. This
resistor needs to be sized to prevent excessive current from
flowing into the PGOOD pin whenever the open drain FET is
turned on. The recommendation is to use a 10 kΩ–100 k
resistor. This range of values is a compromise between rise
time and power dissipation.
CATCH DIODE
The catch or freewheeling diode acts as the bottom switch in
a non-synchronous buck switcher. Because of this, the diode
has to handle the full output current whenever the FET is not
conducting. Therefore, it must be sized appropriately to han-
dle the current. The average current through the diode can be
calculated by the equation:
ID_AVG = IOUT•(1–D)
Care should also be taken to ensure that the reverse voltage
rating of the diode is adequate. Whenever the FET is con-
ducting the voltage across the diode will be approximately
equal to VIN. It is recommended to have a reverse rating that
is equal to 120% of VIN to ensure adequate guard banding
against any ringing that could occur on the switch node.
Selection of the catch diode is critical to overall switcher per-
formance. To obtain the optimal performance, a Schottky
diode should be used due to their low forward voltage drop
and fast recovery.
BYPASS CAPACITOR
A bypass capacitor must be used on the AVIN line to help de-
couple any noise that could interfere with the analog circuitry.
Typically, a small (1 µF) ceramic capacitor is placed as close
as possible to the AVIN pin.
EXTERNAL OPERATION STARTUP
The total startup time, from the initial VIN rise to the time
VOUT reaches its nominal value is determined by three sepa-
rate steps. Upon the rise of VIN, the first step to occur is that
the EXTVCC voltage has to reach its nominal output voltage
of 3.65V before the internal circuitry is active. This time is dic-
tated by the output capacitance (1 µF) and the current limit of
the regulator (5 mA typical), which will always be on the order
of 730 µs. Upon reaching its steady state value, an internal
delay of 200 µs will occur to ensure stable operation. Upon
completion the LM2696 will begin switching and the output
will rise. The rise time of the output will be governed by the
soft-start capacitor. To highlight these three steps a timing
diagram please refer to Figure 3.
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LM2696
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FIGURE 3. Startup Timing Diagram
UNDER- & OVER-VOLTAGE CONDITIONS
The LM2696 has a built in under-voltage comparator that
controls PGOOD. Whenever the output voltage drops below
the set threshold, the PGOOD open drain FET will turn on
pulling the pin to ground. For an over-voltage event, there is
no separate comparator to control PGOOD. However, the
loop responds to prevent this event from occurring because
the error comparator is essentially sensing an OVP event. If
the output is above the feedback threshold then the part will
not switch back on; therefore, the worst-case condition is one
on-time pulse.
CURRENT LIMIT
The LM2696 utilizes a peak-detect current limit that senses
the current through the FET when conducting and will imme-
diately terminate the on-pulse whenever the peak current
exceeds the threshold (4.9A typical). In addition to terminating
the present on-pulse, it enforces a mandatory off-time that is
related to the feedback voltage.
If current limit trips and the feedback voltage is close to its
nominal value of 1.25V, the off-time imposed will be relatively
short. This is to prevent the output from dropping or any fold
back from occurring if a momentary short occurred because
of a transient or load glitch. If a short circuit were present, the
off-time would extend to approximately 12 µs. This ensures
that the inductor current will reach a low value (approximately
0A) before the next switching cycle occurs. The extended off-
time prevents runaway conditions caused by hard shorts and
high side blanking times.
If the part is in an over current condition, the output voltage
will begin to drop as shown in Figure 4. If the output voltage
is dropping and the current is below the current limit threshold,
(I1), the part will assert a pulse (t2) after a minimum off-time
(t1). This is in an attempt to raise the output voltage.
If the part is in an over current condition and the output voltage
is below the regulation value (VL) as shown in Figure 4, the
part will assert a pulse of minimal width (t4) and extend the
off-time (t5). In the event that the voltage is below the regula-
tion value (VL) and the current is below the current limit value,
the part will assert two (or more) pulses separated by some
minimal off-time (t1).
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LM2696
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FIGURE 4. Fault Condition Timing
Legend:
t1: Min off-time (165 ns typical)
t2: On-time (set by the user)
t3: Min off-time (165 ns typical)
t4: Blanking time (165 ns typical)
t5: Extended off-time (12 µs typical)
VL: UVP threshold
The last benefit of this scheme is when the short circuit is
removed, and full load is re-applied, the part will automatically
recover into the load. The variation in the off-time removes
the constraints of other frequency fold back systems where
the load would typically have to be reduced.
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FIGURE 5. Normalized Output Voltage
Versus Load Current
MODES OF OPERATION
Since the LM2696 utilizes a catch diode, whenever the load
current is reduced to a point where the inductor ripple is
greater than two times the load current, the part will enter dis-
continuous operation. This is because the diode does not
permit the inductor current to reverse direction. The point at
which this occurs is the critical conduction boundary and can
be calculated by the following equation:
One advantage of the adaptive on-time control scheme is that
during discontinuous conduction mode the frequency will
gradually decrease as the load current decreases. In DCM
the switching frequency may be determined using the rela-
tionship:
It can be seen that there will always be some minimum switch-
ing frequency. The minimum switching frequency is deter-
mined by the parameters above and the minimum load
presented by the feedback resistors. If there is some mini-
mum frequency of operation the feedback resistors may be
sized accordingly.
The adaptive on-time control scheme is effectively a pulse-
skipping mode, but since it is not tied directly to an internal
clock, its pulse will only occur when needed. This is in contrast
to schemes that synchronize to a reference clock frequency.
The constant on-time pulse-skipping/DCM mode minimizes
output voltage ripple and maximizes efficiency.
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LM2696
Several diagrams are shown in Figure 6 illustrating continu-
ous conduction mode (CCM), discontinuous conduction
mode (DCM), and the boundary condition.
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FIGURE 6. Modes of Operation
It can be seen that in DCM, whenever the inductor runs dry
the SW node will become high impedance. Ringing will occur
as a result of the LC tank circuit formed by the inductor and
the parasitic capacitance at the SW node.
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FIGURE 7. Parasitic Tank Circuit at the Switchpin
LINE REGULATION
The LM2696 regulates to the lowest point of the output volt-
age (VL in Figure 8 ). This is to say that the output voltage may
be represented by a waveform that is some average voltage
with ripple. The LM2696 will regulate to the trough of the rip-
ple.
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LM2696
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FIGURE 8. Average Output Voltage and Regulation Point
The output voltage is given by the following relationship:
as discussed in the Feedback Resistor section of this docu-
ment.
TRANSIENT RESPONSE
Constant on-time architectures have inherently excellent tran-
sient line and load response. This is because the control loop
is extremely fast. Any change in the line or load conditions will
result in a nearly instantaneous response in the PWM off time.
If one considers the switcher response to be nearly cycle-by-
cycle, and amount of energy contained in a single PWM pulse,
there will be very little change in the output for a given change
in the line or load.
EFFICIENCY
The constant on-time architecture features high efficiency
even at light loads. The ability to achieve high efficiency at
light loads is due to the fact that the off-time will become nec-
essarily long at light loads. Having extended the off-time,
there is little mechanism for loss during this interval.
The efficiency is easily estimated using the following relation-
ships:
Power loss due to FET:
PFET = PC + PGC + PSW
Where:
PC = D • (IOUT2 • RDS_ON)
PGC = AVIN + VGS • QGS • fSW
PSW = 0.5 • VIN · IOUT • (tr + tf) • fSW
Typical values are:
RDS_ON = 130 m
VGS = 4V
QGS = 13.3 nC
tr = 3.8 ns
tf = 4.5 ns
Power loss due to catch diode:
PD = (1-D) • (IOUT • Vf)
Power loss due to DCR and ESR:
PDCR = IOUT2 • RDCR
PESR_OUTPUT = IRIPPLE2/12 • RESR_OUTPUT
PESR_INPUT = IOUT2(D(1-D)) • RESR_INPUT
Power loss due to Controller:
PCONT = VIN • IQ
IQ is typically 1.3 mA
The efficiency may be calculated as shown below:
Total power loss = PFET + PD + PDCR + PESR_OUTPUT + PESR_IN-
PUT + PCONT
Power Out = IOUT • VOUT
PRE-BIAS LOAD STARTUP
Should the LM2696 start into a pre-biased load the output will
not be pulled low. This is because the part is asynchronous
and cannot sink current. The part will respond to a pre-biased
load by simply enabling PWM high or extending the off-time
until regulation is achieved. This is to say that if the output
voltage is greater than the regulation voltage the off-time will
extend until the voltage discharges through the feedback re-
sistors. If the load voltage is greater than the regulation volt-
age, a series of pulses will charge the output capacitor to its
regulation voltage.
THERMAL CONSIDERATIONS
The thermal characteristics of the LM2696 are specified using
the parameter θJA, which relates the junction temperature to
the ambient temperature. While the value of θJA is specific to
a given set of test parameters (including board thickness,
number of layers, orientation, etc), it provides the user with a
common point of reference.
To obtain an estimate of a devices junction temperature, one
may use the following relationship:
TJ = PIN (1-Efficiency) x θJA + TA
Where:
TJ is the junction temperature in ºC
PIN is the input power in Watts (PIN = VIN·IIN)
θJA is the thermal coefficient of the LM2696
TA is the ambient temperature in ºC
LAYOUT CONSIDERATIONS
The LM2696 regulation and under-voltage comparators are
very fast and will respond to short duration noise pulses. Lay-
out considerations are therefore critical for optimum perfor-
15 www.national.com
LM2696
mance. The components at pins 5, 6, 7, 12 and 13 should be
as physically close as possible to the IC, thereby minimizing
noise pickup in the PC traces. If the internal dissipation of the
LM2696 produces excessive junction temperatures during
normal operation, good use of the PC board’s ground plane
can help considerably to dissipate heat. The exposed pad on
the bottom of the TSSOP-16 package can be soldered to a
ground plane on the PC board, and that plane should extend
out from beneath the IC to help dissipate the heat. Use of
several vias beneath the part is also an effective method of
conducting heat. Additionally, the use of wide PC board
traces, where possible, can also help conduct heat away from
the IC. Judicious positioning of the PC board within the end
product, along with use of any available air flow (forced or
natural convection) can help reduce the junction tempera-
tures. Traces in the power plane (Figure 9) should be short
and wide to minimize the trace impedance; they should also
occupy the smallest area that is reasonable to minimize EMI.
Sizing the power plane traces is a tradeoff between current
capacity, inductance, and thermal dissipation. For more in-
formation on layout considerations, please refer to National
Semiconductor Application Note AN-1229.
20153450
FIGURE 9. Bold Traces Are In The Power Plane
www.national.com 16
LM2696
20153451
FIGURE 10. 5V-to-2.5V Voltage Applications Circuit
Bill of Materials
(Figure 10: Medium Voltage Board, 5V-to-2.5V conversion, fsw = 300 kHz)
Designator Function Description Vendor Part Number
CIN Input Cap 470 µF Sanyo 10MV470WX
CBY Bypass Cap 0.1 µF Vishay VJ0805Y104KXAM
CSS Soft-Start Cap 0.01 µF Vishay VJ080JY103KXX
CEXT EXTVCC 1 µF Vishay VJ0805Y105JXACW1BC
CBOOT Boot 0.1 µF Vishay VJ0805Y104KXAM
CAVIN Analog VIN 1 µF Vishay VJ0805Y105JXACW1BC
COUT Output Cap 47 µF AVX TPSW476M010R0150
CSD Shutdown Cap 1 nF Vishay VJ0805Y102KXXA
RFB1 High Side FB Res 1 kVishay CRCW08051001F
RFB2 Low Side RB Res 1 kVishay CRCW08051001F
RON On Time Res 143 kVishay CRCW08051433F
DCATCH Boot Diode 40V @ 3A Diode Central Semi CMSH3-40M-NST
L Output Inductor 6.8 uH, 4.9A ISAT Coilcraft MSS1260-682MX
17 www.national.com
LM2696
20153452
FIGURE 11. 12V-to 3.3V Voltage Applications Circuit
Bill of Materials
(Figure 11: Medium Voltage Board, 12V-to-3.3V conversion, fsw = 300 kHz)
Designator Function Description Vendor Part Number
CIN Input Cap 560 µF Sanyo 35MV560WX
CBY Bypass Cap 0.1 µF Vishay VJ0805Y104KXAM
CSS Soft-Start Cap 0.01 µF Vishay VJ080JY103KXX
CEXT EXTVCC 1 µF Vishay VJ0805Y105JXACW1BC
CBOOT Boot 0.1 µF Vishay VJ0805Y104KXAM
CAVIN Analog VIN 1 µF Vishay VJ0805Y105JXACW1BC
COUT Output Cap 100 µF Sanyo 6SVPC100M
CSD Shutdown Cap 1 nF Vishay VJ0805Y102KXXA
Cff Feedforward Cap 560 pF Vishay VJ0805A561KXXA
Rff Feedforward Res 1 MVishay CRCW08051004F
RFB1 High Side FB Res 1.62 kVishay CRCW08051621F
RFB2 Low Side RB Res 1 kVishay CRCW08051001F
RON On Time Res 143 kVishay CRCW08051433F
DCATCH Boot Diode 40V @ 3A Diode Central Semi CMSH3-40M-NST
L Output Inductor 10 uH, 5.4A ISAT Coilcraft MSS1278-103MX
www.national.com 18
LM2696
Physical Dimensions inches (millimeters) unless otherwise noted
eTSSOP-16 Package
Order Number LM2696MXA or LM2696MXAX
NS Package Number MXA16A
19 www.national.com
LM2696
Notes
LM2696 3A, Constant On Time Buck Regulator
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