1,048,576 WORD <4 BIT DYNAMIC RAM PRELIMINARY DESCRIPTION The TC514400AP/AJ/ASJ/AZ is the new generation dynamic RAM crganized 1,048,576 words by 4 bits. The TC514400AP/AJ/ASJ/AZ utilizes TOSHIBAs CMOS Silicon gate process technology as well as advanced circuit techniques to provide wide operating margins, both internally and to the system user, Multiplexed address inputs permit the TC514400AP/AJ/ASJ/AZ to be packaged in a standard 20 pin plastic DIP, 26/20 pin plastic SOJ(300/35Gmil) and 20 pin plastic ZIP. The package size provides high system bit densities and is compatible with widely available automated testing and insertion equipment. System oriented features include single power supply of 5V2410% tolerance, direct interfacing capability with high performance logic farsilies such as Schottky TTL. FEATURES 1,048,576 word by 4 bit organization Low Power Fast access time and cycle time 550mW MAX. Operating (TC514400AP/AJ/ASJ/AZ 70) rors 7 Boe 468mW MAX. Operating (TC514400AP/AJ/ASJ/AZ 80) trac RAS Access Time 70ns 80ns 100ns 413mW MAX. Operating taa Column Address (TC514400AP/AJ/ASJ/AZ10) Access Time fens Ans 5.5mW MAX. Standby teac__ CAS Access Time 20ns 20ns 25ns_| @ Outputs unlatched at cycle end allows two- t Cycle Time 130ns 150ns 180ns dimensional chip selection he Fast Page Mode Read-Modify-Write, CAS before RAS refresh, Cycle Time a5ns 50ns 6Ons RAS-only refresh, Hidden refresh, Fast Page J Mode and Test Mode capability Single power supply of 5V1t10% e@ All inputs and outputs TTL compatible with a built-in Vgp generator 1024 refresh cycles/L6ms Package TC514400AP : DIP20-P-300C PIN NAMES TC514400AJ : SOJ26-P-350 TC514400ASJ : SOJ26-P-300A A0~AS| Address Inputs OE Output Enable TC5144004AZ : ZIP20-P-400A RAS | Row Address Strobe vG1~1/04iOata Input/Output TAS |Column Address Strobe | Vec | Power (+ 5V) BLOCK DIAGRAM WRITE | Read/Write input Vs5 Ground vol WO2 O3 vos PIN CONNECTION (TOP VIEW) Vee ss DATA OUT fe BUFFERS cE ya 3 DATA IN BUFFERS Plastic GIP Plasti $0) Plastic 21P 1 2 ; TH NO.2 CLOCK [I : GENERATOR 5 i 7 COLUMN COLUMN 5 AO Or ADDRESS rr OECODER 9 Al Oe] SUFFERS (10) 5 azo SENSE AMP REFRESK vO GATE A3 OF CONTROLLER [+ AsO \ . 1036 -4 ASOr REFRESH Abo! I, COUNTER (10) x aoe ROW z Sha MEMORY ADDRESS TH 2 9| 1024 ARRAY AS Om BUFFERS (10) tat ged] 1024 x 10248 x 4 a NO. CLOCK oso Bue EF SUSSTRATE BIAS GENERATOR A-3551C514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 ABSOLUTE MAXIMUM RATINGS ITEM SYMBOL RATING UNITS NOTES Input Voltage Vin -1~7 Vv 1 Output Voltage Vout ~1~7 v 1 Power Supply Voltage Vec ~1~7 v 1 Operating Temperature Topr 0~70 Cc 1 Storage Temperature Ts1 ~55~150 *C 1 Soldering Temperature : Time TsoLver 260 10 "C+ sec 1 Power Dissipation Po 700 mw 1 Short Circuit Output Current lout 50 mA 5 RECOMMENDED DC OPERATING CONDITIONS (Ta =0~70c) SYMBOL PARAMETER MIN. TYP. MAX, UNIT NOTES Vec Supply Voltage 45 5.0 5.5 v 2 Vin Input High Voltage 2.4 - 6.5 v 2 Vi Input Low Voltage -1.0 - 0.8 Vv 2 A-356TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 DC ELECTRICAL CHARACTERISTICS (Vcc = 5V 4 10%, Ta=0~70c) SYMBOL PARAMETER MIN. MAX. | UNITS | NOTES OPERATING CURRENT TCS 1ARQOAP/AVASVAZ-70 - 100 3.4 lees Average Power Supply Operating Current TC5 SAMQOAP/AVASIAZ-BO - 85 mA (RAS, TAS, Address Cycling: tac = tae MIN.) TCS 1AR0CAPIAASVAZ-10 - 75 5 STANDBY CURRENT lee2 Power Supply Standby Current ~ 2 mA (RAS = CAS = Vin) RAS ONLY REFRESH CURRENT TCSISA00AP/ANASUAZ-70 | = 100 - lees Average Power Supply Current, RAS Only Mode = | Tc51440gaPrawassaz-80 - 85 mA 3,5 (RAS Cycling, CAS =Viy: tac tae MIN.) TCSIASO0APIAUASIIAZ-I0 | = 75 FAST PAGE MODE CURRENT TCS 14400 AP/AUIASIIAZ-70 - 70 3, 4 Average Power Supply Current, Fast Page Mode | TCS14400AP/AVASAZ-80 - 60 mA Ieca | (RAS 2 V,, CAS, Address Cycling: tec= tec MIN.) [yesraaooapavasuazio| = 55 5 STANDBY CURRENT lees Power Supply Standby Current - 1 mA (RAS = CAS = Vee - 0.2V) CAS BEFORE RAS REFRESH CURRENT TCSIAA00AP/AVASIAZ-7O | = 100 Icce | Average Power Supply Current, CAS Before RAS | testaaoaapiawasyaz.so | - 85 mA 3, 5 Made (RAS, CAS Cycling: tre = tae MIN.) TCSIAAQOAPIAASWAZ-10 | = 75 INPUT LEAKAGE CURRENT hay Input Leakage Current, any input -10 19 pA {OVS VinS 6.5V, Alt Other Pins Not Under Test =0V) OUTPUT LEAKAGE CURRENT \ -1o | 10 O10 | (Dour is disabled, OVS VoyrS5.5V) HA OUTPUT LEVEL Vv 2.4 ~- Vv oH Output H Level Voltage (lout = SMA) OUTPUT LEVEL Vv - 0.4 Vv ou Output L" Level Voltage (lour = 4.2mA) A-357TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Vec =5V 10%, Ta=0~70c) (Notes 6, 7, 8) TCS 14400AP/ TCS 14400AP/ TC514400AP/ SYMaOL PARAMETER AVASVAZ-70 | AW/ASI/AZ-80 AVASYAZ-10 | unit | NOTES MIN. MAX. MIN. MAX. MIN. MAX. tre Random Read or Write Cycle Time 130 - 150 -% 180. - ns tauw Read-Modify-Write Cycle Time 185 - 205 - 245 - ns tec Fast Page Mode Cycle Time 45 - 50 ~ 60 - ns term Grle Tome Read-Modify-Write 100 _ 105 _ 125 . ns taac Access Time from FAS - 70) - ao] - 100} ns an teac Access Time from CAS - 20) - 20) - 25] ns 9,14 tan Access Time fram Column Address - 35 40 - 50] ns 9,15 tepa Access Time from TAS Precharge - 40 - 45 - 55] ns 9 tez TAS to output in Low-Z 0 - 0 - 0 - ns 9 torr Output Buffer Turn-off Delay 0 20 0 20 0 20| ns 10 tr Transition Time (Rise and Fall) 3 50 3 50 3 50] ns 8 tap RAS Precharge Time 50 - 60 - 70 - ns tras RAS Pulse Width 70 410,000 80 10,000 106 10,000} ns frase RAS Pulse Width (Fast Page Mode} 70 200,000 80 200,000 100 200,000] ns las RAS Hold Time 20 - 20 - 25 - ns taucr var eae gem CAS Precharge 40 . 45 . 55 . ns tesH TAS Hold Time 70 80 - 100 - ns teas CAS Pulse Width 20 10,000 20 10,000 25 10,000] ns taco RAS to CAS Delay Time 20 50 20 60 25 75] ns 14 trap RAS to Column Address Delay Time 15 35 is 40 20 50} ns 15 teap CAS to RAS Precharge Time 5 - 5 - 10 - ns tcp TAS Precharge Time 10 - 10 - 10 - ns . tase Row Address Set-Up Time 0 - 0 - 0 - ns tray Row Address Hold Time 10 - 10 - +5 - ns tasc Column Address Set-Up Time 0 ~ 6 - 0 - ns tcan Column Address Hold Time 15 - 15 - 20 - ns trat Column Address to RAS Lead Time 35 ~ 40 ~ 50 - ns tacs Read Command Set-Up Time 0 - 0 - 0 -| ns tacu Read Command Hald Time 0 - 0 - 0 -| ns W A-358TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Continued) TCS 14400AP/ TCS 14400AP/ TCS 14400AP/ SYMBOL PARAMETER AUASHAZ-70 AMASMVAZ-80 ANASI/AZ-10 UNITS! NOTES MIN, MAX. MIN. MAX. MIN. MAX. tenn iii Hoid Time referenced 0 7 0 _ 0 . ns i" twen Write Command Hold Time 15 - 15 ~ 20 - ns twe Write Command Pulse Width 15 = 15 - 20 - ns trwe Write Command to RAS Lead Time 20 - 20 ~ 25 - ns tow Write Command to CAS Lead Time 20 - 20 - 25 - ns tos Data Set-Up Time 0 - 0 - 0 - ns 12 ton Data Hold Time 15 - 5 - 20 ~- ns 12 trer Refresh Period - 16 - 16 - 16] ms twes Write Command Set-UP Time 0 - 0 - 0 - ns 13 tewo CAS to WRITE Delay Time 50 - 50 - 60 - ns 13 tawo RAS to WRITE Delay Time 100 - 110 - 135 - ns 13 tawo Column Address to WRITE Delay Time 65 - 70 ~ 85 - ns 13 tepwo TAS Precharge to WRITE Delay Time 70 - 75 - 90 - ns 13 tes CAS Set-Up Time 5 . 5 . 5 _ as (TAS before RAS Cycle) tena CAS Hold Time 15 - 15 ~ 20 - ns (TAS before RAS Cycle) trec RAS to CAS Precharge Time 0 - 0 - 0 - ns wr [Sierra | | - | a} - | ef - fo trou WAS Hold Time referenced to OF | 10 - 10 - 20 - ns tora DE Access Time - 20/ - 20 - 25] ns toep DE to Data Delay 20 - 20 - 25 - ns tocz Output buffer turn off Delay Time 0 20 0 20 0 20] ns 7 from OE torr GE Command Hold Time 20 - 20 - ; 25 - ns twrs Write Commamd Set-Up Time 10 . 10 _ 10 . ns . | (Test Mode tn) tucrn Write Commamd Hold Time 10 . 10 . 10 . as (Test Mode In) twa WRITE to RAS Precharge Time 10 . 10 _ 10 _ ns (TAS before RAS Cycle) tm WRITE to RAS Hold Time 10 . 10 _ 10 _ as (CAS before RAS Cycle) A-359TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS IN THE TEST MODE TCS 14400AP/ + TCS 14400AP/ TC514400APy SYMBOL PARAMETER AMASIIAZ-70 AVASVAZ-80 AJIASHAZ-10 UNITS| NOTES MIN. MAX, MIN. MAX, MIN, MAX. tre Random Read or Write Cycle Time 135 - 155 -) 185 - ns taaw Read-Modify-Write Cycle Time 190 - 210 - 250 - ns tec Fast Page Mode Cycle Time 50 - 55 - 65 - ns tera ete nn meas Cycle Read-Modify- 405 . 110 . 130 _ ns trac Access Time from RAS - 75 ~ 85 - 105 | ns a teac Access Time from TAS 25 ~ 25 - 30] ns 9,14 tas Access Time from Column Address ~ 40 ~ 45 - 551 ns 9,15 ters Access Time from TAS Precharge - 45 - 50 - 60] ns 9 tras RAS Pulse Width 73 10,000 as 10,000 105 10,000] ns trasp RAS Pulse Width (Fast Page Mode) 75 200,000 as 200,000 105 200,000 | ns tasH RAS Hold Time 25 - 25 - 30 - ns tes CAS Hold Time 95 - 85 - 105 - ns truep CAS Precharge to RAS Hold Time 45 - 50 - 60 - ns teas TAS Pulse Width 25 40,000 25 10,000 30 10,000) ns tra Column Address ta RAS Lead Time 40 - 45 - 55 - ns tewo CAS to WRITE Delay Time 55 55 - 65 - ns 13 tawo RAS ta WRITE Delay Time 105 - 115 - 140 - ns 13 tawp Column Address to WRITE Delay Time 70 - 75 - 90 - ns 13 teewo TAS Precharge to WRITE Delay Time 75 - 80 - 95 - ns 13 toEA GE Access Time - 25 - 25 - 30] ns toen OE Command Hold Time 25 - 25 ~ 30 - ns CAPACITANCE (Vcc = 5V 410%, f= 1MHz, Ta= 0~70c) SYMBOL PARAMETER MIN. MAX, UNIT Cy input Capacitance (A0~A9) - 5 pF Gz Input Capacitance (RAS, CAS, WAITE, OF) > 7 pF Co inpuvOutpyt Capacitance (/01~1/04) - 7 pF A-3601TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 NOTES: 1, Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. All voltages are referenced to Vgs. Ie1, Iec3, Ieca, Ices depend on cycle rate. Icc1, Icca depend on output loading. Specified values are obtained with the output open. Column address can be changed once or less while RAS=Vj, and CAS=Vyy. A.7 Ff ON An initial pause of 200us is required after power-up followed by 8 RAS only refresh cycles before proper device operation is achieved. In case of using internal refresh counter, a minimum of 8 CAS before RAS refresh cycles instead of 8 RAS only refresh cycles are required. 7. AC measurements assume tr=5ns. 8. Vin (min.) and Vy, (max.) are reference levels for measuring timing of input signals. Also, transition times are measured between Viy and Viz. 9. Measured with a load equivalent to 2 TTL loads and 100pF. 10. torr (max.) and togz (max.) define the time at which the output achieves the open circuit condition and are not referenced to output voltage levels. 11. Either tpcH or trrH must be satisfied for a read cycle. 12, These parameters are referenced to CAS leading edge in early write cycles and to WRITE leading edge in Read-Modify-Write cycles. 13. twes, tRwWD, tcwp, tawp and tcpwp are not restrictive operating parameters. They are included in the data sheet as electrical characteristics only. If twes@twcs{min.), the cycle is an early write cycle and the data out pin will remain open circuit (high impedance) through the entire cycle; If tnwp=trwp (min.), town&tcwp (min.)}, tawp=tawp (min.) and tcpwo2tcpwop (min.) (Fast Page Mode), the cycle is a Read-Modify-Write cycle and the data out will contain data read from the selected cell: If neither of the above sets of conditions is satisfied, the condition of the data out(at access time) is indeterminate. 14. Operation within the trcp (max,) limit insures that tnac (max.)can be met. trcp (max.) is specified as a reference point only: If trop is greater than the specified trcp (max.) + limit, then access time is controlled by tcac. 15, Operation within the trap (max.) limit insures that trac {max.) can be met, trap (max.)is specified as a reference point only: If trap is greater than the specified trap (max,) limit, then access time is controlled by taa. A-361TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 READ CYCLE A0~AY COLUMN AT IH vol ~VO4 Vo, DATA - OUT Ai: "H or L A-362TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 WRITE CYCLE (EARLY WRITE) COLUMN tow DATA-IN OPEN AE H* or L A-363TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ-80 TC514400AP/AJ/ASJ/AZ10 WRITE CYCLE (OE CONTROLLED WRITE) AD~AG COLUMN Vqy vol _ DATA - IN ~l04 vy FA: "H" of L A-364TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 READ-MODIFY-WRITE CYGLE Vie Wl Vic Vin TAS Vio Vin A0~AI Vie COLUMN i Vii Vig Vil om, VVOH voi OATA-IN ~VO4& VIIOL FA: H" of "L A-365TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJU/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 FAST PAGE MODE READ CYCLE Vin AA: H" or "1" A-366TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 FAST PAGE MODE WRITE CYCLE Vir Vin Vin vo 0. Vin ~VO4 Diy N Vin 1M A: "H or L A-367TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 FAST PAGE MODE READ-MODIFY-WRITE CYCLE fH Vv AO~AD Van Vin WRITE Vin Vin Vin VO1~ Yvon vo4 Vuot *1 Dour *2 Dour2 *3 DourN AA: H or L* A-368TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 RAS ONLY REFRESH CYCLE a Sy F*A en aT 7 0 TD QI Note: WRITE, OF ="H" or L yy) "HH" of *L" : RC tre tre tras y Viu f * RAS Vin __/ N \ tesr wn FN __ azz twap wi one "Dy ~~ EEL: YOI~ Vo PEN vor yy Ss Note: OE, AO~A9="H" or L A-369TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 BIDDEN REFRESH CYCLE (READ AO~Ad A-370TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 HIDDEN REEFRESH CYCLE (WRITE J 2 RE tec tras a! taas It \ YooN V t t torp trep BSH ne CHR | In Viq os ) CAS / trap N Vi. tase. cts t > roa FY od om QVM om * Wp 8 WY VVVWIYJIIIIVy VJW/ 7-7; YJ iS E i a 77 ep : H" of "Ll" A-371TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 CAS BEFORE RAS REFRESH COUNTER TEST CYCLE Vig RAS Viv cas Vir Vie A0~AQ COLUMN Vit tan READ CYCLE Vin WRITE Vin OE Vin Vin vor Vou ~WO4 y DATA- OUT oO WRITE CYCLE vol Vin ~l104 DATA-1N Vi READ-MODIFY-WRITE CYCLE V wre |" Vit Vv oe YN" vu. tos tou voi Vuow- ~VO4 Vv DATA-IN VOL A-OUT FA: H or L* A-372TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 WRITE, CAS BEFORE RAS REFRESH CYCLE tre Viw oo x yO" am ome Yn, eae Note: OE, AO~AQ=H" or L ND a] tesr \ | eareaaaaa OFF b | weaeee===ZZz A : HH or L A-373TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 TEST MODE The TC514400AP/AJ/ASJ/AZ is the RAM organized 1,048,576 words by 4 bits, it is internally organized 524,288 words by 8 bits. In Test Mode, data are written into 8 sectors in parallel and retrieved the same way. AOc is not used. If, upon reading, two bits on one I/O pin are equal (all 1"s or O"s), the YO pin indicates a1. If they were not equal, the I/O pin would indicate a 0. Fig.l shows the block diagram of TC514400AP/AJ/ASJ/AZ. In Test Mode, the 1MxX4 DRAM can be tested as if it were a 512KX4 DRAM. _ WRITE, CAS Before RAS Refresh Cycle puts the device into Test Mode. And"CAS Before RAS Refresh Cycle or RAS Only Refresh Cycle puts it back into Normal Mode. In the Test Mode, WRITE, CAS Before RAS Refresh Cycle Performs the refresh operation with the internal refresh address counter. The Test Mode function reduces test times (1/2 in case of N test pattern). A-374TC514400AP/AJ/ASJ/AZ70, TC514400AP/AJ/ASJ/AZ80 TC514400AP/AJ/ASJ/AZ10 BLOCK DIAGRAM IN THE TEST MODE Age Vee LE 512K block Test vol 12K block Test . Normal o Aoc Aoc Vee Aoc ic , Normal Normal PSS 512K block yy) oo | o--4 | z Test H Ao D vo2 Test 512K block y Test ~ 5 Dp Ld J Normat Ll 7 Agc Aoc Vee Normal 512K block Test 4O3 512K block Test Normal Agc Aoc Vec _. Aoc G . | Normat Normal 512K block ) > | een a est Boe H vod Test I $12K block | . Test = 7 De Leanne) Normal cy - Aac Fig. 1 A-375