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' & & - /C - ! / " ; " ' /& / & - ! ! & 3)F L91+9)177JJ*)7 )77)L997 1;L31 3191M+91;+G1)9 : )9N;7*G:7>;4: 7) G 1 );+G1L997 1)F19*37 4G N7F 71F)9+9 *: G9+:9+)1++GN ) 3)F L91 31*)+7N3GG7) ;77N*9*: 7*1;41G4G1F)9+1 *G;7*17 G)9*)71I:17 G>1;F)97N91)7L3 )119 .SUBCKT MCP6021 1 2 3 4 5 * | | | | | * | | | | Output * | | | Negative Supply * | | Positive Supply * | Inverting Input * Non-inverting Input * * Macromodel for the MCP6021/2/3/4 op amp family: * MCP6021 (single) * MCP6022 (dual) * MCP6023 (single w/ CS; chip select is not modeled) * MCP6024 (quad) * * Revision History: * REV A: 10-02-01 created KEB * * Recommendations: * Use PSPICE (or SPICE 2G6; other simulators may require translation) * For a quick, effective design, use a combination of: data sheet * specs, bench testing, and simulations with this macromodel * For high impedance circuits, set GMIN=100F in the .OPTIONS * statement * * Supported: * Typical performance at room temperature (25 degrees C) * DC, AC, Transient, and Noise analyses. * Most specs, including: offsets, DC PSRR, DC CMRR, input impedance, * open loop gain, voltage ranges, supply current, ... , etc. * * Not Supported: * Chip Select (MCP6023) * Variation in specs vs. Power Supply Voltage * Distortion (detailed non-linear behavior) * Temperature analysis * Process variation * Behavior outside normal operating region * * Input Stage V10 3 10 -0.6 R10 10 11 1.63K R11 10 12 1.63K C11 11 12 222F C12 1 0 6P E12 1 14 POLY(2) 26 0 27 0 0 1 1 I12 14 0 1.5P M12 11 14 15 15 NMI C13 14 2 3P M14 12 2 15 15 NMI I14 2 0 0.5P C14 2 0 6P ! I15 15 4 500U V16 16 4 0.36 D16 16 15 DL V13 3 13 -80M D13 14 13 DL * * PSRR and CMRR G26 0 26 POLY(1) 3 4 -308U 56U R26 26 0 1 G27 0 27 POLY(2) 1 3 2 4 -240U 24U 24U R27 27 0 1 * * Open Loop Gain, Slew Rate G30 0 30 POLY(1) 12 11 0 1K R30 30 0 1 D31 30 31 DL E31 31 0 POLY(1) 3 4 57.2 8.33 D32 32 30 DL E32 0 32 POLY(1) 3 4 74.0 8.00 G33 0 33 POLY(1) 30 0 0 316 R33 33 0 1 C33 33 0 4.58M G34 0 34 POLY(1) 33 0 0 1 R34 34 0 1 C34 34 0 159P * * Output Stage G40 0 40 POLY(1) 47 5 0 10 D41 40 41 DL R41 41 0 1K D42 42 40 DL R42 42 0 1K G43 3 0 POLY(1) 41 0 500U 1M G44 0 4 POLY(1) 42 0 500U -1M D45 47 45 DLS E45 45 0 POLY(2) 3 0 41 0 -20M 1 -20.4M E46 46 0 POLY(2) 4 0 42 0 20M 1 -20.4M D46 46 47 DLS G47 0 47 POLY(3) 3 0 4 0 34 0 0 8M 8M 16M R47 47 0 62.5 R48 47 5 0.1 C48 5 0 2P * * Models .MODEL NMI NMOS L=2 W=75 AF=1 KF=0.1F .MODEL DL D N=1 IS=1F .MODEL DLS D N=10M IS=1F * .ENDS MCP6021 ! & !0 0 + XXXXXXXX XXXXXNNN YYWW MCP6021 I/PNNN YYWW XXXXXXXX XXXXYYWW NNN MCP6021 I/SNYYWW NNN XXXXXX XXXXXX YWWNNN MM###M OO 6021 YWWNNN 0 !,5 ! 8(8 (5, N O5 8 ! . )! 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H " H " '/ 7 ' !;- " ;! !))!*+ - ! ; ;+*;+*- ; +* 19; +* 9 ; +9) 1; RG ; 11G; +G4! 1-/ !! !* * - !! -6 & ! :! 1! ;*+;* + --;F G/; M1; - ; )OH[9); IX]]\G4; +; +G7R; +G4; +**; +*1; +*1 ; *1+*; / - ; F ; 1*)7))7 )9; ! !- + ! -6 & ! : Q !I6 -+ --2I +5 ' -6 & ! : ! -6 - ! ' - S ; :;9 9 ' ! & !; + ! >#&$&/./"$001 Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro 8-bit MCUs, K L "code hopping devices, Serial EEPROMs and microperipheral products. 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