1
MRF5015MOTOROLA RF DEVICE DATA
The RF MOSFET Line
N–Channel Enhancement–Mode
Designed for broadband commercial and industrial applications at frequen-
cies to 520 MHz. The high gain and broadband performance of this device
makes it ideal for large–signal, common source amplifier applications in 12.5
volt mobile, and base station FM equipment.
•Guaranteed Performance at 512 MHz, 12.5 Volts
Output Power — 15 Watts
Power Gain — 10 dB Min
Efficiency — 50% Min
•Characterized with Series Equivalent Large–Signal Impedance Parameters
•S–Parameter Characterization at High Bias Levels
•Excellent Thermal Stability
•All Gold Metal for Ultra Reliability
•Capable of Handling 20:1 VSWR, @ 15.5 Vdc, 512 MHz, 2 dB Overdrive
•Circuit board photomaster available upon request by contacting
RF Tactical Marketing in Phoenix, AZ.
MAXIMUM RATINGS
Rating Symbol Value Unit
Drain–Source Voltage VDSS 36 Vdc
Drain–Gate Voltage (RGS = 1 MΩ) VDGR 36 Vdc
Gate–Source Voltage VGS ±20 Vdc
Drain Current — Continuous ID6 Adc
Total Device Dissipation @ TC = 25°C
Derate above 25°CPD50
0.29 Watts
W/°C
Storage Temperature Range Tstg – 65 to +150 °C
Operating Junction Temperature TJ200 °C
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance, Junction to Case RθJC 3.5 °C/W
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage (VGS = 0, ID = 5 mAdc) V(BR)DSS 36 — — Vdc
Zero Gate Voltage Drain Current (VDS = 15 Vdc, VGS = 0) IDSS — — 5 mAdc
Gate–Source Leakage Current (VGS = 20 Vdc, VDS = 0) IGSS — — 2 µAdc
(continued)
NOTE – CAUTION – MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
Order this document
by MRF5015/D
SEMICONDUCTOR TECHNICAL DATA
15 W, 512 MHz, 12.5 VOLTS
N–CHANNEL BROADBAND
RF POWER FET
CASE 319–07, STYLE 3
Motorola, Inc. 1994
REV 6
MRF5015
2MOTOROLA RF DEVICE DATA
ELECTRICAL CHARACTERISTICS — continued (TC = 25°C unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 10 mAdc) VGS(th) 1.25 2.3 3.5 Vdc
Drain–Source On–V oltage
(VGS = 10 Vdc, ID = 1 Adc) VDS(on) — — 0.375 Vdc
Forward T ransconductance
(VDS = 10 Vdc, ID = 1 Adc ) gfs 1.2 — — S
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Ciss —33 — pF
Output Capacitance
(VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Coss —74 — pF
Reverse T ransfer Capacitance
(VDS = 12.5 Vdc, VGS = 0, f = 1 MHz) Crss 78.8 10.8 pF
FUNCTIONAL TESTS (In Motorola Test Fixture)
Common–Source Amplifier Power Gain
(VDD = 12.5 Vdc, Pout = 15 W, f = 512 MHz
IDQ = 100 mA) f = 175 MHz
Gps 10
—11.5
15 —
—
dB
Drain Efficiency
(VDD = 12.5 Vdc, Pout = 15 W, f = 512 MHz
IDQ = 100 mA) f = 175 MHz
η50
—55
55 —
—
%
Load Mismatch
(VDD = 15.5 Vdc, 2 dB Overdrive, f = 512 MHz,
Load VSWR = 20:1, All Phase Angles at Frequency of Test)
ψNo Degradation in Output Power
B1, B2 Ferrite Bead, Fair Rite Products
C1, C13 10 µF, 50 V, Electrolytic
C2, C12 0.1 µF, Chip Capacitor
C3, C4, C10, C11 120 pF, Chip Capacitor
C5, C9 0 to 20 pF, Trimmer Capacitor
C6 36 pF, Chip Capacitor
C7 43 pF, Chip Capacitor
C8 30 pF, Chip Capacitor
L1, L2 7 T urns, 24 AWG 0.116″ ID
N1, N2 Type N Flange Mount
R1 1 kΩ, 1/4 W, Carbon
R2 470 kΩ, 1/4 W, Carbon
R3 160 Ω, 0.1 W Chip
Z1, Z11 T ransmission Line*
Z2 T ransmission Line*
Z3 T ransmission Line*
Z4 T ransmission Line*
Z5 T ransmission Line*
Z6 T ransmission Line*
Z7, Z8 Transmission Line+
Z9 T ransmission Line*
Z10 T ransmission Line*
Board Glass Teflon 0.060″
+ Part of Capacitor Mount Socket
*See Photomaster
Figure 1. 512 MHz Narrowband Test Circuit Electrical Schematic
C4
B1
Z6
RF
Input N1
VGG R1
C5
Z3
Z1 Z2 RF
Output
N2
Z11C10Z10Z9
VDD
C13
C11
C12
C3
L1 L2
C9
C8
Z8Z7 DUT
C7
Z5 C6
R3
Z4
R2 C1 C2
B1
Socket
++
3
MRF5015MOTOROLA RF DEVICE DATA
TYPICAL CHARACTERISTICS
Typical Device Shown
VDS = 10 V
Typical Device Shown
VDD = 12.5 V
Pin = 1.5 W
f = 520 MHz
1 W
0.5 W
Pin = 1.5 W
IDQ = 100 mA
f = 520 MHz
VDD = 12.5 V
IDQ = 100 mA
520 MHz
470 MHzf = 400 MHz
2.5
Figure 2. Output Power versus Input Power
25
Pin, INPUT POWER (WATTS)
5
01
10
20
15
Figure 3. Output Power versus Supply Voltage
25
08VDD, SUPPLY VOLTAGE (VOLTS)
10
20
10
5
120.5 1.5 2 14
15
P
out, OUTPUT POWER (WATTS)
ID, DRAIN CURRENT (AMPS)
Figure 4. Output Power versus Gate Voltage
25
0VGS, GATE–SOURCE VOLTAGE (VOLTS)
10
526
15
20
Figure 5. Drain Current versus Gate Voltage
2
0
VGS, GATE–SOURCE VOLTAGE (VOLTS)
0.8
14
1.8
1.6
2
134 3
616
0
0
5
0.2
0.4
0.6
1
1.2
1.4
P
out, OUTPUT POWER (WATTS)
P
out, OUTPUT POWER (WATTS)
ID = 1.5 A
ID = 0.25 A
ID = 0.05 A
VDD = 12.5 V
Coss
Ciss
Crss
VGS = 0
f = 1 MHz
30
Figure 6. Capacitance versus Voltage
200
VDS, DRAIN–SOURCE VOLTAGE (VOL TS)
50
010
100
150
Figure 7. Gate–Source Voltage
versus Case Temperature
1.04
0.94 0TC, CASE TEMPERATURE (
°
C)
25
1.03
1.01
0.99
5051520 75
1.02
C, CAPACITANCE (pF)
– 25 1000
VGS, GATE-SOURCE VOLTAGE (NORMALIZED)
25
1.00
0.98
0.96
0.95
0.97
125 150 175
ID = 0.5 A
ID = 1 A
MRF5015
4MOTOROLA RF DEVICE DATA
TYPICAL CHARACTERISTICS
Figure 8. DC Safe Operating Area
f
(MHz) Zin
(Ω)ZOL*
(Ω)
400
420
440
460
2.0 – j6.1
1.6 – j4.7
1.8 – j5.3
1.5 – j4.2
1.3 – j0.4
1.4 – j0.4
1.5 – j0.4
1.5 – j0.3
VDD = 12.5 V, IDQ = 100 mA, Pout = 15 W
480 1.4 – j3.8 1.5 – j0.2
500 1.3 – j3.6 1.4 – j0.1
520 1.2 – j3.5 1.3 + j0.1
Zin = Conjugate of source impedance with
parallel 160 Ω resistor and 36 pF capacitor
in series with gate.
ZOL* = Conjugate of the load impedance at given
output power, voltage and frequency that
produces maximum gain.
Figure 9. Series Equivalent Input and Output Impedance
10
1VDS, DRAIN–SOURCE VOLTAGE (VOL TS)
1
0.1 10010
ID, DRAIN CURRENT (AMPS)
TC = 25
°
C
Zin
f = 400 MHz
ZOL*
f = 400 MHz
Zo = 10
Ω
520
460
520 460
5
MRF5015MOTOROLA RF DEVICE DATA
Table 1. Common Source Scattering Parameters (VDS = 12.5 V)
ID = 50 mA
f S11 S21 S12 S22
MHz |S11|∠φ|S21|∠φ|S12|∠φ|S22|∠φ
50
100
200
300
400
500
700
850
1000
0.63
0.62
0.70
0.78
0.84
0.88
0.93
0.95
0.96
–123
–142
–152
–157
–162
–165
–171
–175
–178
8
4
1.8
1.1
0.70
0.49
0.28
0.20
0.15
100
82
61
47
36
28
17
13
10
0.063
0.063
0.056
0.046
0.037
0.029
0.016
0.010
0.007
11
–6
–23
–35
–42
–46
–45
–31
11
0.79
0.82
0.86
0.90
0.93
0.94
0.97
0.97
0.98
–149
–162
–169
–171
–174
–175
–179
179
178
ID = 100 mA
f S11 S21 S12 S22
MHz |S11|∠φ|S21|∠φ|S12|∠φ|S22|∠φ
50
100
200
300
400
500
700
850
1000
0.67
0.66
0.71
0.77
0.82
0.86
0.91
0.93
0.95
–136
–153
–160
–163
–165
–168
–173
–176
–179
9.1
4.6
2.2
1.3
0.89
0.64
0.37
0.27
0.20
99
84
66
54
44
36
25
20
16
0.047
0.048
0.043
0.037
0.031
0.025
0.015
0.010
0.009
10
–3
–17
–26
–32
–35
–30
–11
25
0.82
0.85
0.87
0.90
0.92
0.94
0.96
0.97
0.98
–158
–168
–172
–174
–175
–177
–179
179
177
ID = 500 mA
f S11 S21 S12 S22
MHz |S11|∠φ|S21|∠φ|S12|∠φ|S22|∠φ
50
100
200
300
400
500
700
850
1000
0.81
0.81
0.82
0.84
0.86
0.88
0.91
0.93
0.94
–150
–164
–170
–173
–174
–175
–178
180
178
11.1
5.6
2.7
1.7
1.2
0.92
0.57
0.43
0.33
98
86
73
63
55
47
35
29
23
0.027
0.027
0.025
0.023
0.020
0.018
0.013
0.013
0.014
11
2
–5
–9
–9
–7
7
26
44
0.85
0.87
0.88
0.89
0.91
0.92
0.94
0.95
0.96
–168
–174
–176
–177
–178
–179
180
178
177
ID = 2.5 A
f S11 S21 S12 S22
MHz |S11|∠φ|S21|∠φ|S12|∠φ|S22|∠φ
50
100
200
300
400
500
700
850
1000
0.86
0.85
0.86
0.87
0.89
0.91
0.93
0.94
0.95
–144
–161
–170
–173
–175
–176
–179
179
177
10.1
5.2
2.5
1.6
1.1
0.84
0.52
0.39
0.30
101
88
74
64
55
48
37
30
26
0.022
0.022
0.021
0.019
0.017
0.015
0.013
0.014
0.016
15
5
–1
–4
–2
2
22
39
52
0.85
0.87
0.89
0.90
0.91
0.93
0.95
0.96
0.96
–171
–175
–177
–178
–178
–179
179
178
176
MRF5015
6MOTOROLA RF DEVICE DATA
DESIGN CONSIDERATIONS
The MRF5015 is a common–source, RF power, N–Chan-
nel enhancement mode, Metal–Oxide Semiconductor Field–
Effect Transistor (MOSFET). Motorola RF MOSFETs feature
a vertical structure with a planar design. Motorola Application
Note AN211A, “FETs in Theory and Practice,” is suggested
reading for those not familiar with the construction and char-
acteristics of FETs.
This device was designed primarily for 12.5 volt VHF and
UHF power amplifier applications. The major advantages of
RF power MOSFETs include high gain, simple bias systems,
relative immunity from thermal runaway, and the ability to
withstand severely mismatched loads without suffering dam-
age.
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors
between all three terminals. The metal oxide gate structure
determines the capacitors from gate–to–drain (Cgd), and
gate–to–source (Cgs). The PN junction formed during fab-
rication of the RF MOSFET results in a junction capacitance
from drain–to–source (Cds). These capacitances are charac-
terized as input (Ciss), output (Coss) and reverse transfer
(Crss) capacitances on data sheets. The relationships be-
tween the inter–terminal capacitances and those given on
data sheets are shown below. The Ciss can be specified in
two ways:
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and
2. zero volts at the gate.
In the latter case, the numbers are lower . However, neither
method represents the actual operating conditions in RF ap-
plications.
Drain
Cds
Source
Gate
Cgd
Cgs
Ciss = Cgd + Cgs
Coss = Cgd + Cds
Crss = Cgd
DRAIN CHARACTERISTICS
One critical figure of merit for a FET is its static resistance
in the full–on condition. This on–resistance, Rds(on), occurs
in the linear region of the output characteristic and is speci-
fied at a specific gate–source voltage and drain current. The
drain–source voltage under these conditions is termed
Vds(on). For MOSFETs, Vds(on) has a positive temperature
coefficient at high temperatures because it contributes to the
power dissipation within the device.
GATE CHARACTERISTICS
The gate of the RF MOSFET is a polysilicon material, and
is electrically isolated from the source by a layer of oxide.
The input resistance is very high, on the order of 109 Ω, re-
sulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage to
the gate greater than the gate–to–source threshold voltage,
VGS(th).
Gate Voltage Rating – Never exceed the gate voltage rat-
ing. Exceeding the rated V GS can result in permanent dam-
age to the oxide layer in the gate region.
Gate Termination – The gates of these devices are es-
sentially capacitors. Circuits that leave the gate open–cir-
cuited or floating must be avoided. These conditions can
result in turn–on of the devices due to voltage build–up on
the input capacitor due to leakage currents or pickup.
Gate Protection – These devices do not have an internal
monolithic zener diode from gate–to–source. If gate protec-
tion is required, an external zener diode is recommended
with appropriate RF decoupling networks.
Using a resistor to keep the gate–to–source impedance
low also helps dampen transients and serves another impor-
tant function. Voltage transients on the drain can be coupled
to the gate through the parasitic gate–drain capacitance. If
the gate–to–source impedance and the rate of voltage
change on the drain are both high, then the signal coupled to
the gate may be large enough to exceed the gate–threshold
voltage and turn the device on.
DC BIAS
Since the MRF5015 is an enhancement mode FET, drain
current flows only when the gate is at a higher potential than
the source. See Figure 5 for a typical plot of drain current
versus gate voltage. RF power FETs operate optimally with a
quiescent drain current (IDQ), whose value is application de-
pendent. The MRF5015 was characterized at IDQ = 100 mA,
which is the suggested value of bias current for typical ap-
plications. For special applications such as linear amplifica-
tion, IDQ may have to be selected to optimize the critical
parameters.
The gate is a dc open circuit and draws essentially no cur-
rent. Therefore, the gate bias circuit may generally be just a
simple resistive divider network. Some special applications
may require a more elaborate bias system.
GAIN CONTROL
Power output of the MRF5015 may be controlled to some
degree with a low power dc control signal applied to the gate,
thus facilitating applications such as manual gain control,
ALC/AGC and modulation systems. Figure 4 is an example
of output power variation with gate–source bias voltage with
Pin held constant. This characteristic is very dependent on
frequency and load line.
7
MRF5015MOTOROLA RF DEVICE DATA
AMPLIFIER DESIGN
Impedance matching networks similar to those used with
bipolar transistors are suitable for the MRF5015. For exam-
ples see Motorola Application Note AN721, “Impedance
Matching Networks Applied to RF Power Transistors.” Both
small–signal S–parameters and large–signal impedances
are provided. While the S–parameters will not produce an
exact design solution for high power operation, they do yield
a good first approximation. This is an additional advantage of
RF power MOSFETs.
Since RF power MOSFETs are triode devices, they are not
unilateral. This coupled with the very high gain of MRF5015
yield a device quite capable of self oscillation. Stability may
be achieved by techniques such as drain loading, input shunt
resistive loading, or output to input feedback. Different
stabilizing techniques may be required depending on the
desired gain and bandwidth of the application. The RF test
fixture implements a parallel resistor and capacitor in series
with the gate to improve stability and input impedance Q.
Two port stability analysis with the MRF5015 S–parame-
ters provides a useful tool for selection of loading or feed-
back circuitry to assure stable operation. See Motorola
Application Note AN215A, “RF Small–Signal Design Using
Two–Port Parameters,” for a discussion of two port network
theory and stability.
MRF5015
8MOTOROLA RF DEVICE DATA
PACKAGE DIMENSIONS
CASE 319–07
ISSUE M
0.965
0.355
0.230
0.115
0.102
0.075
0.160
0.004
0.090
0.225
0.125
0.985
0.375
0.260
0.125
0.114
0.085
0.170
0.006
0.110
0.241
0.135
24.52
9.02
5.85
2.93
2.59
1.91
4.07
0.11
2.29
5.72
3.18
25.01
9.52
6.60
3.17
2.90
2.15
4.31
0.15
2.79
6.12
3.42
MM
MIN MINMAX MAX
INCHES MILLIMETER
DIM
A
B
C
D
E
F
H
J
K
L
N
Q
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
0.725 BSC 18.42 BSC
SEATING
PLANE
IDENTIFICATION
NOTCH
12 3
456
F
J
B
HE
K
L
0.15 (0.006) T A N
M
-A-
-N-
-T-
Q 2 PL
D 2 PL
MM
0.38 (0.015) T A N
M
MM
0.38 (0.015) T A N
M
C
PIN 1. SOURCE (COMMON)
2. GATE (INPUT)
3. SOURCE (COMMON)
4. SOURCE (COMMON)
5. DRAIN (OUTPUT)
6. SOURCE (COMMON)
STYLE 3:
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability , including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “T ypicals” must be validated for each customer application by customer’s technical experts. Motorola does
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MRF5015/D
*MRF5015/D*
◊
