DATA SH EET
Product specification
Supersedes data of 2001 Apr 19 2002 Jul 02
INTEGRATED CIRCUITS
TDA8766
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter
2002 Jul 02 2
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
FEATURES
•10-bit resolution
•3.0 to 5.25 V operation
•Sampling rate up to 20 MHz
•DC sampling allowed
•High signal-to-noise ratio over a large analog input
frequency range (9.3 effective bits at 1.0 MHz; full-scale
input at fclk = 20 MHz)
•In-Range (IR) CMOS output
•CMOS/TTL compatible digital inputs and outputs
•External reference voltage regulator
•Power dissipation only 53 mW (typical value)
•Low analog input capacitance, no buffer amplifier
required
•Standby mode
•No sample-and-hold circuit required.
APPLICATIONS
High-speed analog-to-digital conversion for:
•Video data digitizing
•Camera
•Camcorder
•Radio communication.
GENERAL DESCRIPTION
The TDA8766 is a 10-bit high-speed Analog-to-Digital
Converter (ADC) for professional video and other
applications. It converts with 3.0 to 5.25 V operation the
analoginputsignalinto10-bitbinary-codeddigitalwordsat
a maximum sampling rate of 20 MHz. All digital inputs and
outputs are CMOS compatible. A standby mode allows
reduction of the device power consumption down to 4 mW.
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VDDA analog supply voltage 3.0 3.3 5.25 V
VDDD1 digital supply voltage 1 3.0 3.3 5.25 V
VDDD2 digital supply voltage 2 3.0 3.3 5.25 V
VDDO output stages supply voltage 3.0 3.3 5.25 V
IDDA analog supply current −7.5 10 mA
IDDD digital supply current −7.5 10 mA
IDDO output stages supply current fclk = 20 MHz; CL= 20 pF; ramp
input −12mA
INL integral non-linearity fclk = 20 MHz; ramp input −±1±2 LSB
DNL differential non-linearity fclk = 20 MHz; ramp input −±0.25 ±0.7 LSB
fclk(max) maximum clock frequency 20 −−MHz
Ptot total power dissipation VDDA =V
DDD =V
DDO = 3.3 V −53 73 mW
TYPE
NUMBER PACKAGE
NAME DESCRIPTION VERSION
TDA8766G LQFP32 plastic low profile quad flat package; 32 leads; body 5 ×5×1.4 mm SOT401-1
2002 Jul 02 3
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
BLOCK DIAGRAM
handbook, full pagewidth
19
10
14
RLAD
11
15
VRB
VSSA VSSD2 VSSO VSSD1
VRM
VRT
VI
18
VDDD2
7
2
VDDA
28
29
30
31
27 D4
D5
D6
D7
D8
26
25
1
6
D3
D2
23 D1
22 D0
D9
IN-RANGE LATCH
CMOS
OUTPUTS
LATCHES
ANALOG -TO - DIGITAL
CONVERTER
CLOCK DRIVER
MLC853
CMOS
OUTPUT
5
CLK
16
OE
STDBY
TDA8766
20 VDDO
9
analog
ground digital
ground 2
321
output
ground digital
ground 1
analog
voltage input data outputs
LSB
MSB
4VDDD1
IR output
Fig.1 Block diagram.
2002 Jul 02 4
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
PINNING
SYMBOL PIN DESCRIPTION
D9 1 data output; bit 9 (MSB)
IR 2 in-range data output
VSSD1 3 digital ground 1
VDDD1 4 digital supply voltage 1 (3.0 to 5.25 V)
CLK 5 clock input
STDBY 6 standby mode input
VDDA 7 analog supply voltage (3.0 to 5.25 V)
n.c. 8 not connected
VSSA 9 analog ground
VRB 10 reference voltage BOTTOM input
VRM 11 reference voltage MIDDLE input
n.c. 12 not connected
n.c. 13 not connected
VI14 analog voltage input
VRT 15 reference voltage TOP input
OE 16 output enable input (active LOW)
n.c. 17 not connected
VDDD2 18 digital supply voltage 2 (3.0 to 5.25 V)
VSSD2 19 digital ground 2
VDDO 20 positive supply voltage for
output stage (3.0 to 5.25 V)
VSSO 21 output stage ground
D0 22 data output; bit 0 (LSB)
D1 23 data output; bit 1
n.c. 24 not connected
D2 25 data output; bit 2
D3 26 data output; bit 3
D4 27 data output; bit 4
D5 28 data output; bit 5
D6 29 data output; bit 6
D7 30 data output; bit 7
D8 31 data output; bit 8
n.c. 32 not connected
SYMBOL PIN DESCRIPTION
handbook, full pagewidth
TDA8766
MLC854
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
D9
IR
VDDD1
VSSD1
V
CLK
STDBY
DDA VDDD2
VSSD2
VDDO
VSSO
n.c.
n.c.
D1
D0
n.c.
n.c.
D8
D7
D6
D5
D4
D3
D2
SSA
n.c.
n.c.
OE
V
RB
V
RM
V
I
V
RT
V
Fig.2 Pin configuration.
2002 Jul 02 5
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
Note
1. The supply voltages VDDA, VDDD and VDDO may have any value between −0.3 and +7.0 V provided that the supply
voltage differences ∆VDD are respected.
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDDA analog supply voltage note 1 −0.3 +7.0 V
VDDD digital supply voltage note 1 −0.3 +7.0 V
VDDO output stages supply voltage note 1 −0.3 +7.0 V
∆VDD supply voltage difference
VDDA −VDDD −1.0 +4.0 V
VDDD −VDDO −1.0 +4.0 V
VDDA −VDDO −1.0 +4.0 V
VIinput voltage referenced to VSSA −0.3 +7.0 V
Vi(p-p) AC input voltage for switching
(peak-to-peak value) referenced to VSSD −VDDD V
IOoutput current −10 mA
Tstg storage temperature −55 +150 °C
Tamb ambient temperature −20 +75 °C
Tjjunction temperature −150 °C
SYMBOL PARAMETER CONDITIONS VALUE UNIT
Rth(jj-a) thermal resistance from junction to ambient in free air 90 K/W
2002 Jul 02 6
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
CHARACTERISTICS
VDDA =V
7to V9= 3.3 V; VDDD =V
4to V3=V
18 to V19 = 3.3 V; VDDO =V
20 to V21 = 3.3 V; VSSA,V
SSD and VSSO
short-circuited together; Vi(p-p) = 1.83 V; CL= 20 pF; Tamb = 0 to 70 °C; typical values measured atTamb =25°C; unless
otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supplies
VDDA analog supply voltage 3.0 3.3 5.25 V
VDDD1 digital supply voltage 1 3.0 3.3 5.25 V
VDDD2 digital supply voltage 2 3.0 3.3 5.25 V
VDDO output stages supply voltage 3.0 3.3 5.25 V
∆VDD voltage difference
VDDA −VDDD −0.2 −+0.2 V
VDDA −VDDO −0.2 −+0.2 V
VDDD −VDDO −0.2 −+0.2 V
IDDA analog supply current −7.5 10 mA
IDDD digital supply current −7.5 10 mA
IDDO output stages supply current fclk = 20 MHz;
ramp input; CL=20pF −12mA
P
tot total power dissipation operating; VDD = 3.3 V −53 73 mW
standby mode −4−mW
Inputs
CLOCK INPUT CLK (REFERENCED TO VSSD); note 1
VIL LOW-level input voltage 0 −0.3VDDD V
VIH HIGH-level input voltage VDDD ≤3.6 V 0.6VDDD −VDDD V
VDDD = 3.3 V 0.7VDDD −VDDD V
IIL LOW-level input current VCLK = 0.3VDDD −10+1µA
I
IH HIGH-level input current VCLK = 0.7VDDD −−5µA
Z
iinput impedance fclk = 20 MHz −4−kΩ
Ciinput capacitance fclk = 20 MHz −3−pF
INPUTS OE AND STDBY (REFERENCED TO VSSD); see Tables 1 and 2
VIL LOW-level input voltage 0 −0.3VDDD V
VIH HIGH-level input voltage VDDD ≤3.6 V 0.6VDDD −VDDD V
VDDD = 3.3 V 0.7VDDD −VDDD V
IIL LOW-level input current VIL = 0.3 VDDD −1−−µA
I
IH HIGH-level input current VIH = 0.7 VDDD −−1µA
ANALOG INPUT VI(REFERENCED TO VSSA)
IIL LOW-level input current VI=V
RB −0−µA
I
IH HIGH-level input current VI=V
RT −35 −µA
Z
iinput impedance fi= 1 MHz −5−kΩ
Ciinput capacitance fi= 1 MHz −8−pF
2002 Jul 02 7
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
Reference voltages for resistor ladder; see Table 3
VRB reference voltage BOTTOM 1.1 1.2 −V
VRT reference voltage TOP 3.0 3.3 VDDA V
Vdiff(ref) differential reference voltage
VRT −VRB
1.9 2.1 3.0 V
Iref reference current −7.2 −mA
RLAD ladder resistance −290 −Ω
TCRLAD temperature coefficient of ladder
resistance −539 −mΩ/K
−1860 −ppm
Voffset(B) offset voltage BOTTOM note 2 −135 −mV
Voffset(T) offset voltage TOP note 2 −135 −mV
VI(p-p) analog input voltage
(peak-to-peak value) note 3 1.66 1.83 2.35 V
Outputs
DIGITAL OUTPUTS D9 TO D0 AND IR (REFERENCED TO VSSD)
VOL LOW-level output voltage IO=1mA 0 −0.5 V
VOH HIGH-level output voltage IO=−1mA V
DDO −0.5 −VDDO V
IOZ output current in 3-state mode 0.5 V < VO<V
DDO −20 −+20 µA
Switching characteristics
CLOCK INPUT CLK; see Fig.4; note 1
fclk(max) maximum clock frequency 20 −−MHz
tCPH clock pulse width HIGH 15 −−ns
tCPL clock pulse width LOW 15 −−ns
Analog signal processing (fclk = 20 MHz)
LINEARITY
INL integral non-linearity ramp input; see Fig.6 −±1±2 LSB
DNL differential non-linearity ramp input; see Fig.7 −±0.25 ±0.7 LSB
INPUT SET RESPONSE; see Fig.8; note 4
tSTLH analog input settling time
LOW-to-HIGH full-scale square wave −46ns
t
STHL analog input settling time
HIGH-to-LOW full-scale square wave −46ns
HARMONICS; see Fig.9; note 5
THD total harmonic distortion fi= 1 MHz −−63 −dB
SIGNAL-TO-NOISE RATIO; see Fig.9; note 5
S/N signal-to-noise ratio (full-scale) without harmonics;
fi= 1 MHz −60 −dB
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
2002 Jul 02 8
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
Notes
1. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock
must not be less than 1 ns.
2. Analog input voltages producing code 0 up to and including 1023:
a) Voffset(B) (offset voltage BOTTOM) is the difference between the analog input which produces data equal to 00
and the reference voltage BOTTOM (VRB) at Tamb =25°C.
b) Voffset(T) (offset voltage TOP) is the difference between VRT (reference voltage TOP) and the analog input which
produces data outputs equal to 1023 at Tamb =25°C.
3. In order to ensure the optimum linearity performance of such converter architecture, the lower and upper extremities
of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
pins VRB and VRT via offset resistors ROB and ROT as shown in Fig.3.
a) Thecurrentflowing into theresistorladder is andthefull-scale input rangeatthe converter,
to cover code 0 to code 1023, is
b) Since RL, ROB and ROT have similar behaviour with respect to process and temperature variation, the ratio
will be kept reasonably constant from device to device. Consequently variation of the output
codes at a given input voltage depends mainly on the difference VRT −VRB and its variation with temperature and
supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the
matching between each of them is then optimized.
4. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale
input change (square-wave signal) in order to sample the signal and obtain correct output data.
EFFECTIVE BITS; see Fig.9; note 5
EB effective bits fi= 300 kHz −9.5 −bits
fi= 1 MHz −9.3 −bits
fi= 3.58 MHz −8.0 −bits
Timing (fclk = 20 MHz; CL= 20 pF); see Fig.4; note 6
tds sampling delay time −−5ns
t
houtput hold time 5 −−ns
tdoutput delay time VDDO = 4.75 V 8 12 15 ns
VDDO = 3.15 V 8 17 20 ns
3-state output delay times; see Fig.5
tdZH enable HIGH −14 18 ns
tdZL enable LOW −16 20 ns
tdHZ disable HIGH −16 20 ns
tdLZ disable LOW −14 18 ns
Standby mode output delay times
td(stb)LH standby LOW-to-HIGH transition −−200 ns
td(stb)HL start-up HIGH-to-LOW transition −−500 ns
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
ILVRT VRB
–
ROB RLROT
++
------------------------------------------
=
VIRLIL
×RL
ROB RLROT
++
------------------------------------------ VRT VRB
–()0.871 VRT VRB
–()×=×==
R
L
R
OB RLROT
++
-----------------------------------------
2002 Jul 02 9
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
5. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8k acquisition points per equivalent
fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(Nyquist frequency). Conversion to signal-to-noise ratio: S/N = EB ×6.02 + 1.76 dB.
6. Output data acquisition: the output data is available after the maximum delay time of td.
handbook, halfpage
RLAD
ROT
VRT
VRM
VRB
ROB
code 1023
code 0
MGD281
IL
RL
Fig.3 Converter reference resistor ladder.
2002 Jul 02 10
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
Table 1 Mode selection
Table 2 Standby selection
Table 3 Output coding and input voltage (typical values; referenced to VSSA)
OE D9 to D0 IR
1 high impedance high impedance
0 active (binary) active
STDBY D9 to D0 IDDA +I
DDD
1 last logic state 1.2 mA (typical value)
0 active 15 mA (typical value)
STEP VI(p-p) IR BINARY OUTPUT BITS
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Underflow <1.335 V 00000000000
0 1.335 V 10000000000
1 : 10000000001
: : :::::::::::
1022 : 11111111110
1023 3.165 V 11111111111
Overflow >3.165 V 01111111111
handbook, full pagewidth
ds
t
sample N + 1
sample N
CLK
MGD346
sample N + 2
50%
V
l
DATA
D0 to D9
td
th
CPH
tCPL
t
VDDO
0 V
50%
DATA
N + 1
DATA
N
DATA
N - 1
DATA
N - 2
Fig.4 Timing diagram.
2002 Jul 02 11
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
handbook, full pagewidth
MLC855
50 %
50 %
HIGH
LOW
dZH
t
dHZ
t
50 %
HIGH
LOW
dZL
t
dLZ
t
10 %
90 %
output
data
VDDD
output
data
3.3 kΩ
20 pF
S1
VDDD
TDA8766
OE
OE
TEST
dLZ
t
dZL
t
dHZ
t
dZH
S1
DDD
V
DDD
V
GND
GND
t
Fig.5 Timing diagram and test conditions of 3-state output delay time.
fOE = 100 kHz.
2002 Jul 02 12
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
handbook, full pagewidth
1023
−0.6 0 400 600 800 1000 1100200
MLD115
0.4
−0.2
−0.4
0.2
0
0.6
A
(LSB)
f (codes)
Fig.6 Typical Integral Non-Linearity (INL) performance.
handbook, full pagewidth
1023
−0.25 0 400 600 800 1000 1100200
MLD116
0.25
−0.05
−0.15
0.15
0.05
A
(LSB)
f (codes)
Fig.7 Typical Differential Non-Linearity (DNL) performance.
2002 Jul 02 13
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
handbook, full pagewidth
MBD875
50 %
STLH
t
5 ns
code 0
code 1023
I
50 %
2 ns
50 %
5 ns
STHL
t
50 %
2 ns
CLK
V
Fig.8 Analog input settling-time diagram.
handbook, full pagewidth
10
0
120 0 2.5 3.76 5.01 7.51 8.761.25 6.26
MLD117
40
80
100
60
20
A
(dB)
f (MHz)
Fig.9 Typical fast Fourier transform (fclk = 20 MHz; fi= 1 MHz).
Effective bits: 9.59; THD = −76.60 dB.
Harmonic levels (dB): 2nd = −81.85; 3rd = −87.56; 4th = −88.81; 5th = −88.96; 6th = −79.58.
2002 Jul 02 14
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
INTERNAL PIN CONFIGURATION
handbook, halfpage
MLC856
VDDO
VSSO
D9 to D0,
IR
Fig.10 D9 to D0 and IR outputs.
handbook, halfpage
MLC857
VDDA
VSSA
VI
Fig.11 VI analog input.
handbook, halfpage
MLC858
OE,
STDBY
VDDO
VSSO
Fig.12 OE and STDBY inputs.
handbook, halfpage
R
MLC859
VRB
VRM
VDDA
VSSA
VRT
LAD
Fig.13 VRB,V
RM and VRT inputs.
2002 Jul 02 15
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
handbook, halfpage
VDDD
VSSD
CLK
MLC860
1/2VDDD
Fig.14 CLK input.
2002 Jul 02 16
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
APPLICATION INFORMATION
Additional application information will be supplied upon request (please quote number
“AN00014”
).
handbook, full pagewidth
TDA8766
MLC861
1
2
3
4
24
23
22
21
20
19
18
17
9
D9
IR
VDDD1
VSSD1
V
CLK
STDBY
DDA
VSSA
VSSA
VDDD2
VSSD2
VDDO
VSSO
n.c.
D1
D0
n.c.
5
6
7
8
10
VRB
11
VRM
12 13 14
VI
15
VRT
16
OE
(2)
n.c.(2) n.c.(2)
(1)
(3)
(4)
(1) (1)
(2)
n.c.(2)
100
nF
VSSA
100
nF
VSSA
100
nF
32 31 30 29 28 27 26 25
D5 D4 D3n.c.(2) D2D8 D7 D6
Fig.15 Application diagram.
The analog and digital supplies should be separated and decoupled.
The external voltage reference generator must be built such that a good supply voltage ripple rejection is achieved with respect to the LSB value.
Eventually, the reference ladder voltages can be derived from a well regulated VDDA supply through a resistor bridge and a decoupling capacitor.
(1) VRB, VRM and VRT are decoupled to VSSA.
(2) Pins 8, 12, 13, 17, 24 and 32 should be connected to the closest ground pin in order to prevent noise influence.
(3) When VRM is not used, pin 11 can be left open-circuit, avoiding the decoupling capacitor. In any case, pin 11 must not be grounded.
(4) When analog input signal is AC coupled, an input bias or a clamping level must be applied to VIinput (pin 14).
2002 Jul 02 17
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
PACKAGE OUTLINE
0.2
UNIT A
max. A1A2A3bpcE
(1) eH
E
LL
pZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm 1.60 0.15
0.05 1.5
1.3 0.25 0.27
0.17 0.18
0.12 5.1
4.9 0.5 7.15
6.85 1.0 0.95
0.55 7
0
o
o
0.12 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
0.75
0.45
SOT401-1 136E01 MS-026 99-12-27
00-01-19
D(1) (1)(1)
5.1
4.9
HD
7.15
6.85
E
Z
0.95
0.55
D
bp
e
E
B
8
D
H
bp
E
H
vMB
D
ZD
A
ZE
e
vMA
X
1
32
25
24 17
16
9
θ
A1
A
Lp
detail X
L
(A )
3
A2
y
wM
wM
0 2.5 5 mm
scale
LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm SOT401-1
c
pin 1 index
2002 Jul 02 18
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
SOLDERING
Introduction to soldering surface mount packages
Thistextgivesa verybriefinsightto a complextechnology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certainsurfacemountICs,but it isnotsuitableforfinepitch
SMDs. In these situations reflow soldering is
recommended.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuitboard by screenprinting, stencillingor
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.
Wave soldering
Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs) or printed-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
•Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
•For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
•Forpackageswithleadson four sides,thefootprintmust
be placed at a 45°angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2002 Jul 02 19
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
Suitability of surface mount IC packages for wave and reflow soldering methods
Notes
1. Formore detailed informationon theBGApackages referto the
“(LF)BGAApplication Note
”(AN01026); order acopy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
.
3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
PACKAGE(1) SOLDERING METHOD
WAVE REFLOW(2)
BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable
HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN,
HVSON, SMS not suitable(3) suitable
PLCC(4), SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended(4)(5) suitable
SSOP, TSSOP, VSO not recommended(6) suitable
2002 Jul 02 20
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DATA SHEET STATUS(1) PRODUCT
STATUS(2) DEFINITIONS
Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseor atanyotherconditions abovethosegiven inthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofanyof these products,conveysnolicenceortitle
under any patent, copyright, or mask work right to these
products,and makes norepresentations or warrantiesthat
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
2002 Jul 02 21
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
NOTES
2002 Jul 02 22
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
NOTES
2002 Jul 02 23
Philips Semiconductors Product specification
10-bit high-speed 3.0 to 5.25 V
analog-to-digital converter TDA8766
NOTES
© Koninklijke Philips Electronics N.V. 2002 SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Philips Semiconductors – a world wide company
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Printed in The Netherlands 753504/05/pp24 Date of release: 2002 Jul 02 Document order number: 9397 750 10029
