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FEATURES APPLICATIONS
DESCRIPTION
APPLICATION CIRCUIT
8910
11
GND RS/D
GND LBYPASS
LOUT- NC
LVDD RVDD
NC NC
NC RIN+
LS/D RIN-
ROUT+ RBYPASS
ROUT- LIN-
LOUT+ LIN+
20-PIN QFN (RGW) PACKAGE
(TOP VIEW)
7
6
12
13
14
15
16171819
20
1
2
3
4
5
(See note A)
_
_
+
+
RVDD
ROUT+
LOUT+
ROUT-
LOUT-
GND 2, 5, Thermal Pad
LVDD
19
1
4
3
6
7
To Supply
To Supply
Bias
Circuitry
RIN-
LIN-
RIN+
LIN+
17
13
16
12
15
11
+
+
-
-
In From
In From
DAC
DAC
SHUTDOWN
RI
RI
RI
RI
14
9
C(RBYPASS)
C(LBYPASS)
100 kW
100 kW
40 kW
40 kW
40 kW
40 kW
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
2.8-W STEREO FULLY DIFFERENTIAL AUDIO POWER AMPLIFIER
Notebook PCsIdeal for Notebook PCs
LCD TVsFully Differential Architecture and HighPSRR (-80 dB) Provide Excellent RFRectification Immunity2.8 W Into 3 From a 5-V Supply at
The TPA6020A2 is a 2.8-W stereo bridge-tied loadTHD = 10% (Typical)
(BTL) amplifier designed to drive stereo speakerswith at least 3- impedance. The device operatesVery Low Crosstalk:
from 2.5 V to 5.5 V, drawing only 8 mA of quiescent -100 dB Typical at 5 V, 3
supply current. The feedback resistors are internal,2.5-V to 5.5-V Operating Range
allowing the gain to be set with only two inputresistors per channel. The amplifier's fully differentialLow Supply Current:
architecture performs with -80 dB of power supply 8 mA Typical at 5 V
rejection from 20 Hz to 2 kHz, improved RF rectifi- Shutdown Current: 80-nA Typical
cation immunity, small PCB area, and a fast startuptime with minimal pop, making the TPA6020A2 idealFast Startup (27 ms) With Minimal Pop
for notebook PC applications.Internal Feedback Resistors ReduceComponent CountThermally Enhanced QFN Packaging
A. C
(LBYPASS)
and C
(RBYPASS)
are optional.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
PACKAGE DISSIPATION RATINGS
RECOMMENDED OPERATION CONDITIONS
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the deviceplaced in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
PACKAGED DEVICES
(1) (2)
T
A
EVALUATION MODULESQFN
(RGW)
-40 °C to 85 °C TPA6020A2RGW TPA6020A2EVM
(1) The RGW is available taped and reeled. To order taped and reeled parts, add the suffix R to the partnumber (TPA6020A2RGWR).
(2) For the most current package and ordering information, see the Package Option Addendum at the endof this document, or see the TI website at www.ti.com .
over operating free-air temperature range unless otherwise noted
(1)
UNIT
V
DD
Supply voltage -0.3 V to 6 VV
I
Input voltage -0.3 V to V
DD
+ 0.3 VContinuous total power dissipation See Dissipation Rating TableT
A
Operating free-air temperature -40 °C to 85 °CT
J
Junction temperature -40 °C to 150 °CT
stg
Storage temperature -65 °C to 85 °CLead temperature 1,6 mm (1/16 Inch) from case for 10 seconds 260 °CHuman body model
(2)
(all pins) ±2 kVElectrostatic discharge
Charged-device model
(3)
(all pins) ±500 V
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) In accordance with JEDEC Standard 22, Test Method A114-B.(3) In accordance with JEDEC Standard 22, Test Method C101-A
T
A
25 °C DERATING T
A
= 70 °C T
A
= 85 °CPACKAGE
POWER RATING FACTOR
(1)
POWER RATING POWER RATING
RGW 2.99 W 23.98 mW/ °C 1.92 W 1.56 W
(1) Derating factor based on high-k board layout.
MIN TYP MAX UNIT
V
DD
Supply voltage 2.5 5.5 VV
IH
High-level input voltage SHUTDOWN 1.55 VV
IL
Low-level input voltage SHUTDOWN 0.5 VT
A
Operating free-air temperature -40 85 °C
2
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ELECTRICAL CHARACTERISTICS
38 k
RI
40 k
RI
42 k
RI
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
T
A
= 25 °C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output offset voltage (measuredV
OS
V
I
= 0 V differential, Gain = 1 V/V, V
DD
= 5.5 V -9 0.3 9 mVdifferentially)
PSRR Power supply rejection ratio V
DD
= 2.5 V to 5.5 V -85 dBV
IC
Common-mode input range V
DD
= 2.5 V to 5.5 V 0.5 V
DD
-0.8 VV
DD
= 5.5 V, V
IC
= 0.5 V to 4.7 V -63CMRR Common-mode rejection ratio dBV
DD
= 2.5 V, V
IC
= 0.5 V to 1.7 V -63V
DD
= 5.5 V 0.55R
L
= 3 , Gain = 1 V/V,Low-output swing V
IN+
= V
DD
, V
IN-
= 0 V or V
DD
= 3.6 V 0.42 VV
IN+
= 0 V, V
IN-
= V
DD
V
DD
= 2.5 V 0.34 0.4V
DD
= 5.5 V 4.9R
L
= 3 , Gain = 1 V/V,High-output swing V
IN+
= V
DD
, V
IN-
= 0 V or V
DD
= 3.6 V 3.1 VV
IN-
= V
DD
V
IN+
= 0 V
V
DD
= 2.5 V 1.9 2.1| I
IH
| High-level input current, shutdown V
DD
= 5.5 V, V
I
= 5.8 V 58 100 µA| I
IL
| Low-level input current, shutdown V
DD
= 5.5 V, V
I
= -0.3 V 3 100 µAI
Q
Quiescent current V
DD
= 2.5 V to 5.5 V, no load 8 9.8 mAV( SHUTDOWN) 0.5 V, V
DD
= 2.5 V to 5.5 V,I
(SD)
Supply current 0.08 1 µAR
L
= 3
Gain R
L
= 3 V/V
Resistance from shutdown to GND 100 k
3
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OPERATING CHARACTERISTICS
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
T
A
= 25 °C, Gain = 2 V/V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
DD
= 5 V 2.15THD + N= 1%, f = 1 kHz, R
L
= 3 V
DD
= 3.6 V 1.08V
DD
= 2.5 V 0.43V
DD
= 5 V 1.94P
O
Output power THD + N= 1%, f = 1 kHz, R
L
= 4 V
DD
= 3.6 V 1.00 WV
DD
= 2.5 V 0.41V
DD
= 5 V 1.27THD + N= 1%, f = 1 kHz, R
L
= 8 V
DD
= 3.6 V 0.65V
DD
= 2.5 V 0.29P
O
= 2 W V
DD
= 5 V 0.09%f = 1 kHz, R
L
= 3 P
O
= 1 W V
DD
= 3.6 V 0.20%P
O
= 300 mW V
DD
= 2.5 V 0.08%P
O
= 1.8 W V
DD
= 5 V 0.08%Total harmonic distortion plusTHD+N f = 1 kHz, R
L
= 4 P
O
= 0.7 W V
DD
= 3.6 V 0.07%noise
P
O
= 300 mW V
DD
= 2.5 V 0.12%P
O
= 1 W V
DD
= 5 V 0.05%f = 1 kHz, R
L
= 8 P
O
= 0.5 W V
DD
= 3.6 V 0.06%P
O
= 200 mW V
DD
= 2.5 V 0.06%f = 217 Hz -80V
DD
= 3.6 V, Inputs ac-grounded withk
SVR
Supply ripple rejection ratio dBC
I
= 2 µF, V
(RIPPLE)
= 200 mV
pp
f = 20 Hz to 20 kHz -70Crosstalk V
DD
= 5 V, R
L
= 3 , f = 20 Hz to 20 kHz, Po = 1 W -100 dBSNR Signal-to-noise ratio V
DD
= 5 V, P
O
= 2 W, R
L
= 3 , Gain = 1 V/V 104 dBV
DD
= 3.6 V, f = 20 Hz to 20 kHz, No weighting 15V
n
Output voltage noise Gain = 1 V/V µV
RMSA weighting 12Inputs ac grounded with C
I
= 0.22 µFCMRR Common-mode rejection ratio V
DD
= 3.6 V, V
IC
= 200 mV
pp
f = 217 Hz -65 dBZ
I
Input impedance 38 40 42 k V
DD
= 3.6 V, No C
BYPASS
4µsStart-up time from shutdown
V
DD
= 3.6 V, C
BYPASS
= 0.1 µF 27 ms
4
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TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
Terminal Functions
TERMINAL
I/O DESCRIPTIONNAME NO.
ROUT+ 1 O Right channel positive BTL outputGND 2,5 I High current groundROUT- 3 O Right channel negative BTL outputLOUT+ 4 O Left channel positive BTL outputLOUT- 6 O Left channel negative BTL outputLVDD 7 I Left channel power supply. Must be tied to RVDD for stereo operation.NC 8, 10, 18, 20 No internal connection.LS/D 9 I Left channel shutdown terminal (active low logic)LBYPASS 11 Left channel mid-supply voltage. Adding a bypass capacitor improves PSRRLIN+ 12 I Left channel positive differential inputLIN- 13 I Left channel negative differential inputRS/D 14 Right channel shutdown terminal (active low logic)RBYPASS 15 Right channel mid-supply voltage. Adding a bypass capacitor improves PSRRRIN+ 16 I Right channel positive differential inputRIN- 17 I Right channel negative differential inputRVDD 19 I Power supplyConnect to ground. Thermal pad must be soldered down in all applications to properly secureThermal Pad
device on the PCB.
5
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TYPICAL CHARACTERISTICS
Table of Graphs
1.5
0
2
0.5
2.5
1
3
3813 18 23
R - Load Resistance -
LW
P - Output Power - W
O
f = 1 kHz
Gain = 2 V/V
V = 2.5 V, THD+N = 10%
DD
V = 3.6 V, THD+N = 10%
DD
V = 5 V, THD+N = 1%
DD
V = 3.6 V, THD+N = 1%
DD
32
28
V = 5 V, THD+N = 10%
DD
V = 2.5 V, THD+N = 1%
DD
1.5
0
2
0.5
2.5
1
3
2.5 33.5 44.5
V - Supply Voltage - V
DD
P - Output Power - W
O
f = 1 kHz
Gain = 2 V/V
5
R = 3 , THD+N = 10%
LW
R = 4 , THD+N = 10%
LW
R = 3 , THD+N = 1%
LW
R = 4 , THD+N = 1%
LW
R = 8 , THD+N = 10%
LW
R = 8 , THD+N = 1%
LW
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
FIGURE
vs Supply voltage 1P
O
Output power
vs Load resistance 2P
D
Power dissipation vs Output power 3, 4vs Output power 5, 6, 7THD+N Total harmonic distortion + noise
vs Frequency 8, 9, 10, 11, 12, 13Crosstalk vs Frequency 14K
SVR
Supply voltage rejection ratio vs Frequency 15, 16, 17, 18GSM power supply rejection vs Time 19GSM power supply rejection vs Frequency 20vs Frequency 21CMRR Common-mode rejection ratio
vs Common-mode input voltage 22Closed-loop gain/phase vs Frequency 23Open-loop gain/phase vs Frequency 24Start-up time vs Bypass capacitor 25
OUTPUT POWER OUTPUT POWERvs vsSUPPLY VOLTAGE LOAD RESISTANCE
Figure 1. Figure 2.
6
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1.5
2
0.5
2.5
3.5
1
0
3
00.5 11.5 2
P - Output Power (Per Channel) - W
O
P - Power Dissipation - W
D
32.5
V = 5 V
Stereo
DD 3W
4W
8W
0.8
1
0.2
0.4
0.6
1.2
1.6
1.8
2
0
1.4
00.2 0.4 0.6 0.8 1
P - Output Power (Per Channel) - W
O
1.4 1.6
1.2
V = 3.6 V
Stereo
DD
3W
4W
8W
P - Power Dissipation - W
D
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
POWER DISSIPATION POWER DISSIPATIONvs vsOUTPUT POWER OUTPUT POWER
Figure 3. Figure 4.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsOUTPUT POWER OUTPUT POWER
Figure 5. Figure 6.
7
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0.01
0.1
1
10
20 20 k100 1 k 10 k
THD+N - Total Harmonic Distortion + Noise - %
f - Frequency - Hz
P = 2 W
O
P = 1 W
O
V = 5 V
R = 3
Gain = 2 V/V
C = 0.22 F
DD
L
I
W
m
0.01
0.1
1
10
20 20 k100 1 k 10 k
THD+N - Total Harmonic Distortion + Noise - %
f - Frequency - Hz
P = 1.6 W
O
P = 1 W
O
V = 5 V
R = 4
Gain = 2 V/V
C = 0.22 F
DD
L
I
W
m
0.01
0.1
1
10
20 20 k100 1 k 10 k
THD+N - Total Harmonic Distortion + Noise - %
f - Frequency - Hz
P = 0.5 W
O
P = 1 W
O
V = 5 V
R = 8
Gain = 2 V/V
C = 0.22 F
DD
L
I
W
m
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsOUTPUT POWER FREQUENCY
Figure 7. Figure 8.
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsFREQUENCY FREQUENCY
Figure 9. Figure 10.
8
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0.01
0.1
1
10
20 20 k100 1 k 10 k
THD+N - Total Harmonic Distortion + Noise - %
f - Frequency - Hz
V = 3.6 V
R = 4
Gain = 2 V/V
C = 0.22 F
DD
L
I
W
m
P = 800 mW
O
P = 500 mW
O
P = 100 mW
O
0.01
0.1
1
10
20 20 k100 1 k 10 k
THD+N - Total Harmonic Distortion + Noise - %
f - Frequency - Hz
V = 3.6 V
R = 8
Gain = 2 V/V
C = 0.22 F
DD
L
I
W
m
P = 250 mW
O
P = 500 mW
O
P = 100 mW
O
0.01
0.1
1
10
20 20 k100 1 k 10 k
THD+N - Total Harmonic Distortion + Noise - %
f - Frequency - Hz
V = 2.5 V
R = 4
Gain = 2 V/V
C = 0.22 F
DD
L
I
W
m
P = 250 mW
O
P = 100 mW
O
20 20 k100 1 k 10 k
f - Frequency - Hz
0
-20
-40
-60
-80
-100
-120
-140
Crosstalk - dB
V = 5 V
R = 3
Gain = 2 V/V
DD
LW
P = 2 W
O
P = 1 W
O
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISEvs vsFREQUENCY FREQUENCY
Figure 11. Figure 12.
TOTAL HARMONIC DISTORTION + NOISE CROSSTALKvs vsFREQUENCY FREQUENCY
Figure 13. Figure 14.
9
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f - Frequency - Hz
+0
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
20 20k50 100 200 500 1k 2k 5k 10k
kSVR - Supply Voltage Rejection Ratio - dB
VDD = 3.6 V
VDD = 2.5 V
RL = 4 ,,
C(BYPASS) = 0.47 µF,
Gain = 5 V/V,
CI = 2 µF,
Inputs ac Grounded
VDD = 5 V
f - Frequency - Hz
+0
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
20 20k50 100 200 500 1k 2k 5k 10k
kSVR - Supply Voltage Rejection Ratio - dB
VDD = 3.6 V
VDD = 2.5 V
VDD = 5 V
RL = 4 ,,
C(BYPASS) = 0.47 µF,
Gain = 1 V/V,
CI = 2 µF,
Inputs ac Grounded
kSVR − Supply Voltage Rejection Ratio − dB
f − Frequency − Hz
+0
−100
−90
−80
−70
−60
−50
−40
−30
−20
−10
20 20k50 100 200 500 1k 2k 5k 10k
RL = 4 ,,
CI = 2 µF,
Gain = 1 V/V,
VDD = 3.6 V
C(BYPASS) = 0.47 µF
C(BYPASS) = 1 µF
C(BYPASS) = 0.1 µF
No C(BYPASS)
f - Frequency - Hz
+0
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
20 20k50 100 200 500 1k 2k 5k 10k
kSVR - Supply Voltage Rejection Ratio - dB
RL = 4 ,,
C(BYPASS) = 0.47 µF,
CI = 2 µF,
VDD = 2.5 V to 5 V
Inputs Floating
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
SUPPLY VOLTAGE REJECTION RATIO SUPPLY VOLTAGE REJECTION RATIOvs vsFREQUENCY FREQUENCY
Figure 15. Figure 16.
SUPPLY RIPPLE REJECTION RATIO SUPPLY VOLTAGE REJECTION RATIOvs vsFREQUENCY FREQUENCY
Figure 17. Figure 18.
10
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-180
-160
-140
-120
-100
0400 800 1200 1600 2000
-150
-100
-50
0
f - Frequency - Hz
V oltage - dBV
DD - Supply V
V Shown in Figure 19,
R = 8 , C = 2.2 F,
Inputs Grounded
DD
L I
W m
V oltage - dBV
O- Output V
C(BYPASS)= 0.47 Fm
C1
Frequency
217 Hz
C1 - Duty
20%
C1 Pk-Pk
500 mV
Ch1 100 mV/div
Ch4 10 mV/div
2 ms/div
VDD
VOUT
Voltage - V
t - T ime - ms
R = 8
C = 2.2 F
L
I
W
m
C = 0.47 F
(BYPASS) m
f - Frequency - Hz
+0
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
20 20k50 100 200 500 1k 2k 5k 10k
CMRR - Common-Mode Rejection Ratio - dB
VDD = 2.5 V
RL = 4 ,,
VIC = 200 mV Vp-p,
Gain = 1 V/V,
VDD = 5 V
-120
-80
-100
-60
-40
-20
0
00.5 11.5 22.5 33.5 44.5 5
VDD= 5 V
VDD= 2.5 V VDD= 3.6 V
VIC- Common Mode Input Voltage - V
CMRR - Common Mode Rejection Ratio - dB
R = 4 ,
Gain = 1 V/V,
LW
dc Change in VIC
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
GSM POWER SUPPLY REJECTION GSM POWER SUPPLY REJECTIONvs vsTIME FREQUENCY
Figure 19. Figure 20.
COMMON MODE REJECTION RATIO COMMON-MODE REJECTION RATIOvs vsFREQUENCY COMMON-MODE INPUT VOLTAGE
Figure 21. Figure 22.
11
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-80
-70
-60
-50
-40
-30
-20
-10
0
10
20
30
40
-180
-150
-120
-90
-60
-30
0
30
60
90
120
150
180
1 100 10 k 100 k 1 M 10 M1 k
f - Frequency - Hz
Gain - dB
Phase - Degrees
Gain
Phase
VDD = 5 V
RL = 8
AV = 1
10
−40
−30
−20
−10
0
10
20
30
40
50
60
70
80
90
100
−180
−150
−120
−90
−60
−30
0
30
60
90
120
150
180
VDD = 5 V,
RL = 8
Gain
Phase
100 1 k 10 k 100 k 1 M
f − Frequency − Hz
Phase − Degrees
Gain − dB
0
50
100
150
200
250
300
0 0.2 0.4 0.6 0.8 1
C(Bypass) - Bypass Capacitor - µF
Start-Up Time - ms
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
CLOSED-LOOP GAIN/PHASE OPEN-LOOP GAIN/PHASEvs vsFREQUENCY FREQUENCY
Figure 23. Figure 24.
START-UP TIME
vsBYPASS CAPACITOR
Figure 25.
12
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APPLICATION INFORMATION
STEREO OPERATION
Bypass Capacitor Configuration
VDD and Decoupling Capacitors
FULLY DIFFERENTIAL AMPLIFIER
APPLICATION SCHEMATICS
Advantages of Fully Differential Amplifiers
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
DAC has a lower mid-supply voltage than that ofthe TPA6020A2, the common-mode feedbackcircuit compensates, and the outputs are stillThe TPA6020A2 is a stereo amplifier that can be
biased at the mid-supply point of the TPA6020A2.operated in either a mono or stereo configuration.
The inputs of the TPA6020A2 can be biased fromEach channel has independent shutdown control,
0.5 V to V
DD
- 0.8 V. If the inputs are biasedgiving the user greater flexibility.
outside of that range, input-coupling capacitorsare required.
Mid-supply bypass capacitor, C
(BYPASS)
, notIf Bypass capacitors are used, it is necessary to use
required: The fully differential amplifier does notseparate bypass capacitors for each bypass pin. (See
require a bypass capacitor. Any shift in thethe section entitled Bypass Capacitor (C
BYPASS
) and
mid-supply voltage affects both positive andStart-Up Time)
negative channels equally, thus canceling at thedifferential output. Removing the bypass capaci-tor slightly worsens power supply rejection ratio(k
SVR
), but a slight decrease of k
SVR
may beEach VDD pin must have a separate power supply
acceptable when an additional component can bedecoupling capacitor (see section entitled Decoupling
eliminated (see Figure 18 ).Capacitor (C
S
)). A single, bulk decoupling capacitor is
Better RF-immunity: GSM handsets save poweralso recommended. Additionally, the left and right
by turning on and shutting off the RF transmitterchannel VDD pins must be tied together on the PCB.
at a rate of 217 Hz. The transmitted signal ispicked up on input and output traces. The fullydifferential amplifier cancels the signal muchThe TPA6020A2 is a fully differential amplifier with
better than the typical audio amplifier.differential inputs and outputs. The fully differentialamplifier consists of a differential amplifier and acommon-mode amplifier. The differential amplifier
Figure 26 through Figure 29 show application sche-ensures that the amplifier outputs a differential volt-
matics for differential and single-ended inputs. Typicalage that is equal to the differential input times the
values are shown in Table 1 .gain. The common-mode feedback ensures that thecommon-mode voltage at the output is biased around
Table 1. Typical Component ValuesV
DD
/2 regardless of the common-mode voltage at theinput.
COMPONENT VALUE
R
I
40 k C
(BYPASS)
(1)
0.22 µFInput coupling capacitors not required: A fully
C
S
1 µFdifferential amplifier with good CMRR, like the
C
I
0.22 µFTPA6020A2, allows the inputs to be biased atvoltage other than mid-supply. For example, if a
(1) C
(BYPASS)
is optional.
13
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_
_
+
+
RVDD
ROUT+
LOUT+
ROUT-
LOUT-
GND 2, 5, Thermal Pad
LVDD
19
1
4
3
6
7
To Supply
To Supply
Bias
Circuitry
RIN-
LIN-
RIN+
LIN+
17
13
16
12
15
11
+
+
-
-
In From
In From
DAC
DAC
SHUTDOWN
RI
RI
RI
RI
14
9
C(RBYPASS)
C(LBYPASS)
100 kW
100 kW
40 kW
40 kW
40 kW
40 kW
(See note A)
_
_
+
+
RVDD
ROUT+
LOUT+
ROUT-
LOUT-
GND 2, 5, Thermal Pad
LVDD
19
1
4
3
6
7
To Supply
To Supply
Bias
Circuitry
RIN-
LIN-
RIN+
LIN+
17
13
16
12
15
11
+
+
-
-
SHUTDOWN
RI
RI
CI
CI
CI
CI
RI
RI
14
9
C(RBYPASS)
C(LBYPASS)
100 kW
100 kW
40 kW
40 kW
40 kW
40 kW
(See note A)
_
_
+
+
RVDD
ROUT+
LOUT+
ROUT-
LOUT-
GND 2, 5, Thermal Pad
LVDD
19
1
4
3
6
7
To Supply
To Supply
Bias
Circuitry
RIN-
LIN-
RIN+
LIN+
17
13
16
12
15
11
IN
IN
SHUTDOWN
RI
RI
RI
RI
14
9
C(RBYPASS)
C(LBYPASS)
100 kW
100 kW
40 kW
40 kW
40 kW
40 kW
CI
CI
CI
CI
(See note A)
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
A. C
(LBYPASS)
and C
(RBYPASS)
are optional.
Figure 26. Typical Differential Input Application Schematic
A. C
(LBYPASS)
and C
(RBYPASS)
are optional.
A. C
(LBYPASS)
and C
(RBYPASS)
are optional.Figure 27. Differential Input Application
Figure 28. Single-Ended Input ApplicationSchematic Optimized With Input Capacitors
Schematic
14
www.ti.com
_
_
+
+
RVDD
ROUT+
LOUT+
ROUT-
LOUT-
GND 2, 5, Thermal Pad
LVDD
19
1
4
3
6
7
To Supply
To Supply
Bias
Circuitry
RIN-
LIN-
RIN+
LIN+
17
13
16
12
15
11
+
+
-
-
SHUTDOWN
RI
RI
Ra
Ra
CI
CF
CF
CF
CF
Ca
Ca
Ca
Ca
CI
CI
CI
RI
Ra
Ra
RI
14
9
C(RBYPASS)
C(LBYPASS)
100 kW
100 kW
40 kW
40 kW
40 kW
40 kW
(See note A)
Selecting Components
Gain = RF/RI
(1)
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
A. C
(LBYPASS)
and C
(RBYPASS)
are optional.
Figure 29. Differential Input ApplicationSchematic With Input Bandpass Filter
Bypass Capacitor (C
BYPASS
) and Start-Up Time
The internal voltage divider at the BYPASS pin of thisResistors (R
I
)
device sets a mid-supply voltage for internal refer-ences and sets the output common-mode voltage toThe input resistor (R
I
) can be selected to set the gain
V
DD
/2. Adding a capacitor filters any noise into thisof the amplifier according to Equation 1 .
pin, increasing k
SVR
. C
(BYPASS)
also determines the risetime of V
O+
and V
O-
when the device exits shutdown.The larger the capacitor, the slower the rise time.The internal feedback resistors (R
F
) are trimmed to40 k .
Input Capacitor (C
I
)Matching input resistors are important to fully differen-
The TPA6020A2 does not require input couplingtial amplifier applications. Resistor matching has a
capacitors when driven by a differential input sourcesignificant impact on CMRR and PSRR. If the input
biased from 0.5 V to V
DD
- 0.8 V. Use 1% toleranceresistor values are poorly matched, then the CMRR
or better gain-setting resistors if not using in-and PSRR performance is diminished. Therefore,
put-coupling capacitors.1%-tolerance resistors or better are recommended tooptimize performance.
15
www.ti.com
fc(LPF) 1
2RFCF
where RFis the internal 40 kresistor
(4)
fc1
2RICI
(2)
fc(LPF) 1
240 kCF
(5)
CF1
240 kfc(LPF)
(6)
-3 dB
fc
fc(HPF) 1
2RICI
where RIis the input resistor
(7)
fc(HPF) 1
210 kCI
(8)
CI1
2RIfc
(3)
CI1
210 kfc(HPF)
(9)
fc(LPF) 1
2RaCa
(10)
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
Step 1: Low-Pass FilterIn the single-ended input application, an input capaci-tor, C
I
, is required to allow the amplifier to bias theinput signal to the proper dc level. In this case, C
I
andR
I
form a high-pass filter with the corner frequencydefined in Equation 2 .
Therefore,
Substituting 10 kHz for f
c(LPF)
and solving for C
F
:
C
F
= 398 pF
Step 2: High-Pass Filter
The value of C
I
is an important consideration. Itdirectly affects the bass (low frequency) performance
Because the application in this case requires a gainof the circuit. Consider the example where R
I
is
of 4 V/V, R
I
must be set to 10 k .10 k and the specification calls for a flat bass
Substituting R
I
into Equation 6.response down to 100 Hz. Equation 2 is reconfiguredas Equation 3 .
Therefore,In this example, C
I
is 0.16 µF, so the likely choiceranges from 0.22 µF to 0.47 µF. Ceramic capacitorsare preferred because they are the best choice inpreventing leakage current. When polarized capaci-
Substituting 100 Hz for f
c(HPF)
and solving for C
I
:tors are used, the positive side of the capacitor faces
C
I
= 0.16 µFthe amplifier input in most applications. The input dclevel is held at V
DD
/2, typically higher than the source
At this point, a first-order band-pass filter has beendc level. It is important to confirm the capacitor
created with the low-frequency cutoff set to 100 Hzpolarity in the application.
and the high-frequency cutoff set to 10 kHz.
The process can be taken a step further by creating aBand-Pass Filter (R
a
, C
a
, and C
a
)
second-order high-pass filter. This is accomplished byIt may be desirable to have signal filtering beyond the
placing a resistor (R
a
) and capacitor (C
a
) in the inputone-pole high-pass filter formed by the combination of
path. It is important to note that R
a
must be at leastC
I
and R
I
. A low-pass filter may be added by placing
10 times smaller than R
I
; otherwise its value has aa capacitor (C
F
) between the inputs and outputs,
noticeable effect on the gain, as R
a
and R
I
are informing a band-pass filter.
series.An example of when this technique might be used
Step 3: Additional Low-Pass Filterwould be in an application where the desirablepass-band range is between 100 Hz and 10 kHz, with
R
a
must be at least 10X smaller than R
I
,a gain of 4 V/V. The following equations illustrate how
Set R
a
= 1 k the proper values of C
F
and C
I
can be determined.
Therefore,
16
www.ti.com
Ca1
21kfc(LPF)
(11)
V(rms)
VO(PP)
2 2
Power
V(rms)2
RL
(12)
9 dB
fc(HPF) = 100 Hz
12 dB
AV
+20 dB/dec
−40 dB/dec
−20 dB/dec
f
fc(LPF) = 10 kHz
RL2x VO(PP)
VO(PP)
-VO(PP)
VDD
VDD
USING LOW-ESR CAPACITORS
DIFFERENTIAL OUTPUT VERSUS
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
benefits to this configuration is power to the load. Thedifferential drive to the speaker means that as oneside is slewing up, the other side is slewing down,and vice versa. This in effect doubles the voltageSubstituting 10 kHz for f
c(LPF)
and solving for C
a
:
swing on the load as compared to aC
a
= 160 pF
ground-referenced load. Plugging 2X V
O(PP)
into thepower equation, where voltage is squared, yields 4XFigure 30 is a bode plot for the band-pass filter in the
the output power from the same supply rail and loadprevious example. Figure 29 shows how to configure
impedance Equation 12 .the TPA6020A2 as a band-pass filter.
Figure 30. Bode Plot
Decoupling Capacitor (C
S
)
The TPA6020A2 is a high-performance CMOS audioamplifier that requires adequate power supply de-coupling to ensure the output total harmonic distortion(THD) is as low as possible. Power-supply decouplingalso prevents oscillations for long lead lengths be-tween the amplifier and the speaker. For higherfrequency transients, spikes, or digital hash on theline, a good low equivalent-series-resistance (ESR)ceramic capacitor, typically 0.1 µF to 1 µF, placed as
Figure 31. Differential Output Configurationclose as possible to the device V
DD
lead works best.For filtering lower frequency noise signals, a 10-µF or
In a typical wireless handset operating at 3.6 V,greater capacitor placed near the audio power ampli-
bridging raises the power into an 8- speaker from afier also helps, but is not required in most applications
singled-ended (SE, ground reference) limit ofbecause of the high PSRR of this device.
200 mW to 800 mW. This is a 6-dB improvement insound power—loudness that can be heard. In ad-dition to increased power, there are fre-Low-ESR capacitors are recommended throughout
quency-response concerns. Consider thethis applications section. A real (as opposed to ideal)
single-supply SE configuration shown in Figure 32 . Acapacitor can be modeled simply as a resistor in
coupling capacitor (C
C
) is required to block theseries with an ideal capacitor. The voltage drop
dc-offset voltage from the load. This capacitor can beacross this resistor minimizes the beneficial effects of
quite large (approximately 33 µF to 1000 µF) so itthe capacitor in the circuit. The lower the equivalent
tends to be expensive, heavy, occupy valuable PCBvalue of this resistance the more the real capacitor
area, and have the additional drawback of limitingbehaves like an ideal capacitor.
low-frequency performance. This frequency-limitingeffect is due to the high-pass filter network createdwith the speaker impedance and the coupling capaci-SINGLE-ENDED OUTPUT
tance. This is calculated with Equation 13 .Figure 31 shows a Class-AB audio power amplifier(APA) in a fully differential configuration. TheTPA6020A2 amplifier has differential outputs drivingboth ends of the load. One of several potential
17
www.ti.com
fc1
2RLCC
(13)
V(LRMS)
VO
IDD
IDD(avg)
RL
CCVO(PP)
VO(PP)
VDD
-3 dB
fc
FULLY DIFFERENTIAL AMPLIFIER
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
output. The total voltage drop can be calculated bysubtracting the RMS value of the output voltage fromV
DD
. The internal voltage drop multiplied by theFor example, a 68-µF capacitor with an 8- speaker
average value of the supply current, I
DD
(avg), deter-would attenuate low frequencies below 293 Hz. The
mines the internal power dissipation of the amplifier.BTL configuration cancels the dc offsets, which elim-
An easy-to-use equation to calculate efficiency startsinates the need for the blocking capacitors.
out as being equal to the ratio of power from theLow-frequency performance is then limited only by
power supply to the power delivered to the load. Tothe input network and speaker response. Cost and
accurately calculate the RMS and average values ofPCB space are also minimized by eliminating the
power in the load and in the amplifier, the current andbulky coupling capacitor.
voltage waveform shapes must first be understood(see Figure 33 ).
Figure 33. Voltage and Current Waveforms forBTL Amplifiers
Figure 32. Single-Ended Output and Frequency
Although the voltages and currents for SE and BTLResponse
are sinusoidal in the load, currents from the supplyare different between SE and BTL configurations. InIncreasing power to the load does carry a penalty of
an SE application the current waveform is aincreased internal power dissipation. The increased
half-wave rectified shape, whereas in BTL it is adissipation is understandable considering that the
full-wave rectified waveform. This means RMS con-BTL configuration produces 4X the output power of
version factors are different. Keep in mind that forthe SE configuration.
most of the waveform both the push and pull transis-tors are not on at the same time, which supports thefact that each amplifier in the BTL device only drawscurrent from the supply for half the waveform. TheEFFICIENCY AND THERMAL INFORMATION
following equations are the basis for calculatingClass-AB amplifiers are inefficient, primarily because
amplifier efficiency.of voltage drop across the output-stage transistors.The two components of this internal voltage drop arethe headroom or dc voltage drop that varies inverselyto output power, and the sine wave nature of the
18
www.ti.com
Efficiency of a BTL amplifier PL
PSUP
Where:
PLVLrms2
RL, andVLRMS VP
2
, therefore, PLVP2
2RL
PL = Power delivered to load
PSUP = Power drawn from power supply
VLRMS = RMS voltage on BTL load
RL = Load resistance
VP = Peak voltage on BTL load
IDDavg = Average current drawn from the power supply
VDD = Power supply voltage
ηBTL = Efficiency of a BTL amplifier
and PSUP VDD IDDavg and IDDavg 1
0
VP
RLsin(t) dt 1
VP
RL[cos(t)]
02VP
RL
Therefore,
PSUP 2 VDD VP
RL
substituting PL and PSUP into equation 6,
Efficiency of a BTL amplifier
VP2
2 RL
2 VDD VP
RL
VP
4 VDD
VP2 PLRL
Where:
BTL
2 PLRL
4 VDD
Therefore,
(15)
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
(14)
Table 2. Efficiency and Maximum Ambient Temperature vs Output Power
Output Power Efficiency Internal Dissipation Power From Supply Max Ambient Temperature(W) (%) (W) (W) ( °C)
5-V, Stereo, 3- Systems
0.5 27.2 2.68 3.68 381 38.4 3.20 5.20 172 54.4 3.35 7.35 102.8 64.4 3.10 8.70 21
5-V, Stereo, 4- BTL Systems
0.5 31.4 2.18 3.18 591 44.4 2.50 4.50 462 62.8 2.37 6.37 512.5 70.2 2.12 7.12 62
5-V, Stereo, 8- Systems
0.25 31.4 1.09 1.59 85
(1)
0.5 44.4 1.25 2.25 85
(1)
1 62.8 1.18 3.18 85
(1)
1.36 73.3 0.99 3.71 85
(1)
(1) Package limited to 85 °C ambient
19
www.ti.com
qJA === 41.7 C/W
o
11
Derating Factor 0.2398
(17)
TAMax = T P
J JA D
Max - Maxq
= 150 - 41.7(2.53) = 44.5 C/W
o
(18)
PDmax =
4 VDD
2
p
2RL
(16)
TPA6020A2
SLOS458B JULY 2005 REVISED AUGUST 2005
Table 2 employs Equation 15 to calculate efficienciesfor four different output power levels. Note that theefficiency of the amplifier is quite low for lower power
Given θ
JA
, the maximum allowable junction tempera-levels and rises sharply as power to the load is
ture, and the maximum internal dissipation, the maxi-increased resulting in a nearly flat internal power
mum ambient temperature can be calculated withdissipation over the normal operating range. Note that
Equation 18 . The maximum recommended junctionthe internal dissipation at full output power is less
temperature for the TPA6020A2 is 150 °C.than in the half power range. Calculating the ef-ficiency for a specific system is the key to properpower supply design. For a 2.8-W audio system with3- loads and a 5-V supply, the maximum draw onthe power supply is almost 8.8 W.
Equation 18 shows that the maximum ambient tem-perature is 44.5 °C at maximum power dissipationA final point to remember about Class-AB amplifiers
with a 5-V supply.is how to manipulate the terms in the efficiencyequation to the utmost advantage when possible.
Table 2 shows that for most applications no airflow isNote that in Equation 15 , V
DD
is in the denominator.
required to keep junction temperatures in the speci-This indicates that as V
DD
goes down, efficiency goes
fied range. The TPA6020A2 is designed with thermalup.
protection that turns the device off when the junctiontemperature surpasses 150 °C to prevent damage toA simple formula for calculating the maximum power
the IC. In addition, using speakers with an impedancedissipated, P
Dmax
, may be used for a stereo, differen-
higher than 4 dramatically increases the thermaltial output application:
performance by reducing the output current.
The TPA6020A2 is capable of driving impedances aslow as 3 , but special layout techniques must beconsidered in order to achieve optimal performance.In a 5-V, 3- stereo system, the maximum ambientP
Dmax
for a 5-V, 4- system is 2.53 W.
temperature is just 9.1 °C . To increase the maximumThe maximum ambient temperature depends on the
ambient temperature, θ
JA
has to be reduced. This isheat sinking ability of the PCB system. The derating
achieved by increasing the amount of copper on thefactor for the 5 mm x 5 mm QFN package is shown in
board. Using 3 oz. or 4 oz. copper, and/or additionalthe dissipation rating table. Converting this to θ
JA
:
layers, increases the thermal performance of thedevice.
20
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPA6020A2RGWR ACTIVE QFN RGW 20 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPA6020A2RGWRG4 ACTIVE QFN RGW 20 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPA6020A2RGWT ACTIVE QFN RGW 20 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPA6020A2RGWTG4 ACTIVE QFN RGW 20 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Apr-2006
Addendum-Page 1
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