200 kHz, 1 A High Voltage
Step-Down Switching Regulator
Data Sheet
ADP3050
Rev. C
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FEATURES
Wide input voltage range: 3.6 V to 30 V
Adjustable and fixed (3.3 V, 5 V) output options
Integrated 1 A power switch
Uses small surface-mount components
Cycle-by-cycle current limiting
Peak input voltage (100 ms): 60 V
Configurable as a buck, buck-boost, and SEPIC
regulator
Available in 8-lead SOIC package
Supported by ADIsimPower™ design tool
APPLICATIONS
Industrial power systems
PC peripheral power systems
Preregulator for linear regulators
Distributed power systems
Automotive systems
Battery chargers
FUNCTIONAL BLOCK DIAGRAM
200kHz
OSCILLATOR
FREQUENCY
AND CURRENT LIM IT
FOLDBACK
2.50V
REGULATOR
CURRENT S E NS E
AMPLIFIER
BOOST
FB
SD
GND
BIAS
CURRENT
LIMIT
gm
1.2V
CMP
R
S Q DRIVER
SWITCH
IN
COMP
+
ADP3050
3
6
7
4
5
1
2
8
00125-001
Figure 1.
GENERAL DESCRIPTION
The ADP3050 is a current mode monolithic buck (step down)
PWM switching regulator that contains a high current 1 A power
switch and all control, logic, and protection functions. It uses a
unique compensation scheme allowing the use of any type of
output capacitor (tantalum, ceramic, electrolytic, OS-CON).
Unlike some buck regulators, the design is not restricted to using
a specific type of output capacitor or ESR value.
A special boosted drive stage is used to saturate the NPN power
switch, providing a system efficiency higher than conventional
bipolar buck switchers. Further efficiency improvements are
obtained by using the low voltage regulated output to provide
the internal operating current of the device. A high switching
frequency allows the use of small external surface-mount compo-
nents. A wide variety of standard off-the-shelf devices can be
used, providing a great deal of design flexibility. A complete
regulator design requires only a few external components.
The ADP3050 includes a shutdown input that places the device
in a low power mode, reducing the total supply current to under
20 µA. Internal protection features include thermal shutdown
circuitry and a cycle-by-cycle current limit for the power switch
to provide complete device protection under fault conditions.
The ADP3050 provides excellent line and load regulation,
maintaining typically less than ±3% output voltage accuracy
over temperature and under all input voltage and output
current conditions.
The ADP3050 is specified over the industrial temperature range
of −40°C to +85°C and is available in a thermally enhanced 8-lead
(not Pb-free only) SOIC package and a standard 8-lead (Pb-free
only) RoHS-compliant SOIC package.
ADP3050 Data Sheet
Rev. C | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 10
Setting the Output Voltage ........................................................ 10
Applications Information .............................................................. 11
ADIsimPower Design Tool ....................................................... 11
Inductor Selection ...................................................................... 11
Output Capacitor Selection ....................................................... 12
Catch Diode Selection ............................................................... 13
Input Capacitor Selection .......................................................... 14
Discontinous Mode Ringing ..................................................... 14
Setting the Output Voltage ........................................................ 14
Frequency Compensation ......................................................... 14
Current Limit/Frequency Foldback ......................................... 15
Bias Pin Connection .................................................................. 15
Boosted Drive Stage ................................................................... 15
Start-Up/Minimum Input Voltage ........................................... 15
Thermal Considerations ............................................................ 16
Board Layout Guidelines ............................................................... 17
Typical Applications ................................................................... 17
Inverting (Buck Boost) Regulator ............................................ 18
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 20
REVISION HISTORY
6/12—Re v. B to Rev. C
Change to Features Section ............................................................. 1
Added ADIsimPower Design Tool Section ................................. 11
Changes to Ordering Guide .......................................................... 20
3/08—Rev. A to Rev. B
Updated Format .................................................................. Universal
Changes to General Description Section ...................................... 1
Changes to Figure 3 and Figure 5 ................................................... 6
Changes to Table 2 ............................................................................ 4
Deleted Table 4 ................................................................................ 14
Changes to Table 5 .......................................................................... 15
Deleted Table 8 ................................................................................ 15
Deleted Table 7 ................................................................................ 16
Deleted Table 9 ................................................................................ 16
Changes to Boosted Drive Stage Section and Thermal
Considerations Sections................................................................. 19
Changes to Figure 27 ...................................................................... 20
Changes to Ordering Guide .......................................................... 23
Data Sheet ADP3050
Rev. C | Page 3 of 20
SPECIFICATIONS
VIN = 10 V, TA = −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter1 Symbol Conditions Min Typ Max Unit
FEEDBACK
Feedback Voltage
V
FB
Over line and temperature
ADP3050 1.16 1.20 1.24 V
ADP3050-3.3 3.20 3.30 3.40 V
ADP3050-5 4.85 5.00 5.15 V
Line Regulation VIN = 10 V to 30 V, no load 0.005 %/V
Load Regulation
I
LOAD
= 100 mA to 1 A, ADP3050AR only
−1.0
+0.1
+1.0
%/A
ADP3050AR-3.3, ADP3050AR-5 −0.5 +0.1 +0.5 %/A
Input Bias Current IFB ADP3050AR only 0.65 2 μA
ERROR AMPLIFIER
Transconductance2 gm 1250 μMho
Voltage Gain2 AVOL 300 V/V
Output Current
ADP3050 COMP = 1.0 V, FB = 1.1 V to 1.3 V ±115 μA
ADP3050-3.3 COMP = 1.0 V, FB = 3.0 V to 3.6 V ±120 μA
ADP3050-5
COMP = 1.0 V, FB = 4.5 V to 5.5 V
±135
μA
OSCILLATOR
Oscillator Frequency3
f
OSC
170
200
240
kHz
Minimum Duty Cycle DMIN 10 %
Maximum Duty Cycle DMAX 90 %
SWITCH
Average Output Current Limit4 ICL(AVG)
ADP3050 BOOST = 15 V, FB = 1.1 V 1.0 1.25 1.5 A
ADP3050-3.3 BOOST = 15 V, FB = 3.0 V 1.0 1.25 1.5 A
ADP3050-5 BOOST = 15 V, FB = 4.5 V 1.0 1.25 1.5 A
Peak Switch Current Limit5 ICL(PEAK) 1.5 1.7 2.1 A
Saturation Voltage
BOOST = 15 V, I
LOAD
= 1 A
0.65
0.95
V
Leakage Current 50 nA
SHUTDOWN
Input Voltage Low 0.4 V
Input Voltage High 2.0 V
SUPPLY
Input Voltage Range6 VIN 3.6 30 V
Minimum BIAS Voltage VBIAS 3.0 V
Minimum BOOST Voltage VBOOST 3.0 V
IN Supply Current IQ
Normal Mode BIAS = 5.0 V 0.7 1.5 mA
Shutdown Mode
SD = 0 V, V
IN
≤ 30 V
15 40 μA
BIAS Supply Current IBIAS BIAS = 5.0 V 4.0 6.0 mA
BOOST Supply Current IBOOST BOOST = 15 V, ISW = 0.5 A 18 mA
BOOST = 15 V, ISW = 1.0 A 20 40 mA
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
2 Transconductance and voltage gain measurements refer to the internal amplifier without the voltage divider. To calculate the transconductance and gain of the fixed
voltage parts, divide the values shown by FB/1.20.
3 The switching frequency is reduced when the feedback pin is lower than 0.8 × FB.
4 See Figure 24 for typical application circuit.
5 Switch current limit is measured with no diode, no inductor, and no output capacitor.
6 Minimum input voltage is not measured directly, but is guaranteed by other tests. The actual minimum input voltage needed to keep the output in regulation
depends on output voltage and load current.
ADP3050 Data Sheet
Rev. C | Page 4 of 20
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
IN Voltage
Continuous −0.3 V to +40 V
Peak (<100 ms) −0.3 V to +60 V
BOOST Voltage
Continuous −0.3 V to +45 V
Peak (<100 ms) −0.3 V to +65 V
SD, BIAS Voltage −0.3 V to IN + 0.3 V
FB Voltage
−0.3 V to +8 V
COMP Voltage −0.3 V to IN + 0.3 V
SWITCH Voltage −0.3 V to IN + 0.3 V
Operating Ambient Temperature Range −40°C to +85°C
Operating Junction Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
θ
JA
(4-Layer PCB)
1
60.6°C/W
θJA (4-Layer PCB)2 87.5°C/W
Lead Temperature (Soldering, 60 sec) 300°C
1 Applied to all models that are not Pb-free.
2 Applied to all Pb-free models.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Data Sheet ADP3050
Rev. C | Page 5 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
SWITCH 1
BOOST 2
BIAS 3
FB 4
IN
8
GND
7
SD
6
COMP
5
ADP3050
TOP VIEW
(Not t o Scale)
00125-002
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 SWITCH Switch Node. This pin is the emitter of the internal NPN power switch. The voltage at this pin switches between
VIN and approximately −0.5 V.
2 BOOST Boost Pin. This pin is used to provide a boosted voltage (higher than VIN) for the drive stage of the NPN power
switch. With the higher drive voltage, the power switch can be saturated, greatly reducing the switch power
losses.
3 BIAS Bias Input Pin. Connect this pin to the regulated output voltage to maximize system efficiency. When this pin is
above 2.7 V, most of the ADP3050 operating current is taken from the output instead of the input supply. Leave
unconnected if not used.
4 FB Feedback Pin. This feedback pin senses the regulated output voltage. Connect this pin directly to the output
(fixed output versions).
5 COMP Compensation Node. This pin is used to compensate the regulator with an external resistor and capacitor. This
pin is also used to override the control loop. However, the voltage on this pin should not exceed 2 V, because
the pin is internally clamped to ensure a fast transient response. Use a pull-up resistor if this pin is to be pulled
higher than 2 V.
6 SD Shutdown Pin. Use this pin to turn the device on and off. If this feature is not needed, tie this pin directly to IN.
7 GND Ground Pin. Connect this pin to local ground plane.
8 IN Power Input. Connect this pin to the input supply voltage. An input bypass capacitor must be placed close to
this pin to ensure proper regulator operation.
ADP3050 Data Sheet
Rev. C | Page 6 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
TEMPERATURE (°C)
VIN = 10V, NO LO AD
1.5
0
–45 –35
QUIESCE NT O P E RATI NG CURRENT (mA)
–25 –15 –5 515 25 35 45 55 65 75 85
4.5
2.0
1.0
0.5
3.5
2.5
4.0
3.0
INTO BIAS PIN
INTO IN PIN
5.0
00125-003
Figure 3. Quiescent Operating Current vs. Temperature
00125-004
SUPPLY VOLT AGE (V)
25
20
0300
SHUT DOWN QUI E S CE NT CURRENT (µ A)
15
10
5
510 15 20 25
Figure 4. Shutdown Quiescent Current vs. Supply Voltage
00125-005
SUPPLY VOLT AGE (V)
10
8
0
QUIESCE NT O P E RATI NG CURRENT (mA)
6
4
2
BIAS TIED TO V
OUT
V
OUT
= 3.3V
V
OUT
= 5V
300 5 10 15 20 25
Figure 5. Quiescent Operating Current vs. Supply Voltage
TEMPERATURE (°C)
V
IN
= 10V
0.6
0
AVERAGE O UTPUT CURRENT (A)
1.8
0.8
0.4
0.2
1.4
1.0
1.6
1.2
2.0
00125-006
–45 –35 –25 –15 –5 515 25 35 45 55 65 75 85
Figure 6. Average Output Current Limit vs. Temperature
LOAD CURRENT ( A)
25
20
000.1 0.2
BOOST CURRE NT (mA)
15
10
5
V
IN
= 10V
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
00125-007
Figure 7. Boost Current vs. Load Current
OUTPUT CURRE NT (mA)
100
90
00200 400 600 800 k1
60
30
20
10
80
70
40
50
EF FICIENCY ( %)
VIN = 6V
VIN = 24V
L = 33µH
CIN = 22µF
COUT = 100µ F
VIN = 12V
00125-008
VIN = 30V
VIN = 18V
Figure 8. 5 V Output Efficiency
Data Sheet ADP3050
Rev. C | Page 7 of 20
V
IN
= 12V
OUTPUT CURRE NT (mA)
100
90
01k0200 400 600 800
60
30
20
10
80
70
40
50
EF FICIENCY ( %)
L = 33µH
C
IN
= 22µF
C
OUT
= 100µF
V
IN
= 5V
V
IN
= 18V
V
IN
= 24V V
N
= 30V
00125-009
Figure 9. 3.3 V Output Efficiency
TEMPERATURE (°C)
–0.5
OUTPUT V OL TAG E CHANGE ( %)
–45 –35 –25 –15 –5 515 25 35 45 55 65 75 85
00125-010
0.4
0.5
–0.4
–0.2
–0.3
–0.1
0.1
0
0.2
0.3
V
IN
= 10V
I
LOAD
= 1A
Figure 10. Output Voltage Change vs. Temperature
INPUT VOLTAGE (V)
0
OUTPUT V OL TAG E CHANGE ( %)
10 20 30
0.6
0.2
0.4
0
0.6
0.4
0.2
VOUT = 5V
ILOAD = 1A
ILOAD = 100mA
00125-011
Figure 11. 5 V Output Voltage Change vs. Input Voltage
INPUT VOLTAGE (V)
0
OUTPUT V OL TAG E CHANGE ( %)
10 20 30
0.6
0.2
0.4
0
0.6
0.4
0.2
VOUT = 3. 3V
ILOAD = 1A
ILOAD = 100mA
00125-012
Figure 12. 3.3 V Output Voltage Change vs. Input Voltage
LOAD CURRENT ( A)
8
5
2
MINIMUM INPUT VOLT AGE (V)
7
6
4
3
VOUT = 3. 3V
VOUT = 5V
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
00125-013
Figure 13. Minimum Input Voltage vs. Load Current
LOAD CURRENT ( A)
–0.18
OUTPUT V OL TAG E CHANGE ( %)
–0.16
–0.14
–0.12
–0.10
–0.08
–0.06
–0.04
–0.02
0V
IN
= 10V
00125-014
00.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Figure 14. Load Regulation
ADP3050 Data Sheet
Rev. C | Page 8 of 20
LOAD CURRENT ( A)
0.8
0
SWITCH SATURATION VOLTAGE (V)
0.1
0.2
0.3
0.4
0.5
0.6
0.7
VIN = 10V
00125-015
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Figure 15. Switch Saturation Voltage vs. Load Current
AMBI E NT TE M P E RATURE ( °C)
196
190
SW ITCHING FREQUENCY ( kHz )
198
194
192
204
200
208
202
V
IN
= 10V
I
LOAD
= 250µA
206
210
–45 –35 –25 –15 –5 515 25 35 45 55 65 75 85
00125-016
Figure 16. Switching Frequency vs. Temperature
NORM ALIZED FEE DBACK V OL TAGE ( V )
250
200
001.00.2 0.4 0.6 0.8
SW ITCHING FREQUENCY ( kHz )
150
100
50
VIN = 10V
COM P = 0.4V
00125-017
Figure 17. Frequency Foldback
TIME (1µs/DIV)
V
IN
= 10V
V
OUT
= 5V
I
LOAD
= 800mA
L = 33µH
C
IN
= 22µF
C
OUT
= 100µF
V
SW
= 5V/ DIV
I
L
= 500mA/DIV
0V
0A
00125-018
Figure 18. Continuous Conduction Mode Waveforms
TIME (1µs/DIV)
V
IN
= 10V
V
OUT
= 5V
I
LOAD
= 100mA
L = 33µH
C
IN
= 22µF
C
OUT
= 100µF
V
SW
= 5V/ DIV
I
L
= 500mA/DIV
0V
0A
00125-019
Figure 19. Discontinuous Conduction Mode Waveforms
TIME ( 400µs/ DIV)
V
OUT
= 200mV/ DIV
I
LOAD
5V
1A
0A
00125-020
V
IN
= 10V
V
OUT
= 5V
I
LOAD
= 100mA TO 1A SWI TCHED
L = 33µH
C
IN
= 22µF
C
OUT
= 100µF
Figure 20. Transient Response
Data Sheet ADP3050
Rev. C | Page 9 of 20
TIME ( 100µs/ DIV)
V
OUT
= 1V/ DIV
I
L
= 500mA/DIV
0V
0A
00125-021
V
IN
= 10V
V
OUT
= 5V
R
LOAD
= 19Ω
L = 33µH CO ILTRO NICS
UP2B-330
C
IN
= 22µF
C
OUT
= 100µF
Figure 21. Start-Up from Shutdown
TEMPERATURE (°C)
1150
1000
–45 –35
TRANS CONDUCTANCE ( µMho)
–25 –15 –5 515 25 35 45 55 65 75 85
1450
1200
1100
1050
1350
1250
1400
1300
1500
00125-022
V
IN
= 10V, NO L OAD
Figure 22. Error Amplifier Transconductance vs. Temperature
FRE QUENCY ( Hz )
11M100
MAG NITUDE ( dB)
1k 10k100k
57.6
48.0
38.4
28.8
19.2
9.6
0
–28.8
–19.2
–9.6
–38.4
220
200
180
160
140
120
100
40
60
80
20
PHASE ( Degrees)
NO LOAD
00125-023
Figure 23. Error Amplifier Gain
ADP3050 Data Sheet
Rev. C | Page 10 of 20
THEORY OF OPERATION
The ADP3050 is a fixed frequency, current mode buck regulator.
Current mode systems provide excellent transient response, and
are much easier to compensate than voltage mode systems (refer to
Figure 1). At the beginning of each clock cycle, the oscillator
sets the latch, turning on the power switch. The signal at the
noninverting input of the comparator is a replica of the switch
current (summed with the oscillator ramp). When this signal
reaches the appropriate level set by the output of the error amplifier,
the comparator resets the latch and turns off the power switch. In
this manner, the error amplifier sets the correct current trip
level to keep the output in regulation. If the error amplifier
output increases, more current is delivered to the output; if it
decreases, less current is delivered to the output.
The current sense amplifier provides a signal proportional to
switch current to both the comparator and to a cycle-by-cycle
current limit. If the current limit is exceeded, the latch is reset,
turning the switch off until the beginning of the next clock
cycle. The ADP3050 has a foldback current limit that reduces
the switching frequency under fault conditions to reduce stress
to the IC and to the external components.
Most of the control circuitry is biased from the 2.5 V internal
regulator. When the BIAS pin is left open, or when the voltage
at this pin is less than 2.7 V, all of the operating current for the
ADP3050 is drawn from the input supply. When the BIAS pin is
above 2.7 V, the majority of the operating current is drawn from
this pin (usually tied to the low voltage output of the regulator)
instead of from the higher voltage input supply. This can provide
substantial efficiency improvements at light load conditions,
especially for systems where the input voltage is much higher
than the output voltage.
The ADP3050 uses a special drive stage allowing the power
switch to saturate. An external diode and capacitor provide a
boosted voltage to the drive stage that is higher than the input
supply voltage. Overall efficiency is dramatically improved by
using this type of saturating drive stage.
Pulling the SD pin below 0.4 V puts the device in a low power
mode, shutting off all internal circuitry and reducing the supply
current to under 20 μA.
U1
ADP3050-3.3
V
IN
C3
220nF
D1
1N5818
12V
C1
22µF
+
L1
33µH
V
OUT
3.3V
R1
4kΩ C2
1nF
+C4
100µF
D2
1N4148
1
2
3
4
SWITCH
BOOST
BIAS
FB
IN
GND
SD
COMP
8
7
6
5
00125-024
Figure 24. Typical Application Circuit
SETTING THE OUTPUT VOLTAGE
The output of the adjustable version (ADP3050AR and
ADP3050ARZ) can be set to any voltage between 1.25 V and 12 V
by connecting a resistor divider to the FB pin as shown in
Figure 25.
−×= 1
2.1
OUT
V
R1R2
(1)
U1
ADP3050
VIN
R1
20kΩ
R2
21.5kΩ
CF
C3
0.22µF
D1
1N5817
GND
5V
C1
2×10µF
CERAMIC
+C2
0.01µF
L1
22µH
V
OUT
2.5V
R
C
7.5kΩ C
C
4.7nF
D2
1N4148
+C4
2×22µF
CERAMIC
1
2
3
4
8
7
6
5
00125-025
SWITCH
BOOST
BIAS
FB
IN
GND
SD
COMP
Figure 25. Adjustable Output Application Circuit
Data Sheet ADP3050
Rev. C | Page 11 of 20
APPLICATIONS INFORMATION
ADIsimPower DESIGN TOOL
The ADP3050 is supported by the ADIsimPower design tool set.
ADIsimPower is a collection of tools that produce complete power
designs optimized for a specific design goal. The tools enable
the user to generate a full schematic, bill of materials, and calculate
performance in minutes. ADIsimPower can optimize designs for
cost, area, efficiency, and parts count while taking into considera-
tion the operating conditions and limitations of the IC and all real
external components. For more information about ADIsimPower
design tools, refer to www.analog.com/ADIsimPower. The tool
set is available from this website, and users can request an
unpopulated board through the tool.
The complete process for designing a step-down switching
regulator using the ADP3050 is provided in the following
sections. Each section includes a list of recommended devices.
These lists do not include every available device or manufacturer.
They contain only surface-mount devices. Equivalent through-
hole devices can be substituted if needed. In choosing components,
keep in mind what is most important to the design, for example,
efficiency, cost, and size. These ultimately determine which compo-
nents are used. It is also important to ensure that the design
specifications are clearly defined and reflect the worst-case
conditions. Key specifications include the minimum and
maximum input voltage, the output voltage and ripple, and the
minimum and maximum load current.
INDUCTOR SELECTION
The inductor value determines the mode of operation for the
regulator: continuous mode, where the inductor current flows
continuously; or discontinuous mode, where the inductor current
reduces to zero during every switch cycle. Continuous mode is
the best choice for many applications. It provides higher output
power, lower peak currents in the switch, inductor, and diode,
and a lower inductor ripple current, which means lower output
ripple voltage. Discontinuous mode allows the use of smaller
magnetics, but at a price: lower available load current and
higher peak and ripple currents. Designs with a high input
voltage or a low load current often operate in discontinuous
mode to minimize inductor value and size. The ADP3050 is
designed to work well in both modes of operation.
Continuous Mode
The inductor current in a continuous mode system is a triangular
waveform (equal to the ripple current) centered around a dc
value (equal to the load current). The amount of ripple current
is determined by the inductor value, and is usually between 20%
and 40% of the maximum load current. To reduce the inductor
size, ripple currents between 40% and 80% are often used in
continuous mode designs with a high input voltage or a low
output current.
The inductor value is calculated using the following equation:
)(
)( 1
MAXIN
OUT
SW
RIPPLE
OUT
MAXIN
V
V
fI
VV
L××
−
= (2)
Where VIN(MAX) is the maximum input voltage, VOUT is the
regulated output voltage, and fSW is the switching frequency
(200 kHz). The initial choice for the amount of ripple current
may seem arbitrary, but it serves as a good starting point for
finding a standard off-the-shelf inductor value, such as
10 μH, 15 μH, 22 μH, 33 μH, and 47 μH. If a specific inductance
value is to be used, simply rearrange Equation 2 to find the
ripple current. For an 800 mA, 12 V to 5 V system, and a ripple
current of 320 mA (40% of 800 mA) is chosen, the inductance is
μH45.5
12
5
10200
1
0.32
512
3
=×
×
×
−
=L
A 47 μH inductor is the closest standard value that gives a ripple
current of about 310 mA. The peak switch current is equal to
the load current plus one-half the ripple current (this is also the
peak current for the inductor and the catch diode).
A95.0155.08.0
2
1
)()( =+=+= RIPPLE
MAXOUTPKSW III
(3)
Pick an inductor with a dc (or saturation) current rating about 20%
larger than ISW(PK) to ensure that the inductor is not running near
the edge of saturation. For this example, 1.20 × 0.95 A = 1.14 A, use
an inductor with a dc current rating of at least 1.2 A. The maxi-
mum switch current is internally limited to 1.5 A, and this limit,
along with the ripple current, determines the maximum load
current the system can provide.
If the load current decreases to below one-half the ripple
current, the regulator operates in discontinuous mode.
Discontinuous Mode
For load currents less than approximately 0.5 A, discontinuous
mode operation can be used. This allows the use of a smaller
inductor, but the ripple current is much higher (which means a
higher output ripple voltage). If a larger output capacitor must
be used to reduce the output ripple voltage, the overall system
may take up more board area than if a larger inductor is used.
The operation and equations for the two modes are quite different,
but the boundary between these two modes occurs when the ripple
current is equal to twice the load current (when IRIPPLE = 2 × IOUT).
From this, Equation 2 is used to find the minimum inductor
value needed to keep the system in continuous mode operation
(solve for the inductor value with IRIPPLE = 2 × IOUT).
)(
)( 1
2MAXIN
OUT
SW
OUT
OUT
MAXIN
DIS V
V
fI
VV
L××
×
−
= (4)
Using an inductor below this value causes the system to operate
in discontinuous mode.
ADP3050 Data Sheet
Rev. C | Page 12 of 20
For a 400 mA, 24 V to 5 V system
μH7.24
24
5
10200
1
4.02
524
3≤×
×
×
×
−
≤
DIS
L
If the chosen inductor value is too small, the internal current
limit trips each cycle and the regulator has trouble providing the
necessary load current.
Inductor Core Types and Materials
Many types of inductors are currently available. Numerous core
styles along with numerous core materials often make the selection
process seem even more confusing. A quick overview of the
types of inductors available makes the selection process a little
easier to understand.
Open core geometries (bobbin core) are usually less expensive
than closed core geometries (toroidal core) and are a good choice
for some applications, but care must be taken when they are
used. In open core inductors, the magnetic flux is not completely
contained inside the core. The radiating magnetic field generates
electromagnetic interference (EMI), often inducing voltages
onto nearby circuit board traces. These inductors may not be
suitable for systems that contain very high accuracy circuits or
sensitive magnetics. A few manufacturers have semiclosed and
shielded cores, where an outer magnetic shield surrounds a
bobbin core. These devices have less EMI than the standard
open core and are usually smaller than a closed core.
Most core materials used in surface-mount inductors are either
powdered iron or ferrite. For many designs, material choice is
arbitrary, but the properties of each material should be recognized.
Ferrites have lower core losses than powdered iron, but the
lower loss means a higher price. Powdered iron cores saturate
softly (the inductance gradually reduces as current rating is
exceeded), whereas ferrite cores saturate much more abruptly
(the inductance rapidly reduces). Kool Mμ® is one type of ferrite
that is specially designed to minimize core losses and heat
generation (especially at switching frequencies above 100 kHz),
but again, these devices are more expensive.
The winding dc resistance (DCR) of the inductor must not be
overlooked. A high DCR can decrease system efficiency by 2%
to 5% for lower output voltages at heavy loads. To obtain a
lower DCR means using a physically larger inductor, so a trade-
off in size and efficiency must be made. The power loss due to this
resistance is IOUT2 × DCR. For an 800 mA, 5 V to 3.3 V system
with an inductor DCR of 100 mΩ, the winding resistance
dissipates
(0.82 A)2 × 0.1 Ω = 64 mW. This represents a power loss to the
system of 64 mW/(3.3 V × 800 mA) = 2.4%. Typical DCR
values are between 10 mΩ and 200 mΩ.
Choosing an Inductor
Several considerations must be made when choosing an inductor:
cost, size, EMI, core and copper losses, and maximum current
rating. Use the following steps to choose an inductor that is
right for the system (refer to the calculations and descriptions
in the Inductor Selection section). Contact the manufacturers
for their full product offering, availability, and pricing. The
manufacturers offer many more values and package sizes to suit
numerous applications.
1. Choose a mode of operation, then calculate the inductor
value using the appropriate equation. For continuous mode
systems, a ripple current of 40% of the maximum load current
is a good starting point. The inductor value can then be
increased or decreased, if desired.
2. Calculate the peak switch current (this is the maximum
current seen by the inductor). Make sure that the dc (or
saturation) current rating of the inductor is high enough
(around 1.2× the peak switch current). Inductors with dc
current ratings of at least 1 A should be used for all
designs. This provides a safety margin for start-up and
fault conditions where the inductor current is higher than
normal. If the current rating of an inductor is exceeded, the
core saturates, causing the inductance value to decrease
and the temperature of the inductor to increase.
3. Estimate the dc winding resistance based on the inductance
value. A general rule is to allow approximately 5 mΩ of
resistance per μH of inductance.
4. Pick the core material and type. First, decide if an open-
core inductor can be used with the design. If this cannot be
determined, try a few samples of each type (open core,
semi closed core, shielded core, and closed core). Do not be
discouraged from using open core inductors because they
require extra care; just be aware of what to look for if used.
They are quite small and inexpensive, and are used
successfully in many different applications.
OUTPUT CAPACITOR SELECTION
The ADP3050 can be used with any type of output capacitor.
The trade-offs between price, component size, and regulator
performance can be evaluated to determine the best choice for
each application. The effective series resistance (ESR) of the
capacitor plays an important role in both the loop compensation
and the system performance. The ESR provides a 0 in the
feedback loop; therefore, the ESR value must be known so the
loop can be compensated correctly (most manufacturers specify
maximum ESR in their data sheets). The capacitor ESR also
contributes to the output ripple voltage (VRIPPLE = ESR × IRIPPLE).
Solid tantalum or multilayer ceramic capacitors are recommended,
providing good performance with a small size and reasonable cost.
Solid tantalum capacitors have a good combination of low ESR
and high capacitance, and are available from several different
manufacturers. Capacitance values from 22 μF to more than 500 μF
can be used, but values of 47 μF to 220 μF are sufficient for most
designs. A smaller value can be used, but ESR is size-dependent,
so a smaller device has a higher ESR. Ensure that the ripple
current of the capacitor rating is larger than the inductor ripple
current (the ripple current flows into the output capacitor).
Multilayer ceramic capacitors can be used in applications where
minimum output voltage ripple is a priority. They have a very
Data Sheet ADP3050
Rev. C | Page 13 of 20
low ESR (a 22 μF ceramic can have an ESR one-fifth that of a
22 μF solid tantalum), but may require more board area for the
same value of output capacitance. A few manufacturers have
recently improved upon their low voltage ceramic capacitors,
providing a smaller package with a lower ESR (NEC Tokin,
Murata, Taiyo Yuden, and AVX). Several ceramics can be used
in parallel to give an extremely low ESR and a good value of
capacitance. If the design is cost sensitive and not severely space
limited, several aluminum electrolytic capacitors can be used in
parallel (their size and ESR are larger than ceramic and solid
tantalum). OS-CON capacitors can also be used, but they are
typically larger and more expensive than ceramic or solid
tantalum capacitors.
Choosing an Output Capacitor
Use the following steps to choose an appropriate capacitor.
1. Decide the maximum output ripple voltage for the design,
and this determines your maximum ESR (remember that
VRIPPLE ≈ ESR × IRIPPLE). Typical output ripple voltages range
between 0.5% and 2% of the output voltage. To lower the
output voltage ripple, there are only two choices: either
increase the inductor value, or use an output capacitor with
a lower ESR.
2. Decide what type of capacitor to use (tantalum, ceramic, or
others). Many more values, sizes, and voltage ratings are
available, so contact each manufacturer for a complete
product list. If a certain type of capacitor must be used and
space permits, use several devices in parallel to reduce the
total ESR.
3. Check the capacitor voltage rating and ripple current rating
to ensure it works for the application in question. These
ratings are derated for higher temperatures, so always check
the manufacturer’s data sheet.
4. Make sure the final choice for the output capacitor has
been optimized for cost, size, availability, and performance
yet still meets the required capacitance. The recommended
capacitance is in the 47 μF to 220 μF range.
CATCH DIODE SELECTION
The recommended catch diode is a Type 1N5818 Schottky or
equivalent. The low forward voltage drop (450 mV typical at
1 A) and fast switching speed of a Schottky rectifier provide the
best performance and efficiency. The 1N5818 is rated at 30 V
reverse voltage and 1 A average forward current. For lower
input voltages, use a lower voltage Schottky to reduce the diode
forward voltage drop and increase overall system efficiency; for
example, a 12 V to 5 V system does not need a 30 V diode. For
automotive applications, a 60 V Schottky may be necessary. The
average forward current for the catch diode is calculated by
IN
OUT
IN
OUT
AVGDIODE V
VV
II
−
×=
)( (5)
For the earlier continuous mode example (12 V to 5 V at
800 mA), the average diode current is
A47.0
12
512
8.0
)( =
−
×=
AVGDIODE
I (6)
For this system, a 1N5817 is a good choice (rated at 20 V and 1 A).
Do not use catch diodes rated less than 1 A. Even though the
average current can be less than 1 A under normal operating
conditions, as the diode current is much higher under fault
conditions. The worst-case fault condition for the diode occurs
when the regulator becomes slightly overloaded (sometimes
called a soft short). This is usually only a problem when the
input voltage to output voltage ratio is greater than 2.5. Under
this condition, the load current needed is slightly more than the
regulator can provide. The output voltage droops slightly, and
the switch stays on every cycle until the internal current limit is
reached. Under this condition, the load current can reach
around 1.2 A. For example, when using a system with an input
voltage of 24 V and an output voltage of 5 V, if a gradual overload
causes the output voltage to droop to 4 V, the average diode
current is
A0.1
24
424
2.1
)(
=
−
×=
AVGDIODE
I
(7)
If the system must survive such gradual overloads for a prolonged
period of time, ensure the diode chosen can survive these
conditions. A larger 2 A or 3 A diode can be used if necessary.
Table 4. Manufacturers
Inductor Manufacturers Capacitor Manufacturers Schottky Diode Manufacturers
Sumida AVX Motorola
Coilcraft Kemet Diodes, Inc.
Cooper Bussmann Coiltronics Murata International Rectifier
NEC Tokin Nemco Nihon Inter Electronics
Würth Elektronik Vishay Sprague
Toko NEC Tokin
Taiyo Yuden
ADP3050 Data Sheet
Rev. C | Page 14 of 20
Choosing a Catch Diode
Use the following steps to pick an appropriate catch diode.
Table 5 shows several Schottky rectifiers with different reverse
voltage and forward current ratings.
The average diode current rating must be sufficient to provide
the required load current (see the calculations in the previous
section). Diodes rated below 1 A should not be used, even if the
average diode current is much lower.
The reverse voltage rating of the catch diode should be at least the
maximum input voltage. Often a higher rating is chosen
(1.2× the maximum input voltage) to provide a safety margin.
Table 5. Schottky Diode Selection Guide
VR 1 A 2 A 3 A
15 V 10BQ15 30BQ15
20 V 1N5817 B220 SK32
30 V V1N5818 B230 SK33
40 V 1N5819 B240 SK34
INPUT CAPACITOR SELECTION
The input bypass capacitor plays an important role in proper
regulator operation, minimizing voltage transients at the input
and providing a short local loop for the switching current. Place
this capacitor close to the ADP3050 between the IN and GND
pins using short, wide traces. This input capacitor should have
an rms ripple current rating of at least
2
)(
−×≥
IN
OUT
IN
OUT
OUT
RMSCIN V
V
V
V
II (8)
This rating is crucial because the input capacitor must be able to
withstand the large current pulses present at the input of a step-
down regulator. Values of 20 μF to 50 μF are typical, but the
main criteria for capacitor selection is the ripple current and
voltage ratings.
Ceramics are an excellent choice for input bypassing, due to
their low ESR and high ripple current rating. Ceramics are
especially suited for high input voltages and are available from
many different manufacturers. Tantalums are often used for
input bypassing, but precautions must be taken because they
occasionally fail when subjected to large inrush currents during
power-up. These surges are common when the regulator input
is connected to a battery or high capacitance supply. Several
manufacturers now offer surface-mount solid tantalum capacitors
that are surge tested, but even these devices can fail if the current
surge occurs when the capacitor voltage is near its maximum
rating. For this reason, a 2:1 derating is suggested for tantalum
capacitors used in applications where large inrush currents are
present. For example, a 20 V tantalum should be used only for
an input voltage up to 10 V. Aluminum electrolytics are the
cheapest choice, but it takes several in parallel to get a good rms
current rating. OS-CON capacitors have a good ESR and ripple
current rating, but they are typically larger and more costly.
Refer to Table 4 for a list of capacitor manufacturers.
DISCONTINOUS MODE RINGING
When operating in discontinuous mode, high frequency
ringing appears at the switch node when the inductor current
has decreased to zero. This ringing is normal and is not a result
of loop instability. It is caused by the switch and diode capacitance
reacting with the inductor to form a damped sinusoidal ringing.
This ringing is usually in the range of several megahertz, and is
not harmful to normal circuit operation.
SETTING THE OUTPUT VOLTAGE
The fixed voltage versions of the ADP3050 (3.3 V and 5 V) have
the feedback resistor divider included on-chip. For the adjustable
version, the output voltage is set using two external resistors.
Referring to Figure 25, pick a value for R1 between 10 kΩ and
20 kΩ, then calculate the appropriate value for R2 using the
following equation:
−×= 1
20.1
OUT
V
R1R2 (9)
It is important to note that the accuracy of these resistors
directly affects the accuracy of the output voltage. The FB pin
threshold variation is ±3%, and the tolerances of R1 and R2 add
to this to determine the total output variation. Use 1% resistors
placed close to the FB pin to prevent noise pickup.
FREQUENCY COMPENSATION
The ADP3050 uses a unique compensation scheme that allows
the use of any type of output capacitor. The designer is not
limited to a specific type of capacitor or a specific ESR range.
External compensation allows the designer to optimize the loop
for transient response and system performance. The values for
RC and CC set the pole and zero locations for the error amplifier
to compensate the regulator loop.
For tantalum output capacitors, the typical system compensation
values are RC = 4 kΩ and CC = 1 nF; for ceramics, the typical
values are RC = 4 kΩ and CC = 4.7 nF. These values may not be
optimized for all designs, but they provide a good starting point for
selecting the final compensation values. Other types of output
capacitors require different values of CC between 0.5 nF and 10 nF.
Typically, the lower the ESR of the output capacitor, the larger
the value for CC. Normal variations in capacitor ESR, output
capacitance, and inductor value (due to production tolerances,
changes in operating point, changes in temperature) affect the
loop gain and phase response. Always check the final design
over its complete operating range to ensure proper regulator
operation.
Adjusting the RC and CC values can optimize compensation. Use
the typical values above as a starting point, then try increasing
and decreasing each independently and observing the transient
response. An easy way to check the transient response of the
design is to observe the output while pulsing the load current at
a rate of approximately 100 Hz to 1 kHz. There should be some
slight ringing at the output when the load pulses, but this should
not be excessive (just a few rings). The frequency of this ringing
Data Sheet ADP3050
Rev. C | Page 15 of 20
shows the approximate unity-gain frequency of the loop. Again,
always check the design over its full operating range of input
voltage, output current, and temperature to ensure that the loop
is compensated correctly.
In addition to setting the zero location, RC also sets the high
frequency gain of the error amplifier. If this gain is too large,
output ripple voltage appears at the COMP pin (the output of
the error amplifier) with enough amplitude to interfere with
normal regulator operation. If this occurs, subharmonic switching
results (the pulse width of the switch waveform changes, even
though the output voltage stays regulated). The voltage ripple at the
COMP pin should be kept below 100 mV to prevent subharmonic
switching from occurring. The amount of ripple can be estimated
by the following formula, where gm is the error amplifier
transconductance (gm = 1250 μMho):
( ) ( )
OUT
FB
RIPPLE
C
m
RIPPLECOMP
V
V
ESRIRgV ××××=
,
(10)
For example, a 12 V to 5 V, 800 mA regulator with an inductor of
L = 47 μH has IRIPPLE = 310 mA (see example from the Continuous
Mode section) if a 100 μF tantalum output capacitor with a
maximum ESR of 100 mΩ and compensation values of RC = 4 kΩ
and CC = 1 nF are used. The ripple voltage at the COMP pin is
( ) ( )
mV2.37
0.5
20.1
1.0310.0104101250 36
,
=
××××××= −
RIPPLECOMP
V(11)
If this ripple voltage is more than 100 mV, RC needs to be
decreased to prevent subharmonic switching. Typical values for
RC are in the range of 2 kΩ to 10 kΩ.
For output voltages greater than 5 V, it may be necessary to add
a small capacitor in parallel with R2, as shown in Figure 25.
This improves stability and transient response. For tantalum
output capacitors, the typical value for CF is 100 pF. For ceramic
output capacitors, the typical value for CF is 400 pF.
CURRENT LIMIT/FREQUENCY FOLDBACK
The ADP3050 uses a cycle-by-cycle current limit to protect the
device under fault and high stress conditions. When the current
limit is exceeded, the power switch turns off until the beginning
of the next oscillator cycle. If the voltage on the feedback pin
drops below 80% of its nominal value, the oscillator frequency
starts to decrease (see Figure 17 in the Typical Performance
Characteristics section). The frequency gradually reduces to a
minimum value of approximately 80 kHz (this minimum
occurs when the feedback voltage falls to 30% of its nominal
value). This reduces the power dissipation in the IC, the
external diode, and the inductor during short-circuit
conditions. This frequency foldback method provides complete
device fault protection without interfering with the normal
device operation.
BIAS PIN CONNECTION
To help improve efficiency, most of the internal operating
current can be drawn from the lower voltage regulated output
voltage instead of the input supply. For example, if the input
voltage is 24 V and the output voltage is 5 V, a quiescent current
of 4 mA wastes 96 mW if drawn from the input supply, but only
20 mW is drawn from the regulated 5 V output. This power
savings is most evident at high input voltages and low load
currents. The output voltage must be 3 V or higher to take
advantage of this feature.
BOOSTED DRIVE STAGE
An external capacitor and diode are used to provide the boosted
voltage needed for the special drive stage. If the output voltage is
above 4 V, connect the anode of the boost diode to the regulated
output; for output voltages less than or equal to voltages of ≤3 V,
connect it to the input supply. For some low voltage systems,
such as 5 V to 3.3 V converters, the anode of the boost diode
can be connected to either the input or output voltage. During
switch off time, the boost capacitor is charged up to the voltage
at the anode of the boost diode. When the switch turns on, this
voltage is added to the switch voltage (the boost diode is reverse-
biased), providing a voltage higher than the input supply. The
peak voltage appearing on the BOOST pin is the sum of the
input voltage and the boost voltage (either VIN + VOUT or 2 × VIN).
Ensure that this peak voltage does not exceed the BOOST pin
maximum rating of 45 V.
For most applications, a 1N4148 or 1N914 type diode can be
used with a 220 nF capacitor. A 470 nF capacitor may be needed
for output voltages between 3 V and 4 V. The boost capacitor
should have an ESR of less than 2 Ω to ensure that it is adequately
charged up during switch off time. Almost any type of film or
ceramic capacitor can be used.
START-UP/MINIMUM INPUT VOLTAGE
For most designs, the regulated output voltage provides the
boosted voltage for the drive stage. During startup, the output
voltage is 0, so there is no boosted supply for the drive stage.
To deal with this problem, the ADP3050 contains a backup drive
stage to get everything started. As the output voltage increases,
so does the boost voltage. When the boost voltage reaches approx-
imately 2.5 V, the switch drives transition smoothly from the
backup driver to the boosted driver. If the boost voltage decreases
below approximately 2.5 V, resulting in a short-circuit or
overload condition, the backup stage takes over to provide switch
drive. The minimum input voltage needed for the ADP3050 to
function correctly is about 3.6 V (this ensures proper operation of
the internal circuitry), but a small amount of headroom is needed
for all step-down regulators. The following formula gives the
approximate minimum input voltage needed for a given system,
where VSAT is the switch saturation voltage (see Figure 15 for the
appropriate value of VSAT). Figure 13 also shows the typical
minimum input voltage needed for 3.3 V and 5 V systems.
ADP3050 Data Sheet
Rev. C | Page 16 of 20
85.0
)(
SATOUT
MININ
VV
V
+
= (12)
THERMAL CONSIDERATIONS
Several factors contribute to IC power dissipation: ac and dc
switch losses, boost current, and quiescent current. The following
formulas are used to calculate these losses to determine the power
dissipation of the IC. These formulas assume continuous mode
operation, but they provide a reasonable estimate for disconti-
nuous mode systems (do not use these formulas to calculate
efficiency at light loads).
Switch loss
( )
SW
IN
OUT
OV
IN
OUT
SATOUT
SW fVIt
V
V
VIP ×××+
××= (13)
Boost current loss
IN
OUT
SW
OUT
BOOST V
V
β
I
P
2
×= (14)
Quiescent current loss
( )
( )
BIAS
OUT
Q
IN
QIVIVP ×+×=
(15)
where:
VSAT is ~0.6 V at IOUT = 800 mA (taken from Figure 15).
fSW is the switch frequency (200 kHz).
tOV is the switch current/voltage overlap time (~50 ns).
βSW is the current gain of the NPN power switch (~50).
IQ is the quiescent current drawn from VIN (~1 mA).
IBIAS is the quiescent current drawn from VOUT (~4 mA).
For example, a 5 V to 3.3 V system with IOUT = 800 mA
( )
mW357102000.5
8.01050
0.5
3.3
6.08.0
39 =×××××
+
××=
−
SW
P
mW35
0.5
3.3
50
8.0 2=×=
BOOST
P
( ) ( )
mW181043.3105 33 =××+×= −−
Q
P
For a total IC power dissipation of
mW410
=++=
Q
BOOST
SW
TOTAL PPPP (16)
The ADP3050 is offered in a thermally enhanced (not Pb-free)
8-lead SOIC package with a thermal resistance, θJA, of 60.6°C/W,
and in a standard Pb-free 8-lead SOIC package with θJA of
87.5°C / W.
The maximum die temperature, TJ, is calculated using the
thermal resistance and the maximum ambient temperature
TOTAL
JAA
JPθTT
×+=
(17)
For the previous example (5 V to 3.3 V at 800 mA system, Pb-
free 8-lead SOIC package using good layout techniques) with a
worst-case ambient temperature of 70°C
TJ = 70°C + 87.5°C/W × 0.41 = 105.9°C
The maximum operating junction (die) temperature is 125°C,
therefore this system operates within the safe limits of the
ADP3050. Check the die temperature at minimum and
maximum supply voltages to ensure proper operation under all
conditions. Although the PCB and its copper traces provide
sufficient heat sinking, it is important to follow the layout
suggestions in the Board Layout Guidelines section. For any
design that combines high output current with high duty cycle
and/or high input voltage, the junction temperature must be
calculated to ensure normal operation. Always use the
equations in this section to estimate the power dissipation.
Data Sheet ADP3050
Rev. C | Page 17 of 20
BOARD LAYOUT GUIDELINES
A good board layout is essential when designing a switching
regulator. The high switching currents along with parasitic
wiring inductances can generate significant voltage transients
and cause havoc in sensitive circuits. For best results, keep the
main switching path as tight as possible (keep L1, D1, CIN, and
COUT close together) and minimize the copper area of the SWITCH
and BOOST nodes (without violating current density require-
ments) to reduce the amount of noise coupling into other
sensitive nodes.
ADP3050
GND
IN SWITCH
C
IN
V
IN
GND
D1 C
OUT
L1
V
OUT
GND
00125-026
Figure 26. Main Switching Path
The external components should be located as close to the
ADP3050 as possible. For best thermal performance, use wide
copper traces for all IC connections, and always connect the
GND pin to a large piece of copper or ground plane. The additional
copper improves heat transfer from the IC, greatly reducing the
package thermal resistance. Further improvements of the thermal
performance can be made by using multilayer boards and using
vias to transfer heat to the other layers. A single layer board
layout is shown in Figure 27. The amount of copper used for the
input, output, and ground traces can be reduced, but were made
large to improve the thermal performance. For the 5 V and 3.3 V
versions, leave out R1 and R2; for the adjustable version, remove
the trace that shorts out R2. Route all sensitive traces and compo-
nents, such as those associated with feedback and compensation,
away from the BOOST and SWITCH traces.
TYPICAL APPLICATIONS
5 V to 3.3 V Buck (Step-Down) Regulator
The circuit in Figure 28 shows the ADP3050 in a buck
configuration. It is used to generate 3.3 V regulated output from
5 V input voltage with the following specifications:
VIN = 4.5 V to 5.5 V
VOUT = 3.3 V
IOUT = 0.75 A
IRIPPLE = 0.4 A × 0.75 A = 0.3 A
VOUT_RIPPLE = 50 mV
OUTPUT GROUND INPUT
C1
L1 C3
D1
D2
R2 R1 CC RC
C2
ADP3050
00125-027
Figure 27. Recommended Board Layout
U1
ADP3050-3.3
V
IN
C3
0.22µF
D1
1N5817
GND
5V
C1
22µF
+C2
0.01µF
L1
22µH
V
OUT
3.3V
R1
7.5kΩ C4
1nF
D2
1N4148 +C5
100µF
SD
1
2
3
4
8
7
6
5
00125-028
SWITCH
BOOST
BIAS
FB
IN
GND
SD
COMP
Figure 28. 5 V to 3.3 V Buck Regulator
ADP3050 Data Sheet
Rev. C | Page 18 of 20
INVERTING (BUCK BOOST) REGULATOR
The circuit in Figure 29 shows the ADP3050 in a buck-boost
configuration that produces a negative output voltage from a
positive input voltage. This topology looks quite similar to the
buck shown in Figure 28 (except the IC and the output filter are
now referenced to the negative output instead of ground), but
its operation is quite different. For this topology, the feedback
pin is grounded and the GND pin is tied to the negative output,
allowing the feedback network of the IC to regulate the negative
output voltage.
00125-029
U1
ADP3050-5
V
IN
D1
1N5818
GND
12V
C1
22µF
C3
0.22µF
+C2
0.01µF
R1
5.1kΩ C4
3.3nF
D2
1N4148 +
C5
100µF
SD –5V AT 0.5A
V
OUT
L1
47µH
1
2
3
4
8
7
6
5
SWITCH
BOOST
BIAS
FB
IN
GND
SD
COMP
Figure 29. Inverting (Buck-Boost) Regulator
The design procedure used for the standard buck converter
cannot be used for a buck-boost converter due to fundamental
differences in how the output voltage is generated. The switch
currents in the buck-boost are much higher than the standard
buck converter, thus lowering the available load current. To
calculate the maximum output current for a given maximum
switch current, use the following equation:
( )
+×××
×
−
×
+
=
OUT
IN
SW
OUT
IN
MAXSW
OUT
IN
IN
MAXOUT
VVLf
VV
I
VV
V
I
2
)(
)(
(18)
where ISW(MAX) is the switch current limit rating of the ADP3050,
and VIN is the minimum input voltage. The inductor ripple
current is estimated using the following equation:
OUT
MAXIN
OUT
SW
MAXIN
RIPPLE VV
V
fL
V
I+
××=
)(
)( 1 (19)
For the circuit in Figure 29, the maximum ripple current (at the
maximum input voltage) is
A375.0
512
5
10200
1
1047
12
36 =
−+
−
×
×
×
×
=−
RIPPLE
I
High ripple currents are present in both the input and output
capacitors, and their ripple current ratings must be large
enough to sustain the large switching currents present in this
topology. The capacitors should have a ripple current rating of
at least
IN
OUT
OUT
CCRMS V
V
II
OUT
IN
×≈
),(
(20)
The peak current seen by the diode, switch, and inductor is
found by rearranging the load current equation
×+
×
+
=RIPPLE
OUT
IN
OUT
IN
PEAK II
V
VV
I2
1
(21)
The largest peak currents occur at the lowest input voltage. For
this design with a load current of 500 mA
A9.0375.0
2
1
5.0
12
512 =
×+
×
−+
=
PEAK
I (22)
The average current diode is equal to the load current.
An inductor with a current rating 20% greater than 0.9 A
should be used (a rating of at least 1.2 A). Inductors and diodes
with ratings greater than 1 A should always be used, even if
the calculated peak and average currents are lower. This ensures
that start-up and fault conditions do not overstress the
components.
For the buck-boost topology, the input voltage can be less than
the output voltage, such as VIN = 4 V or VOUT = −5 V, but the
available load current is even lower. The equations given in this
section are valid for input voltages less than and greater than
the output voltage. The voltage seen by the ADP3050 is equal to
the sum of the input and output voltages (the BOOST pin sees
the sum of VIN + 2 × |VOUT|). It is important to ensure that the
maximum voltage rating of these pins is not exceeded.
Data Sheet ADP3050
Rev. C | Page 19 of 20
Dual Output SEPIC Regulator
For many systems, a dual polarity supply is needed. The circuit
in Figure 30 generates both a positive and a negative 5 V output
using a single magnetic component. The two inductors shown
are actually two separate windings on a single core contained in a
small, surface-mount package. The windings can be connected in
parallel or in series to be used as a single inductor for a conven-
tional buck regulator, or they can be used as a 1:1 transformer,
as in this application. The first winding is used as the standard
buck inductor for the +5 V output. The second winding is used
to generate the −5 V output along with D2, C6, and C7.
00125-030
C1
22µF C2
0.01µF
1
2
3
4
8
7
6
5
U1
ADP3050-5
V
IN
C3
0.22µF
D1
1N5818
GND
12V
+
L1*
25µH
V
OUT
+5V AT 0.5A
R1
5.1kΩ C4
1nF
D3
1N4148 +C5
100µF
SD
*INDUCTOR IS A S ING LE CORE
WITH TWO WINDINGS
COILTRO NICS CTX25- 4
–5V AT 0.25A
V
OUT
+
C6
100µF
L1*
25µH
+C7
100µF
D2
1N5818
SWITCH
BOOST
BIAS
FB
IN
GND
SD
COMP
Figure 30. Dual Output +5 V and −5 V Regulator
These components form a single-ended primary inductance
converter (SEPIC) using the 1:1 coupled inductor to generate
the negative supply. When the switch is off, the voltage across
the buck winding is equal to VO + VD (VD is the diode drop).
This voltage is generated across the second winding, which is
connected to produce the −5 V supply. The −5 V output is
generated even without C6 in the circuit, but its inclusion
greatly improves the regulation of the negative output and
lowers the inductor ripple current. The total output current
available for both supplies is limited by the ADP3050 (internally
limited to around 1.0 A).
Keeping load currents below 500 mA and 250 mA, for the
positive and negative supplies, respectively, ensures that the
current limit is not reached under normal operation. These
limits are not interchangeable; 500 mA cannot be drawn from
the −5 V supply while drawing only 250 mA from the +5 V
supply. The maximum current available from the −5 V output is
directly related to the +5 V load current, due to the fact that the
+5 V output is used to regulate both supplies. Typically, the −5 V
load current should be around one-half of the +5 V load current
to ensure good regulation of both outputs. Additionally, the −5 V
output should have a preload (the minimum current level) of
1% to 2% of the +5 V load current. This helps maintain good
regulation of the −5 V output at light loads.
The ripple voltage of the +5 V output is that of a normal buck
regulator as described in the Applications Information section.
This ripple voltage is determined by the inductor ripple current
and the ESR of the output capacitor. For Figure 30, the positive
output voltage ripple is a 30 mV peak-to-peak triangular wave.
The ripple voltage of the −5 V output is a rectangular wave, due
to the rectangular shape of the current waveform into the −5 V
output capacitor. The amplitude of this current waveform is
approximately equal to twice the −5 V load current. For a load
current of 200 mA and an ESR of 100 mΩ, the negative output
voltage ripple is approximately 2 × 200 mA × 100 mΩ, or about
40 mV. The edges of this ripple waveform are quite fast. Along
with the inductance of the output capacitor, it generates narrow
spikes on the negative output voltage. These spikes can easily be
filtered out using an additional 5 μF to 10 μF bypass capacitor
close to the load (the inductance of the PCB trace and the
additional capacitor create a low-pass filter to remove these
high frequency spikes).
ADP3050 Data Sheet
Rev. C | Page 20 of 20
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00(0.1968)
4.80(0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 31. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1 Output Voltage Temperature Range2 Package Description Package Option Ordering Quantity
ADP3050ARZ ADJ −40°C to +85°C 8-Lead SOIC_N R-8 98
ADP3050ARZ-RL ADJ −40°C to +85°C 8-Lead SOIC_N R-8 2,500
ADP3050ARZ-R7 ADJ −40°C to +85°C 8-Lead SOIC_N R-8 1,000
ADP3050ARZ-3.3 3.3 V −40°C to +85°C 8-Lead SOIC_N R-8 98
ADP3050ARZ-3.3-RL 3.3 V −40°C to +85°C 8-Lead SOIC_N R-8 2,500
ADP3050ARZ-3.3-RL7 3.3 V −40°C to +85°C 8-Lead SOIC_N R-8 1,000
ADP3050ARZ-5 5 V −40°C to +85°C 8-Lead SOIC_N R-8 98
ADP3050ARZ-5-REEL 5 V −40°C to +85°C 8-Lead SOIC_N R-8 2,500
ADP3050ARZ-5-REEL7 5 V −40°C to +85°C 8-Lead SOIC_N R-8 1,000
ADP3050-EVALZ Evaluation Board
1 Z = RoHS Compliant Part.
2 Operating junction temperature is −40 to +125°C.
©2008–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00125-0-6/12(C)
