Features * Fast read access time - 90ns * Dual voltage range operation * * * * * * * * * - Low voltage power supply range, 3.0V to 3.6V, or - Standard power supply range, 5V 10% Compatible with JEDEC standard Atmel(R) AT27C512R Low-power CMOS operation - 20A max standby (less than 1A, typical) for VCC = 3.6V - 29mW max active at 5MHz for VCC = 3.6V JEDEC standard package - 32-lead PLCC High-reliability CMOS technology - 2,000V ESD protection - 200mA latchup immunity Rapid programming algorithm - 100s/byte (typical) CMOS- and TTL-compatible inputs and outputs - JEDEC standard for LVTTL Integrated product identification code Industrial temperature range Green (Pb/halide-free) packaging option 1. 512K (64K x 8) Low Voltage, One-time Programmable, Read-only Memory Atmel AT27LV512A Description The Atmel AT27LV512A is a high-performance, low-power, low-voltage, 524,288-bit, onetime programmable, read-only memory (OTP EPROM) organized as 64K by 8 bits. It requires only one supply in the range of 3.0 to 3.6V in normal read mode operation, making it ideal for fast, portable systems using battery power. The Atmel innovative design techniques provide fast speeds that rival 5V parts, while keeping the low power consumption of a 3.3V supply. At VCC = 3.0V, any byte can be accessed in less than 90ns. With a typical power dissipation of only 18mW at 5MHz and VCC = 3.3V, the AT27LV512A consumes less than one-fifth the power of a standard, 5V EPROM. Standby mode supply current is typically less than 1A at 3.3V. The AT27LV512A is available in industry-standard, JEDEC-approved, one-time programmable (OTP) PLCC package. All devices feature two-line control (CE, OE) to give designers the flexibility to prevent bus contention. The AT27LV512A operating with VCC at 3.0V produces TTL-level outputs that are compatible with standard TTL logic devices operating at VCC = 5.0V. The device is also capable of standard, 5V operation, making it ideally suited for dual supply range systems or card products that are pluggable in both 3V and 5V hosts. The AT27LV512A has additional features to ensure high quality and efficient production use. The rapid programming algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100s/byte. The integrated product identification code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. The AT27LV512A programs in exactly the same way as a standard, 5V Atmel AT27C512R, and uses the same programming equipment. 0607G-EPROM-4/11 Pin configurations Addresses O0 - O7 Outputs CE Chip enable OE/VPP Output enable/ Program supply NC No connect A7 A12 A15 NC VCC A14 A13 A0 - A15 32-lead PLCC Top view A6 A5 A4 A3 A2 A1 A0 NC O0 4 3 2 1 32 31 30 Function 5 6 7 8 9 10 11 12 13 29 28 27 26 25 24 23 22 21 14 15 16 17 18 19 20 Pin name A8 A9 A11 NC OE/VPP A10 CE O7 O6 O1 O2 GND NC O3 O4 O5 2. Note: 3. PLCC package pins 1 and 17 are don't connect System Considerations Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device nonconformance. At a minimum, a 0.1F, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7F bulk electrolytic capacitor should be utilized, again connected between the VCC and ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. Figure 3-1. 2 Block diagram Atmel AT27LV512A 0607G-EPROM-4/11 Atmel AT27LV512A 4. Absolute maximum ratings* *NOTICE: Temperature under bias . . . . . . . . . . . . . . . -40C to +85C Storage temperature . . . . . . . . . . . . . . . . .-65C to +125C Voltage on any pin with respect to ground . . . . . . . . . . . . . . . . . . . -2.0V to +7.0V(1) Stresses beyond those listed under "Absolute maximum ratings" may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Voltage on A9 with respect to ground . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1) VPP supply voltage with respect to ground . . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1) Note: 5. 1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is VCC + 0.75V DC, which may be exceeded if certain precautions are observed (consult application notes), and which may overshoot to +7.0 volts for pulses of less than 20ns. DC and AC characteristics Table 5-1. Operating modes Mode/Pin CE OE/VPP Ai VCC Outputs VIL VIL Ai VCC DOUT VIL VIH (1) VCC High Z VIH X X VCC High Z Rapid program VIL VPP Ai VCC DIN PGM inhibit(3) VIH VPP X VCC High Z VCC Identification code Read(2) (2) Output disable (2) Standby (3) X (4) Product identification(3)(5) Notes: VIL VIL A9 = VH A0 = VIH or VIL A1 - A15 = VIL 1. X can be VIL or VIH. 2. Read, output disable, and standby modes require 3.0V VCC 3.6V or 4.5V VCC 5.5V. 3. Refer to programming characteristics. Programming modes require VCC = 6.5V. 4. VH = 12.0 0.5V. 5. Two identifier bytes may be selected. All Ai inputs are held low (VIL) except A9, which is set to VH, and A0, which is toggled low (VIL) to select the manufacturer's identification byte and high (VIH) to select the device code byte. Table 5-2. DC and AC operating conditions for read operation Atmel AT27LV512A-90 Industrial operating temperature (case) -40C - 85C 3.0V to 3.6V VCC power supply 5V 10% 3 0607G-EPROM-4/11 Table 5-3. Symbol DC and operating characteristics for read operation Parameter Condition Min Max Units VCC = 3.0V to 3.6V ILI ILO IPP1 (2) Input load current VIN = 0V to VCC 1 A Output leakage current VOUT = 0V to VCC 5 A VPP(1) VPP = VCC 10 A ISB1 (CMOS), CE = VCC 0.3V 20 A ISB2 (TTL), CE = 2.0 to VCC + 0.5V 100 A 8 mA read/standby current ISB VCC(1) standby current ICC VCC active current VIL Input low voltage -0.6 0.8 V VIH Input high voltage 2.0 VCC + 0.5 V VOL Output low voltage IOL = 2.0mA 0.4 V VOH Output high voltage IOH = -2.0mA f = 5MHz, IOUT = 0mA, CE = VIL 2.4 V VCC = 4.5V to 5.5V ILI ILO IPP1 (2) Input load current VIN = 0V to VCC 1 A Output leakage current VOUT = 0V to VCC 5 A VPP(1) VPP = VCC 10 A ISB1 (CMOS), CE = VCC 0.3V 100 A ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1 mA f = 5MHz, IOUT = 0mA, CE = VIL 20 mA read/standby current ISB VCC(1) standby current ICC VCC active current VIL Input low voltage -0.6 0.8 V VIH Input high voltage 2.0 VCC + 0.5 V VOL Output low voltage IOL = 2.1mA 0.4 V VOH Output high voltage IOH = -400A Notes: 2.4 V 1. VCC must be applied simultaneously with or before OE/VPP, and removed simultaneously with or after OE/VPP. 2. OE/VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP. Table 5-4. AC characteristics for read operation VCC = 3.0V to 3.6V and 4.5V to 5.5V Atmel AT27LV512A-90 4 Symbol Parameter Condition tACC(3) Address to output delay tCE(2) tOE(2)(3) tDF(4)(5) OE/VPP or CE high to output float, whichever occurred first tOH Output hold from address, CE or OE/VPP, whichever occurred first Min Max Units CE = OE/VPP = VIL 90 ns CE to output delay OE/VPP = VIL 90 ns OE/VPP to output delay CE = VIL 50 ns 40 ns 0 ns Atmel AT27LV512A 0607G-EPROM-4/11 Atmel AT27LV512A Figure 5-1. Notes: AC waveforms for read operation(1) 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified. 2. OE/VPP may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 3. OE/VPP may be delayed up to tACC - tOE after the address is valid without impact on tACC. 4. This parameter is only sampled, and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. Figure 5-2. Input test waveforms and measurement levels tR, tF < 20ns (10% to 90%) Figure 5-3. Output test load Note: CL = 100pF including jig capacitance. 5 0607G-EPROM-4/11 Table 5-5. Pin capacitance f = 1MHz, T = 25C (1) Symbol Typ Max Units Conditions CIN 4 6 pF VIN = 0V COUT 8 12 pF VOUT = 0V Note: 1. Typical values for nominal supply voltage. This parameter is only sampled, and is not 100% tested. Figure 5-4. Notes: Programming waveforms(1) 1. The input timing reference is 0.8V for VIL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device, but must be accommodated by the programmer. 6 Atmel AT27LV512A 0607G-EPROM-4/11 Atmel AT27LV512A Table 5-6. DC programming characteristics TA = 25 5C, VCC = 6.5 0.25V, OE/VPP = 13.0 0.25V Limits Symbol Parameter Test conditions ILI Input load current VIN = VIL, VIH VIL Input low level VIH Input high level VOL Output low voltage IOL = 2.1mA VOH Output high voltage IOH = -400A ICC2 VCC supply current (program and verify) IPP2 OE/VPP current VID A9 product identification voltage Table 5-7. Min Max Units 10 A -0.6 0.8 V 2.0 VCC + 0.5 V 0.4 V 2.4 V CE = VIL 11.5 25 mA 25 mA 12.5 V AC programming characteristics TA = 25 5C, VCC = 6.5 0.25V, OE/VPP = 13.0 0.25V Limits Symbol Parameter Test conditions tAS Address setup time tOES OE/VPP setup time tOEH OE/VPP hold time tDS Data setup time tAH Address hold time tDH Data hold time Min Input rise and fall times: (10% to 90%) 20ns Input pulse levels: 0.45V to 2.4V (2) CE high to output float delay tDFP (3) tDV Data valid from CE tVR OE/VPP recovery time tPRT OE/VPP pulse rise time during programming 2 s 2 s 2 s 2 s 0 s 2 s 130 ns s 95 (2) Units 2 CE program pulse width tPW Max 0 Input timing reference level: 0.8V to 2.0V VCC setup time tVCS Notes: (1) Output timing reference level: 0.8V to 2.0V 105 s 1 s 2 s 50 ns 1. VCC must be applied simultaneously with or before OE/VPP and removed simultaneously with or after OE/VPP. 2. This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no longer driven. See timing diagram. 3. Program pulse width tolerance is 100s5%. Table 5-8. The Atmel AT27LV512A integrated product identification code(1) Pins Codes A0 O7 O6 O5 O4 O3 O2 O1 O0 Hex data Manufacturer 0 0 0 0 1 1 1 1 0 1E Device type 1 0 0 0 0 0 1 0 1 0D Note: 1. The Atmel AT27LV512A has the same product identification code as the Atmel AT27C512R. Both are programming compatible. 7 0607G-EPROM-4/11 6. Rapid programming algorithm A 100 s CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and OE/VPP is raised to 13.0V. Each address is first programmed with one 100s CE pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100s pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. OE/VPP is then lowered to VIL and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails. Figure 6-1. 8 Rapid programming algorithm Atmel AT27LV512A 0607G-EPROM-4/11 Atmel AT27LV512A 7. Ordering information Green package (Pb/halide-free) ICC (mA) tACC (ns) Active Standby Atmel ordering code Package Lead finish Operation range 90 8 0.02 AT27LV512A-90JU 32J Matte tin Industrial (-40C to 85C) Package type 32J 32-lead, plastic, J-leaded chip carrier (PLCC) 9 0607G-EPROM-4/11 8. Packaging information 32J - PLCC 1.14(0.045) X 45 PIN NO. 1 IDENTIFIER 1.14(0.045) X 45 0.318(0.0125) 0.191(0.0075) E1 E2 B1 E B e A2 D1 A1 D A 0.51(0.020)MAX 45 MAX (3X) COMMON DIMENSIONS (Unit of measure = mm) D2 Notes: 1. This package conforms to JEDEC reference MS-016, variation AE. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.10mm) maximum. SYMBOL MIN NOM MAX A 3.175 - 3.556 A1 1.524 - 2.413 A2 0.381 - - D 12.319 - 12.573 D1 11.354 - 11.506 D2 9.906 - 10.922 E 14.859 - 15.113 E1 13.894 - 14.046 E2 12.471 - 13.487 B 0.660 - 0.813 B1 0.330 - 0.533 e NOTE Note 2 Note 2 1.270 TYP 10/04/01 Package drawing contact: packagedrawings@atmel.com 10 TITLE 32J, 32-lead, plastic J-leaded chip carrier (PLCC) DRAWING NO. 32J REV. B Atmel AT27LV512A 0607G-EPROM-4/11 Atmel AT27LV512A 9. Revision history Doc. rev. Date 0607G 04/2011 0607F 12/2007 Comments Remove SOIC and TSOP packages Add lead finish to ordering information 11 0607G-EPROM-4/11 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: (+1) (408) 441-0311 Fax: (+1) (408) 487-2600 www.atmel.com Atmel Asia Limited Unit 01-5 & 16, 19F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel: (+852) 2245-6100 Fax: (+852) 2722-1369 Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 JAPAN Tel: (+81) (3) 3523-3551 Fax: (+81) (3) 3523-7581 (c) 2011 Atmel Corporation. All rights reserved. / Rev.: 0607G-EPROM-4/11 Atmel(R), logo and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. 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