SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
DPNP Inputs Reduce DC Loading
DHysteresis at Inputs Improves Noise
Margins
description
These octal buffers and line drivers are designed
specifically to improve both the performance and
density of three-state memory address drivers,
clock drivers, and bus-oriented receivers and
transmitters. The designer has a choice of
selected combinations of inverting and
noninverting outputs, symmetrical, active-low
output-control (G) inputs, and complementary
output-control (G and G) inputs. These devices
feature high fan-out, improved fan-in, and 400-mV
noise margin. The SN74LS’ and SN74S’ devices
can be used to drive terminated lines down to
133 Ω.
Copyright 2010, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1G
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
VCC
2G/2G†
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
SN54LS’, SN54S’ ...J OR W PACKAGE
SN74LS240, SN74LS244 . . . DB, DW, N, OR NS PACKAGE
SN74LS241 ...DW, N, OR NS PACKAGE
SN74S’ . . . DW OR N PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
SN54LS’, SN54S’ . . . FK PACKAGE
(TOP VIEW)
2Y4
1A1
1G
1Y4
2A2 2G/2G
2Y1
GND
2A1
V
CC
†2G for ’LS241 and ’S241 or 2G for all other drivers.
†2G for ’LS241 and ’S241 or 2G for all other drivers.
†
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ORDERING INFORMATION{
TAPACKAGE}ORDERABLE PART NUMBER TOP-SIDE MARKING
SN74LS240N SN74LS240N
SN74LS241N SN74LS241N
PDIP N
Tube
SN74LS244N SN74LS244N
PDIP − N Tube SN74S240N SN74S240N
SN74S241N SN74S241N
SN74S244N SN74S244N
Tube SN74LS240DW
LS240
Tape and reel SN74LS240DWR LS240
Tube SN74LS241DW
LS241
Tape and reel SN74LS241DWR LS241
Tube SN74LS244DW
LS244
0°C to 70°C
SOIC DW
Tape and reel SN74LS244DWR LS244
SOIC − DW Tube SN74S240DW
S240
Tape and reel SN74S240DWR S240
Tube SN74S241DW
S241
Tape and reel SN74S241DWR S241
Tube SN74S244DW
S244
Tape and reel SN74S244DWR S244
SN74LS240NSR 74LS240
SOP − NS Tape and reel SN74LS241NSR 74LS241
SOP
NS
Tape
and
reel
SN74LS244NSR 74LS244
SSOP DB
Tape and reel
SN74LS240DBR LS240
SSOP − DB Tape and reel SN74LS244DBR LS244
†For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
‡Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ORDERING INFORMATION{ (CONTINUED)
TAPACKAGE}ORDERABLE PART NUMBER TOP-SIDE MARKING
SN54LS240J SN54LS240J
SNJ54LS240J SNJ54LS240J
SN54LS241J SN54LS241J
SNJ54LS241J SNJ54LS241J
SN54LS244J SN54LS244J
CDIP J
Tube
SNJ54LS244J SNJ54LS244J
CDIP − J Tube SN54S240J SN54S240J
SNJ54S240J SNJ54S240J
SN54S241J SN54S241J
SNJ54S241J SNJ54S241J
SN54S244J SN54S244J
55°C to 125°C
SNJ54S244J SNJ54S244J
−55°C to 125°CSNJ54LS240W SNJ54LS240W
SNJ54LS241W SNJ54LS241W
CFP W
Tube
SNJ54LS244W SNJ54LS244W
CFP − W Tube SNJ54S240W SNJ54S240W
SNJ54S241W SNJ54S241W
SNJ54S244W SNJ54S244W
SNJ54LS240FK SNJ54LS240FK
SNJ54LS241FK SNJ54LS241FK
LCCC FK
Tube
SNJ54LS244FK SNJ54LS244FK
LCCC − FK Tube SNJ54S240FK SNJ54S240FK
SNJ54S241FK SNJ54S241FK
SNJ54S244FK SNJ54S244FK
†For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
‡Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematics of inputs and outputs
R
VCC
Output
TYPICAL OF ALL OUTPUTS
Req
VCC
Input
EQUIVALENT OF EACH INPUT
EQUIVALENT OF EACH INPUT
9 kΩ NOM
Input
VCC
’LS240. ’LS241, ’LS244: R = 50 Ω NOM
’S240, ‘S241, S244: R = 25 Ω NOM
GND
G and G inputs: Req = 2 kΩ NOM
A inputs: Req = 2.8 kΩ NOM
’LS240, ’LS241, ’LS244 ’S240, ’S241, ’S244
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram
1
2
4
6
8
19
11
13
15
17 3
5
7
9
12
14
16
18
1A1
1A2
1A3
1A4
1Y1
2A1
2A2
2A3
2A4
2Y1
1Y2
1Y3
1Y4
2Y2
2Y3
2Y4
2G
1G
’LS240, ’S240 ’LS241, ’S241
’LS244, ’S244
1
2
4
6
8
19
11
13
15
17 3
5
7
9
12
14
16
18
1A1
1A2
1A3
1A4
1Y1
2A1
2A2
2A3
2A4
2Y1
1Y2
1Y3
1Y4
2Y2
2Y3
2Y4
2G
1G
1
2
4
6
8
19
11
13
15
17 3
5
7
9
12
14
16
18
1A1
1A2
1A3
1A4
1Y1
2A1
2A2
2A3
2A4
2Y1
1Y2
1Y3
1Y4
2Y2
2Y3
2Y4
2G
1G
Pin numbers shown are for DB, DW, J, N, NS, and W packages.
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI: ’LS 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
’S 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Off-state output voltage 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values are with respect to network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
SN54LS’ SN74LS’
UNIT
MIN NOM MAX MIN NOM MAX UNIT
VCC Supply voltage (see Note 1) 4.5 5 5.5 4.75 5 5.25 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.7 0.8 V
IOH High-level output current −12 −15 mA
IOL Low-level output current 12 24 mA
TAOperating free-air temperature −55 125 0 70 °C
NOTE 1: Voltage values are with respect to network ground terminal.
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS†
SN54LS’ SN74LS’
UNIT
PARAMETER TEST CONDITIONS†
MIN TYP‡MAX MIN TYP‡MAX UNIT
VIK VCC = MIN, II = −18 mA −1.5 −1.5 V
Hysteresis
(VT+ − VT−)VCC = MIN 0.2 0.4 0.2 0.4 V
V
VCC = MIN,
IOH = −3 mA VIH = 2 V, VIL = MAX, 2.4 3.4 2.4 3.4
V
VOH VCC = MIN,
IOH = MAX VIH = 2 V, VIL = 0.5 V, 2 2
V
V
V
CC
= MIN,
V2V
IOL = 12 mA 0.4 0.4
V
VOL
VCC
=
MIN
,
VIL = MAX VIH = 2 V, IOL = 24 mA 0.5 V
IOZH
VCC = MAX,
VIL = MAX VIH = 2 V, VO = 2.7 V 20 20 µA
IOZL
VCC = MAX,
VIL = MAX VIH = 2 V, VO = 0.4 V −20 −20 µA
IIVCC = MAX, VI = 7 V 0.1 0.1 mA
IIH VCC = MAX, VI = 2.7 V 20 20 µA
IIL VCC = MAX, VIL = 0.4 V −0.2 −0.2 mA
IOS§VCC = MAX, −40 −225 −40 −225 mA
Outputs high All 17 27 17 27
VMAX
Outputs low
’LS240 26 44 26 44
ICC
VCC = MAX,
Output open
Outputs low ’LS241, ’LS244 27 46 27 46 mA
ICC
O
u
t
pu
t
open
Outputs disabled
’LS240 29 50 29 50
mA
Outputs disabled ’LS241, ’LS244 32 54 32 54
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡All typical values are at VCC = 5 V, TA = 25°C.
§Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
switching characteristics, VCC = 5 V, TA = 25°C (see Figure 1)
TEST CONDITIONS
’LS240 ’LS241, ’LS244
UNIT
PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
tPLH
R667 Ω
C45 pF
9 14 12 18
ns
tPHL
RL = 667 Ω, CL = 45 pF 12 18 12 18 ns
tPZL
R667 Ω
C45 F
20 30 20 30
ns
tPZH
RL = 667 Ω, CL = 45 pF 15 23 15 23 ns
tPLZ
R667 Ω
C5pF
10 20 10 20
ns
tPHZ
RL = 667 Ω, CL = 5 pF 15 25 15 25 ns
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
SN54S’ SN74S’
UNIT
MIN NOM MAX MIN NOM MAX UNIT
VCC Supply voltage (see Note 1) 4.5 5 5.5 4.75 5 5.25 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
IOH High-level output current −12 −15 mA
IOL Low-level output current 48 64 mA
External resistance between any input and VCC or ground 40 40 kΩ
TAOperating free-air temperature (see Note 3) −55 125 0 70 °C
NOTES: 1. Voltage values are with respect to network ground terminal.
3. An SN54S241J operating at free-air temperature above 116°C requires a heat sink that provides a thermal resistance from case
to free air, RθCA, of not more that 40°C/W.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS†
SN54S’ SN74S’
UNIT
PARAMETER TEST CONDITIONS†
MIN TYP‡MAX MIN TYP‡MAX UNIT
VIK VCC = MIN, II = −18 mA −1.2 −1.2 V
Hysteresis
(VT+ − VT−)VCC = MIN 0.2 0.4 0.2 0.4 V
VCC = MIN
IOH = −1 mA
VIH = 2 V, VIL = 0.8 V, 2.7
VOH
VCC = MIN,
IOH = −3 mA
VIH = 2 V, VIL = 0.8 V, 2.4 3.4 2.4 3.4 V
VCC = MIN,
IOH = MAX
VIH = 2 V, VIL = 0.5 V, 2 2
VOL
VCC = MIN,
IOL = MAX
VIH = 2 V, VIL = 0.8 V, 0.55 0.55 V
IOZH
VCC = MAX,
VIL = 0.8 V
VIH = 2 V, VO = 2.4 V 50 50 µA
IOZL
VCC = MAX,
VIL = 0.8 V
VIH = 2 V, VO = 0.5 V −50 −50 µA
IIVCC = MAX, VI = 5.5 V 1 1 mA
IIH VCC = MAX, VI = 2.7 V 50 50 µA
I
VMAX
V05V
Any A −400 −400 µA
IIL VCC = MAX, VI = 0.5 V Any G −2 −2 mA
IOS§VCC = MAX −50 −225 −50 −225 mA
Outputs high
’S240 80 123 80 135
Outputs high ’S241,’S244 95 147 95 160
I
V
CC
= MAX,
Outputs low
’S240 100 145 100 150
mA
ICC
VCC
=
MAX
,
Output open Outputs low ’S241, ’S244 120 170 120 180 mA
Outputs disabled
’S240 100 145 100 150
Outputs disabled ’S241, ’S244 120 170 120 180
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡All typical values are at VCC = 5 V, TA = 25°C.
§Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics, VCC = 5 V, TA = 25°C (see Figure 2)
TEST CONDITIONS
’S240 ’S241, ’S244
UNIT
PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
tPLH
R90 Ω
C50 F
4.5 7 6 9
ns
tPHL
RL = 90 Ω, CL = 50 pF 4.5 7 6 9 ns
tPZL
R90 Ω
C50 F
10 15 10 15
ns
tPZH
RL = 90 Ω, CL = 50 pF 6.5 10 8 12 ns
tPLZ
R90 Ω
C5pF
10 15 10 15
ns
tPHZ
RL = 90 Ω, CL = 5 pF 6 9 6 9 ns
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SERIES 54LS/74LS DEVICES
tPHL tPLH
tPLH tPHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
High-Level
Pulse
Low-Level
Pulse
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note D)
3 V
0 V
VOL
VOH
VOH
VOL
In-Phase
Output
(see Note D)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCC
RL
Test
Point
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 2-STATE TOTEM-POLE OUTPUTS
(see Note B)
VCC
RL
From Output
Under Test
CL
(see Note A)
Test
Point
(see Note B)
VCC
RL
From Output
Under Test
CL
(see Note A)
Test
Point
5 kΩ
NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. S1 and S2 are closed for tPLH, tPHL, tPHZ, and tPLZ; S1 is open and S2 is closed for tPZH; S1 is closed and S2 is open for tPZL.
E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples.
F. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω, tr ≤ 15 ns, tf ≤ 6 ns.
G. The outputs are measured one at a time with one input transition per measurement.
S1
S2
tPHZ
tPLZ
tPZL
tPZH
3 V
3 V
0 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
3 V
0 V
Output
Control
(low-level
enabling)
Waveform 1
(see Notes C
and D)
Waveform 2
(see Notes C
and D) ≈1.5 V
VOH − 0.3 V
VOL + 0.3 V
≈1.5 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V
1.3 V
tw
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V 1.3 V
VOL
VOH
Figure 1. Load Circuits and Voltage Waveforms
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SERIES 54S/74S DEVICES
tPHL tPLH
tPLH tPHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
High-Level
Pulse
Low-Level
Pulse
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note D)
3 V
0 V
VOL
VOH
VOH
VOL
In-Phase
Output
(see Note D)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCC
RL
Test
Point
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 2-STATE TOTEM-POLE OUTPUTS
(see Note B)
VCC
RL
From Output
Under Test
CL
(see Note A)
Test
Point
(see Note B)
VCC
RL
From Output
Under Test
CL
(see Note A)
Test
Point
1 kΩ
NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. S1 and S2 are closed for tPLH, tPHL, tPHZ, and tPLZ; S1 is open and S2 is closed for tPZH; S1 is closed and S2 is open for tPZL.
E. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω; tr and tf ≤ 7 ns for Series
54/74 devices and tr and tf ≤ 2.5 ns for Series 54S/74S devices.
F. The outputs are measured one at a time with one input transition per measurement.
S1
S2
tPHZ
tPLZ
tPZL
tPZH
3 V
3 V
0 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
3 V
0 V
Output
Control
(low-level
enabling)
Waveform 1
(see Notes C
and D)
Waveform 2
(see Notes C
and D) ≈1.5 V
VOH − 0.5 V
VOL + 0.5 V
≈1.5 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V
tw
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
VOH
VOL
Figure 2. Load Circuits and Voltage Waveforms
SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
SN74LS240, SN74LS241, SN74LS244, SN74S240, SN74S241, SN74S244
OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS
SDLS144C − APRIL 1985 − REVISED MAY 2010
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
5962-7801201VRA ACTIVE CDIP J 20 20 TBD A42 N / A for Pkg Type -55 to 125 5962-7801201VR
A
SNV54LS240J
5962-7801201VSA ACTIVE CFP W 20 25 TBD Call TI N / A for Pkg Type -55 to 125 5962-7801201VS
A
SNV54LS240W
7705701RA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 7705701RA
SNJ54LS244J
7705701SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 7705701SA
SNJ54LS244W
78012012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 78012012A
SNJ54LS
240FK
7801201RA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 7801201RA
SNJ54LS240J
7801201SA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 7801201SA
SNJ54LS240W
JM38510/32401B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/
32401B2A
JM38510/32401BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
32401BRA
JM38510/32401BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/
32401BSA
JM38510/32402B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/
32402B2A
JM38510/32402BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
32402BRA
JM38510/32402BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/
32402BSA
JM38510/32403B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/
32403B2A
JM38510/32403BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
32403BRA
JM38510/32403BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/
32403BSA
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
JM38510/32403SRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
32403SRA
JM38510/32403SSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/
32403SSA
M38510/32401B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/
32401B2A
M38510/32401BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
32401BRA
M38510/32401BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/
32401BSA
M38510/32402B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/
32402B2A
M38510/32402BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
32402BRA
M38510/32402BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/
32402BSA
M38510/32403B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/
32403B2A
M38510/32403BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
32403BRA
M38510/32403BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/
32403BSA
M38510/32403SRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/
32403SRA
M38510/32403SSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/
32403SSA
SN54LS240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS240J
SN54LS241J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS241J
SN54LS244J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54LS244J
SN54S240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54S240J
SN54S241J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54S241J
SN54S244J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54S244J
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 3
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN74LS240DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS240
SN74LS240DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS240
SN74LS240DWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS240
SN74LS240DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS240
SN74LS240DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS240
SN74LS240J OBSOLETE CDIP J 20 TBD Call TI Call TI 0 to 70
SN74LS240N ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS240N
SN74LS240N3 OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70
SN74LS240NE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS240N
SN74LS240NSR ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS240
SN74LS240NSRE4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS240
SN74LS240NSRG4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS240
SN74LS241DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS241
SN74LS241DWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS241
SN74LS241DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS241
SN74LS241DWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS241
SN74LS241DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS241
SN74LS241DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS241
SN74LS241J OBSOLETE CDIP J 20 TBD Call TI Call TI 0 to 70
PACKAGE OPTION ADDENDUM
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Addendum-Page 4
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN74LS241N ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS241N
SN74LS241N3 OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70
SN74LS241NE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS241N
SN74LS241NSR ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS241
SN74LS241NSRE4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS241
SN74LS241NSRG4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS241
SN74LS244DBR ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244
SN74LS244DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244
SN74LS244DBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244
SN74LS244DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244
SN74LS244DWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244
SN74LS244DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244
SN74LS244DWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244
SN74LS244DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244
SN74LS244DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 LS244
SN74LS244J OBSOLETE CDIP J 20 TBD Call TI Call TI 0 to 70
SN74LS244N ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS244N
SN74LS244N3 OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70
SN74LS244NE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74LS244N
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 5
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN74LS244NSR ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS244
SN74LS244NSRE4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS244
SN74LS244NSRG4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74LS244
SN74S240DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S240
SN74S240DWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S240
SN74S240DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S240
SN74S240DWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S240
SN74S240DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S240
SN74S240DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S240
SN74S240N ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74S240N
SN74S240N3 OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70
SN74S240NE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74S240N
SN74S241DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S241
SN74S241DWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S241
SN74S241DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S241
SN74S241DWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S241
SN74S241DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S241
SN74S241DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S241
SN74S241J OBSOLETE CDIP J 20 TBD Call TI Call TI 0 to 70
PACKAGE OPTION ADDENDUM
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Addendum-Page 6
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN74S241N ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74S241N
SN74S241N3 OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70
SN74S241NE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74S241N
SN74S244DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S244
SN74S244DWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S244
SN74S244DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S244
SN74S244DWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S244
SN74S244DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S244
SN74S244DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 S244
SN74S244J OBSOLETE CDIP J 20 TBD Call TI Call TI 0 to 70
SN74S244N ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74S244N
SN74S244N3 OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70
SN74S244NE4 ACTIVE PDIP N 20 20 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74S244N
SNJ54LS240FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 78012012A
SNJ54LS
240FK
SNJ54LS240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 7801201RA
SNJ54LS240J
SNJ54LS240W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 7801201SA
SNJ54LS240W
SNJ54LS241FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54LS
241FK
SNJ54LS241J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54LS241J
SNJ54LS241W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 SNJ54LS241W
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 7
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SNJ54LS244FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54LS
244FK
SNJ54LS244J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 7705701RA
SNJ54LS244J
SNJ54LS244W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 7705701SA
SNJ54LS244W
SNJ54S240FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54S
240FK
SNJ54S240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54S240J
SNJ54S240W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 SNJ54S240W
SNJ54S241FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54S
241FK
SNJ54S241J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54S241J
SNJ54S241W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 SNJ54S241W
SNJ54S244FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 SNJ54S
244FK
SNJ54S244J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SNJ54S244J
SNJ54S244W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 SNJ54S244W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 8
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54LS240, SN54LS240-SP, SN54LS241, SN54LS244, SN54LS244-SP, SN54S240, SN54S241, SN54S244, SN74LS240, SN74LS241,
SN74LS244, SN74S240, SN74S241, SN74S244 :
•Catalog: SN74LS240, SN54LS240, SN74LS241, SN74LS244, SN54LS244, SN74S240, SN74S241, SN74S244
•Military: SN54LS240, SN54LS241, SN54LS244, SN54S240, SN54S241, SN54S244
•Space: SN54LS240-SP, SN54LS244-SP
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Military - QML certified for Military and Defense Applications
•Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74LS240DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74LS240NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1
SN74LS241DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74LS241NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1
SN74LS244DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1
SN74LS244DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74LS244NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1
SN74S240DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74S241DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74S244DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 26-Jan-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74LS240DWR SOIC DW 20 2000 367.0 367.0 45.0
SN74LS240NSR SO NS 20 2000 367.0 367.0 45.0
SN74LS241DWR SOIC DW 20 2000 367.0 367.0 45.0
SN74LS241NSR SO NS 20 2000 367.0 367.0 45.0
SN74LS244DBR SSOP DB 20 2000 367.0 367.0 38.0
SN74LS244DWR SOIC DW 20 2000 367.0 367.0 45.0
SN74LS244NSR SO NS 20 2000 367.0 367.0 45.0
SN74S240DWR SOIC DW 20 2000 367.0 367.0 45.0
SN74S241DWR SOIC DW 20 2000 367.0 367.0 45.0
SN74S244DWR SOIC DW 20 2000 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 26-Jan-2013
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
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