a8e
re
systems
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
Advance
Data
Sheet
May
2002
Description
The
TD
16-type
transponder
performs
straightfor-
ward,
bit-level
parallel-to-serial
converting
in
the
transmitting
direction
.
The
input
data
is
16-bit,
paral-
lel
electrical
format
at
155
Mbits/s
.
The
output
is
serial
optical,
nonretum4o-zero
(NRZ)
format
at
2
.488
Gbits/s
.
In
the
receiving
direction,
the
serial
optical
2
.488
Mbits/s
data
is
converted
into
serial
electrical
data
and
the
clock
is
recovered
.
The
serial
electrical
data
is
then
converted
to
16-bit,
parallel
electrical
format
at
155
Mbits/s
at
the output
.
The
TD16-type
transponders
integrate
up
to
15
discrete
ICs
and
optical
components,
including
a 2
.5
Gbits/s
optical
trans-
mitter
and
receiver
pair,
all
in
a
single,
compact
package
.
Features
. 2
.5
Gbits/s
optical
transmitter
and
receiver
with
16-channel
155
Mbits/s multiplexer/demultiplexer
.
Available
with
1
.31
gm
or
1
.55
gm
DFB
laser
trans-
mitters
and
APD
receiver
for
long-haul
applica-
tions
.
.
Pigtailed,
low-profile
package
.
Differential
LVPECL
data
interface
.
Operating
case
temperature range
:
-5
°C
to
+70
°C
.
Automatic
transmitter
optical
power
control
.
Transmitter
laser
disable
input
.
Loss
of
signal
indication
.
Line
loopback and
diagnostic
loopback
capability
The
TD
16-type
transponder
is
designed
to
accom-
modate
a
serial
data
rate of 2
.488
Gbits/s
.
In
addi-
tion,
the
transponder
performs
the
data
format
conversions
from
serial
optical to
parallel
electrical
and
vice
versa
regardless
of
the
actual
content
of
the
data
stream
.
It
virtually
can be
used
at
any
protocol
format,
provided
the
serial
data
rate
is
2
.488
Gbits/s
.
The
versatile
device
is
SONET/SDH
OC-48/STM-16
compliant
.
It
is
ideally
suited
for
use
in
high-speed
data
communications
systems
as
well
as
various
telecommunications
applications,
including
inter-
and
intraoffice
SONET/SDH,
subscriber
loop,
and
metro-
politan-area
networks
.
AdLib OCR Evaluation
TD16-Type
2
.5
Gbits/s
Transponder
with
Advance
Data
Sheet
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
May
2002
Table
of
Contents
Contents
Page
Table
Page
Features
.......
.
...
.
....
.
...
. .
...
.
...
.
....
.
.................
.
....
.
...
. .
...
.
. .
.1
Table
1
.
Transponder
Application
Categories
......
.
...
.
.3
Description
....
.
...
. .
...
.
...
. .
...
.
...
.
....
.
.................
.
....
.
...
. .
...
.
. .
1
Table
2
.
TD
16-Type
Transponder
Pinout
.............
.
...
. .
6
Block
Diagram
...
. .
...
.
...
. .
...
.
...
.
....
.
.................
. .
...
.
...
. .
...
.
. .
4
Table
3
.
TD16-Type
Transponder
Input
Pin
Pin
Information
. .
.
....
.
...
. .
...
.
...
.
....
.
.................
. .
...
.
...
. .
...
.
. .
5
Descriptions
.
. .
. .
. .
...
.
....
.
.............
.
...
. .
...
.
...
. .
. .
10
Pin
Descriptions
.
....
.
...
. .
. .
. .
...
.
....
.
...
.
.............
.
....
.
...
. .
. .
. .
. .
6
Table
4
.
TD16-Type
Transponder
Output
Pin
Functional
Description
...
. .
...
.
...
. .
...
.
.............
.
....
.
...
. .
. .
. .
12
Descriptions
.
.
...
. .
...
.
....
.
.............
.
...
.
....
.
...
. .
. .
11
Transmitter
.
. .
...
.
...
. .
...
.
...
.
....
.
.............
.
...
. .
...
.
...
. .
...
.
12
Table
5
.
TD16L1
Long-Reach/Long-Haul
1310
nm
Receiver
.
...
.
....
.
...
. .
. .
. .
...
.
....
.
.................
.
....
.
...
. .
. .
. .
.
12
(DFB
Laser,
APD
Receiver)
Optical
Loopback
Modes
.
.
...
. .
...
.
...
. .
...
.
.............
.
....
.
...
. .
. .
. .
.
12
Characteristics
(Tc
=
-5
°C
to
70
°C,
Absolute
Maximum
Ratings
.
...
. .
. .
. .
...
.
....
.
....
.
....
.
...
. .
. .
. .
.
13
VCC
= 3
.3
V
±
5%)
.....
.
.............
.
...
. .
...
.
...
. .
.
.14
Optical
Characteristics
...
. .
...
.
....
.
...
.
.............
.
....
.
...
. .
. .
. .
.
14
Table
6
.
TD16L2
Long-Reach/Long-Haul
1550
nm
Electrical
Characteristics
.
.
.............
.
........
.
...
. .
...
.
...
. .
...
.
.
16
(DFB
Laser,
APD
Receiver)
Optical
Applications
...
.
...
.
....
.
...
. .
. .
. .
...
.
....
.
.................
.
....
.
...
. .
. .
. .
.
18
Characteristics
(Tc
= 0 °C
to
65
°C,
Jitter
Measurement
.
. .
...
.
...
. .
...
.
.............
.
....
.
...
. .
. .
. .
.
18
Vcc
= 3
.3
V
±
5%)
.....
.
.............
.
...
. .
...
.
...
. .
.
.15
Parallel
Data
and
Clock
...
. .
...
.
...
.
.........
.
........
. .
. .
. .
.
18
Table
7
.
Transmitter
Electrical
I/O Characteristics
Transmitter
Reference Clock
Input
.....
.
....
.
...
. .
...
.
.
19 (Tc =
-5
°C
to
70
°C,
VCC
= 3
.3
V
±
5%)
.16
Clocking
Scheme
.
...
. .
...
.
...
. .
...
.
.............
.
........
.
...
. .
.
20
Table
8
.
Receiver
Electrical
I/O
Characteristics
Receiver
Photocurrent
Monitor
.......
.
...
. .
...
.
...
. .
...
.
.
21
(Tc
=
-5
°C
to
70
°C,
Vcc
= 3
.3
V
±
5%)
.
.
.17
Compatibility
with
Other
Codes
...........
.
....
.
...
. .
. .
. .
.
21
Table
9
.
Power
Supply
Characteristics
Qualification
and
Reliability
...........
.
........
.
...
. .
...
.
...
. .
...
.
.
22
(Tc
=
-5
°C
to
70
°C)
. .
.
.................
.
....
.
...
. .
.
.17
Regulatory
and
Voluntary
Compliance
.
. .
...
.
.............
. .
.
22
Table
10
.
Regulatory
and
Voluntary
Compliance
.
. .
.
.22
Outline
Diagram
.
....
.
...
. .
. .
. .
...
.
....
.
...
.
.............
.
....
.
...
. .
. .
. .
.
23
Table
11
.
Ordering
Information
.
.
...
. .
...
.
....
.
.........
.
...
. .
. .
24
Ordering
Information
. .
. .
...
.
.............
.
........
.
...
. .
...
.
...
. .
...
.
.
24
Table
12
.
Related
Documentation
. .
...
.
....
.
.............
.
...
24
Related
Documentation
.
.
....
.
...
. .
...
.
...
.
....
.
....
.
........
. .
. .
. .
.
24
Figures
Page
Figure
1
.
TD
16-Type
Transponder
Block
Diagram
.
. .
. .
.4
Figure
2
.
TD
16-Type
Transponder
Pinout
. .
.
....
.
...
. .
...
.
...
5
Figure
3
.
Transponder
Interfacing
.
...
.
....
.
...
.
.........
.
...
. .
.
18
Figure
4
.
Interfacing
to
the
TxRefCIk
Input
.........
.
...
. .
.
19
Figure
5
.
Timing
Mode
Block
Diagram
.......
.
....
.
...
. .
...
.
.
20
2 Lucent
Technologies
Inc
.
AdLib OCR Evaluation
Advance
Data
Sheet
May
2002
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel155
Mbits/s
Multiplexer/Demultiplexer
Description
(continued)
Figure
1
shows
a
simplified
block
diagram
of
the
TD16-
type
transponder
.
This
device
is
a
bidirectional
module
designed
to
provide
a
SONET
or
SDH
compliant
elec-
tro-optical
interface
between
the
SONET/SDH
photonic
physical
layer
and
the
electrical
section layer
.
The
mod-
ule
contains
a 2
.5
Gbits/s
optical
transmitter
and
a
2
.5
Gbits/s
optical
receiver
in
the
same
physical
pack-
age
along
with
the
electronics
necessary
to
multiplex
and
demultiplex
sixteen
155
Mbits/s
electrical
chan-
nels
.
Clock
synthesis
and
clock
recovery
circuits
are
also included
within the
module
.
In
the
transmit
direction,
the
transponder
module
multi-
plexes
sixteen
155
Mbits/s
LVPECL
electrical
data
sig-
nals
into
an
optical
signal
at
2488
.32
Mbits/s
for
launching
into optical fiber
.
An
internal
2
.488
GHz
refer-
ence
oscillator
can
be
phase-locked
to
an
external
155
.52
MHz
data
timing
reference
.
Table
1
.
Transponder
Application
Categories
The
optical
transmitter
is
available
with
a
1
.31
gm
or
1
.55
gm
DFB
laser
for
long-reach
applications
.
The
optical
output
signal
is
SONET
and
ITU
compliant
for
OC-48/STM-16
applications
.
In
the
receive
direction,
the
transponder
module
receives
a
2488
.32
Mbits/s
optical
signal
and
converts
it
to
an
electrical
signal,
and
then
extracts
a
clock
sig-
nal
and
demultiplexes
the
data
into
sixteen
155
Mbits/s
differential
LVPECL
data
signals
.
The
optical
receiver
is
available
with
an
APD
photodetector
.
The
receiver
operates
over
the
wavelength range
of
1 .1
gm
to
1
.6
gm
and
is
fully
compliant
with
SONET/SDH
OC-48/
STMA6
physical
layer
specifications
.
The
standard
operating
case
temperature
range
of
the
TD
16-type
transponder
is
-5°C
to
+70
°C
.
Overall,
the
TD
16-type
transponders
meet
or
exceed
Telcordia
T""
applicable
standards
.
An
overview
is
sum-
marized
in
Table
1
.
Transponder
Device
Code
Operating
Wavelength
Target
Distance
ITU/Telcordia
Applicable
Standards
(meets
or
exceeds)
TD16L1
1310
nm
40
km
OC-48
LR-1,
STM-16
L-16
.1
TD16L2
1550
nm
80
km
OC-48
LR-2,
STM-16
L-16
.2
1
.
These
are
target
distances
to
be
used
for
classification
and
not
for
specifications
.
Agere
Systems
Inc
.
3
AdLib OCR Evaluation
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
Advance
Data
Sheet
May
2002
Block
Diagram
RESET
TXDIS
LSR
ALRM
LPM
LSR
BIAS
TXD[0
:15]P
16,
TXD[0
:15]N
16,
PICLKP/N
2
16
:1
PARALLE
TO
SERIAL
X
ID OC-48/STM-16
11
OPTICAL
TRANSMITTER
TXREFCLKP/N
PCLKP/N
LOCKDET
LLOOP
2
2
CLOCK
AND
PHASE
DETECT
INTERNAL
CLOCK
X
DLOOP
DIN
CLOCK
RECOVERYDO
DATA
RETIME
CLK
CLK/16
POCLKP/N
RXQ[0
:15]P
RXQ[0
:15]N
LOS
1
:16
SERIAL
TO
PARALLEL
Figure
1
.
TD16-Type
Transponder
Block
Diagram
OC-48/STM-16
D
OPTICAL
RECEIVER
W/SIGNAL
DETECT
1-1011(F)
.g
Agere
Systems
Inc
.
AdLib OCR Evaluation
Advance
Data
Sheet
May
2002
FGND
160
NC
NC
NC
NC
RXDGND
RXQ01
N
RXQ01P
RXQ03N
RXQ03P
RXDGND
150
RXQ05N
RXQ05P
RXQ07N
RXQ07P
RXDGND
RXQ09N
RXQ09P
RXQ11N
RXQ11
P
RXDGND
140
RXQ13N
RXQ13P
RXQ15N
RXQ15P
RXDGND
NF
NF
NF
NC
POCLKN
130
POCLKP
RX3
.3A
RXAGND
RXAGND
NF
RX3
.3D
RX3
.3D
RXDGND
NF
RXDGND
120
LOS
LLOOP
NF
IBC
DATA
(RESERVED)
TXDIS
NF
IBC
CLOCK
(RESERVED)
TX3
.3A
TX3
.3D
TXAGND
110
TXDGND
PCLKN
PCLKP
TXDGND
TXDOON
TXDOOP
TXDGND
TXD02N
TXD02P
TXD04N
100
TXD04P
TXDGND
TXD06N
TXD06P
TXD08N
TXD08P
TXDGND
TXD10N
TXD10P
TXD12N
90
TXD12P
TXDGND
TXD14N
TXD14P
TXREFCLKN
TXREFCLKP
TXDGND
RESET
FGND
81
Pin
Information
80
FGND
NC
NC
NC
NC
RXDGND
RXQOON
RXQOOP
RXQ02N
RXQ02P
70
RXDGND
RXQ04N
RXQ04P
RXQ06N
RXQ06P
RXDGND
RXQ08N
RXQ08P
RXQ10N
RXQ10P
60
RXDGND
RXQ12N
RXQ12P
RXQ14N
RXQ14P
RXDGND
NF
NF
NF
RXDGND
50
RXAGND
RXAGND
RX3
.3A
RXAGND
RXAGND
NC
RX3
.3D
RX3
.3D
RXDGND
NF
40 NF
NF
DLOOP
NC
LSRBIAS
LSRALM
LPM
TXAGND
TX3
.3A
TX3
.3A
30
TXAGND
TX3
.3D
TX3
.3D
TXDGND
LOCKDET
PICLKN
PICLKP
TXDGND
TXD01N
TXD01P
20
TXD03N
TXD03P
TXDGND
TXD05N
TXD05P
TXD07N
TXD07P
TXDGND
TXD09N
TXD09P
10
TXD11N
TXD11P
TXDGND
TXD13N
TXD13P
TXD15N
TXD15P
TXDGND
IPDMON
1
FGND
Note
:
NF
= no
function
;
NC
= no
connection
.
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel155
Mbits/s
Multiplexer/Demultiplexer
RX
TX
TOP
VIEW
Figure
2
.
TD16-Type
Transponder
Pinout
1-1014(F)
.e
Agere
Systems
Inc
.
AdLib OCR Evaluation
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
Advance
Data
Sheet
May
2002
Pin Descriptions
Table 2
.
TD16-Type
Transponder
Pinout
Pin
# Pin
Name
I/O
Logic
Description
01
FGND
I
Supply
Frame
Ground
02
IPDMON
O
Analog
Receiver
Photodiode
Current Monitor
03
TxDGND
I
Supply
Transmitter
Digital
Ground
04
TxD15P
I
LVPECL
Transmitter
155
Mbits/s
MSB
Data
Input
05
TxD15N
I
LVPECL
Transmitter
155
Mbits/s
MSB
Data
Input
06
TxD13P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
07
TxD13N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
08
TxDGND
I
Supply
Transmitter
Digital
Ground
09
TxD11
P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
10
TxD11
N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
11
TxD09P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
12
TxD09N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
13
TxDGND
I
SUPPLY
Transmitter
Digital
Ground
14
TxD07P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
15
TxD07N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
16
TxD05P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
17
TxD05N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
18
TxDGND
I
Supply
Transmitter
Digital
Ground
19
TxD03P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
20
TxD03N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
21
TxD01
P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
22
TxD01
N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
23
TxDGND
I
Supply
Transmitter
Digital
Ground
24
PICLKP
I
LVPECL
Byte-aligned
Parallel
Input
Clock
at
155
MHz
25
PICLKN
I
LVPECL
Byte-aligned
Parallel
Input
Clock
at
155
MHz
26
LOCKDET
O
CMOS
MUX
Lock
to
Reference
Clock
Indication
27
TxDGND
I
Supply
Transmitter
Digital
Ground
28
Tx3
.3D
I
Supply
Transmitter
3
.3
V
Digital
Supply
29
Tx3
.3D
I
Supply
Transmitter
3
.3
V
Digital
Supply
30
TxAGND
I
Supply
Transmitter
Analog
Ground
31
Tx3
.3A
I
Supply
Transmitter
3
.3
V
AnalogSupply
32
Tx3
.3A
I
Supply
Transmitter
3
.3
V
AnalogSupply
33
TxAGND
I
Supply
Transmitter
Analog
Ground
34
LPM
O
Analog
Laser
Power
Monitor
35
LSRALM
O
TTL
(5
V) Laser
Degrade
Alarm
36
LSRBIAS
O
Analog
Transmitter
Laser
Bias
Condition
Indication
37
NC
- -
No
Connection
38
DLOOP
I
LVTTL
Diagnostic
Loopback
39
NF
- -
No
Function
40
NF
- -
No
Connection
41
I
NF
I
-
I
-
I
No
Connection3
1
.
Frame
ground
is
connected
to
the
housing
.
2
.
Pins
labeled
No
Function
are
floating
pins
in
this
design
.
3
.
Pins
labeled
No
Connection
must
remain
open
circuits
;
they
may
have
internal
voltages
and must
not
be
connected
to
Vcc,
ground,
or
any
signal
node
.
6
Agere
Systems
Inc
.
AdLib OCR Evaluation
Advance
Data
Sheet
May
2002
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel155
Mbits/s
Multiplexer/Demultiplexer
Pin
Descriptions
(continued)
Table
2
.
TD16-Type
Transponder
Pinout
(continued)
Pin
# Pin
Name
I/O
Logic
Description
42
RxDGND
I
Supply
Receiver
Digital
Ground
43
Rx3
.3D
I
Supply
Receiver
3
.3
V
Digital
Supply
44
Rx3
.3D
I
Supply
Receiver
3
.3
V
Digital
Supply
45
NC
- -
No
Connection
46
RxAGND
I
Supply
Receiver
Analog
Ground
47
RxAGND
I
Supply
Receiver
Analog
Ground
48
Rx3
.3A
I
Supply
Receiver
3
.3
V
Analog Supply
49
RxAGND
I
Supply
Receiver
Analog
Ground
50
RxAGND
I
Supply
Receiver
Analog
Ground
51
RxDGND
I
Supply
Receiver
Digital
Ground
52
NF
- -
No
Function
53
NF
- -
No
Function
54
NF
- -
No
Function
55
RxDGND
I
Supply
Receiver
Digital
Ground
56
RxQ14P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
57
RxQ14N
O
LVPECL
Receiver
155
Mbits/s
Data Output
58
RxQ12P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
59
RxQ12N
O
LVPECL
Receiver
155
Mbits/s
Data Output
60
RxDGND
I
Supply
Receiver
Digital
Ground
61
RxQ10P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
62
RxQ10N
O
LVPECL
Receiver
155
Mbits/s
Data Output
63
RxQ08P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
64
RxQ08N
O
LVPECL
Receiver
155
Mbits/s
Data Output
65
RxDGND
I
SUPPLY
Receiver
Digital
Ground
66
RxQ06P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
67
RxQ06N
O
LVPECL
Receiver
155
Mbits/s
Data Output
68
RxQ04P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
69
RxQ04N
O
LVPECL
Receiver
155
Mbits/s
Data Output
70
RxDGND
I
Supply
Receiver
Digital
Ground
71
RxQ02P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
72
RxQ02N
O
LVPECL
Receiver
155
Mbits/s
Data Output
73
RxQ00P
O
LVPECL
Receiver
155
Mbits/s
LSB
Data Output
74
RxQ00N
O
LVPECL
Receiver
155
Mbits/s
LSB
Data Output
75
RxDGND
I
Supply
Receiver
Digital
Ground
76
NC
- -
No
Connection
77
NC
- -
No
Connection
78
NC
- -
No
Connection
79
NC
- -
No
Connection
80
FGND
I
Supply
Frame
Ground
81
FGND
I
Supply
Frame
Ground
82
I
Reset
I I I
LVTTL
I
Master
Reset
1
.
Frame
ground
is
connected
to
the
housing
.
2
.
Pins
labeled
No
Function
are
floating
pins
in
this
design
.
3
.
Pins
labeled
No
Connection
must
remain
open
circuits
;
they
may
have
internal
voltages
and
must
not
be
connected
to
Vcc,
ground,
or
any
signal
node
.
Agere
Systems
Inc
.
7
AdLib OCR Evaluation
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
Advance
Data
Sheet
May
2002
Pin
Descriptions
(continued)
Table
2
.
TD16-Type
Transponder
Pinout
(continued)
Pin
# Pin
Name
I/O
Logic
Description
83
TxDGND
I
Supply
Transmitter
Digital
Ground
84
TxREFCLKP
I
LVPECL
Transmitter
155
Mbits/s
Reference Clock
Input
85
TxREFCLKN
I
LVPECL
Transmitter
155
Mbits/s
Reference Clock
Input
86
TxD14P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
87
TxD14N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
88
TxDGND
I
Supply
Transmitter
Digital
Ground
89
TxD12P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
90
TxD12N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
91
TxD10P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
92
TxD10N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
93
TxDGND
I
SUPPLY
Transmitter
Digital
Ground
94
TxD08P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
95
TxD08N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
96
TxD06P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
97
TxD06N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
98
TxDGND
I
Supply
Transmitter
Digital
Ground
99
TxD04P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
100
TxD04N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
101
TxD02P
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
102
TxD02N
I
LVPECL
Transmitter
155
Mbits/s
Data
Input
103
TxDGND
I
SUPPLY
Transmitter
Digital
Ground
104
TxD00P
I
LVPECL
Transmitter
155
Mbits/s
LSB
Data
Input
105
TxD00N
I
LVPECL
Transmitter
155
Mbits/s
LSB
Data
Input
106
TxDGND
I
Supply
Transmitter
Digital
Ground
107
PCLKP
O
LVPECL
Transmitter
155
MHz
Output Clock
108
PCLKN
O
LVPECL
Transmitter
155
MHz
Output Clock
109
TxDGND
I
Supply
Transmitter
Digital
Ground
110
TxAGND
I
Supply
Transmitter
Analog
Ground
111
Tx3
.3D
I
Supply
Transmitter
Digital
3
.3
V
Supply
112
Tx3
.3A
I
Supply
Transmitter
Analog
3
.3
V
Supply
113
I
C
Clock
I
LVTTL
(Reserved)
114
NF
- -
No
Connection
115
TxDIS
I
LVTTL
Transmitter
Disable
116
I
-
C
Data
I/O
LVTTL
(Reserved)
117
NF
- -
No
Connection
118
LLOOP
I
LVTTL
Line
Loopback
(active-low)
119
LOS
O
LVTTL
Loss
of Signal
120
RxDGND
I
Supply
Receiver
Digital
Ground
121
NF
- -
No
Connection
122
RxDGND
I
Supply
Receiver
Digital
Ground
123
I
Rx3
.3D
I I I
Supply
I
Receiver
Digital
3
.3
V
Supply
1
.
Frame
ground
is
connected
to
the
housing
.
2
.
Pins
labeled
No
Function
are
floating
pins
in
this
design
.
3
.
Pins
labeled
No
Connection
must
remain
open
circuits
;
they
may
have
internal
voltages
and must
not
be
connected
to
Vcc,
ground,
or
any
signal
node
.
8
Agere
Systems
Inc
.
AdLib OCR Evaluation
Advance
Data
Sheet
May
2002
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel155
Mbits/s
Multiplexer/Demultiplexer
Pin Descriptions
(continued)
Table 2
.
TD16-Type
Transponder
Pinout
(continued)
Pin
# Pin
Name
I/O
Logic
Description
124
Rx3
.3D
I
Supply
Receiver
Digital
3
.3
V
Supply
125
NF
- -
No
Connection
126
RxAGND
I
Supply
Receiver
Analog
Ground
127
RxAGND
I
Supply
Receiver
Analog
Ground
128
Rx3
.3A
I
Supply
Receiver
Analog 3
.3
V
Supply
129
POCLKP
O
LVPECL
Byte-Aligned
Parallel
Output Clock
at
155
MHz
130
POCLKN
O
LVPECL
Byte-Aligned
Parallel
Output Clock
at
155
MHz
131
NC
- -
No
Connection
132
NF
- -
No
Function
133
NF
- -
No
Function
134
NF
- -
No
Function
135
RxDGND
I
Supply
Receiver
Digital
Ground
136
RxQ15P
O
LVPECL
Receiver
MSB
155
Mbits/s
Data
Output
137
RxQ15N
O
LVPECL
Receiver
MSB
155
Mbits/s
Data Output
138
RxQ13P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
139
RxQ13N
O
LVPECL
Receiver
155
Mbits/s
Data
Output
140
RxDGND
I
Supply
Receiver
Digital
Ground
141
RxQ11
P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
142
RxQ11
N
O
LVPECL
Receiver
155
Mbits/s
Data
Output
143
RxQ09P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
144
RxQ09N
O
LVPECL
Receiver
155
Mbits/s
Data
Output
145
RxDGND
I
Supply
Receiver
Digital
Ground
146
RxQ07P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
147
RxQ07N
O
LVPECL
Receiver
155
Mbits/s
Data
Output
148
RxQ05P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
149
RxQ05N
O
LVPECL
Receiver
155
Mbits/s
Data
Output
150
RxDGND
I
Supply
Receiver
Digital
Ground
151
RxQ03P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
152
RxQ03N
O
LVPECL
Receiver
155
Mbits/s
Data
Output
153
RxQ01
P
O
LVPECL
Receiver
155
Mbits/s
Data
Output
154
RxQ01
N
O
LVPECL
Receiver
155
Mbits/s
Data
Output
155
RxDGND
I
Supply
Receiver
Digital
Ground
156
NC
- -
No
Connection
157
NC
- -
No
Connection
158
NC
- -
No
Connection
159
NC
- -
No
Connection
160
I
FGND
I
I
I
Supply
I
Frame
Ground'
1
.
Frame
ground
is
connected
to
the
housing
.
2
.
Pins
labeled
No
Function
are
floating
pins
in
this
design
.
3
.
Pins
labeled
No
Connection
must
remain
open
circuits
;
they
may
have
internal
voltages
and
must
not
be
connected
to
Vcc,
ground,
or
any
signal
node
.
Agere
Systems
Inc
.
AdLib OCR Evaluation
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
Advance
Data
Sheet
May
2002
Pin Descriptions
(continued)
Table 3
.
TD16-Type
Transponder
Input
Pin
Descriptions
Pin
Name
Pin
Description
TxD[0
:15]P
Input
Data
(16-Bit
Differential
LVPECL
Parallel
Input
Data Bus)
.
TxD15P/N
is
the
most
signifi-
TxD[0
:15]N
cant
bit
of
the
input
word
and
is
the
first
bit
serialized
.
TxD00P/N
is
the
least
significant
bit
of
the
input
word
and
is
the
last
bit
serialized
.
TxD[0
:15]P/N
is
sampled
on
the
rising
edge
of
PICK
.
TxREFCLKP
Reference
Clock
(Differential
LVPECL
Low
Jitter
155
.520
MHz
±20
ppm
Input
Reference
TxREFCLKN
Clock)
.
This
input
is
used
as
the reference
for
the
internal
clock
frequency
synthesizer,
which
generates
the
2
.5
GHz
bit
rate
clock
used
to
shift
data
out
of
the
parallel-to-serial
converter
and
also
for
the
byte-rate
clock,
which
transfers
the
16-bit
parallel
input
data
from
the
input
holding
register
into
the
parallel-to-serial
shift
register
.
Input
is
ac-coupled
and
internally
terminated
and
biased
.
See
section
entitled
Transmitter
Reference
Clock
Input,
page20
.
TxDIS
Transmitter
Disable
Input (TTL)
.
A
logic
high
on
this
input
pin
shuts
off
the
transmitter's
laser
so
that
there
is
no
optical
output
.
It
is
set
to
logic
low
as
default
.
DLOOP
Diagnostic
Loopback
Enable
(LVTTL)
.
When
the
DLOOP
input
is
low,
the
2
.5
Gbits/s
serial
data
stream
from
the
parallel-to-serial
converter
is
looped
back
internally
to
the
serial-to-parallel
con-
verter
along
with
an
internally
generated
bit
synchronous
serial
clock
.
The
received
serial
data
path
from
the
optical
receiver
is
disabled
.
LLOOP
Line
Loopback
Enable
(LVTTL)
.
When
LLOOP
is
low,
the
2
.5
Gbits/s
serial
data
and
recovered
clock
from
the
optical
receiver
are
looped
directly
back
to
the
optical
transmitter
.
The
multiplexed
serial
data
from
the
parallel-to-serial
converter
is
ignored
.
12C
Data
Reserved
Function
.
No
connection
when
not
in
use
.
12C
Clock
Reserved
Function
.
No
connection
when
not
in
use
.
RESET
Master
Reset
(LVTTL)
.
Reset
input
for
the
multiplexer
and
demultiplexer
.
A
logic
low on
this
input
clears
all
buffers
and
registers
.
During
RESET,
POCK
and
PCLK
do
not
toggle
.
PICLKP
Differential
LVPECL
Parallel
Input
Clock
.
A
155
MHz
nominally
50%
duty
cycle
input
clock
to
PICLKN
whichTxD[0
:15]P/N
is
aligned
.
The
rising
edge
of
PICK
transfers
the
data
on
the
16
TxD
inputs
into
the
holding
register
of
the
parallel-to-serial
converter
.
10
Agere
Systems
Inc
.
AdLib OCR Evaluation
Advance
Data
Sheet
May
2002
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel155
Mbits/s
Multiplexer/Demultiplexer
Pin
Descriptions
(continued)
Table
4
.
TD16-Type
TransponderOutput
Pin
Descriptions
Pin
Name
Pin
Description
RxQ[0
:15]P
Received
Output
Data
(16-Bit Differential
LVPECL
Parallel
Output
Data
Bus)
.
RxQ[0
:15]
is
the
RxQ[0
:15]N
155
Mbyte/s
16-bit
output
word
.
RxQ15P/N
is
the
most
significant
bit
of
the
received
word
and
is
the
first
bit
serialized
.
RxQ00P/N
is
the
least
significant
bit
of
the
received
word
and
is
the
last
bit
serialized
.
RxQ[0
:15]P/N
is
updated
on
the
falling
edge
of
POCK
.
POCLKP
Parallel
Output
Clock
(Differential
LVPECL
Parallel
Output
Clock)
.
This
output
is
a 155
MHz
POCLKN
nominally
50%
duty
cycle,
byte
rate
output
clock
that
is
aligned
to
the
RxQ[0
:15]
byte
serial
output
data
.
RxQ[0
:15]
and
FP
are
updated on
the
falling
edge
of
POCK
.
LOS
Loss
ofSignal
(LVTTL)
Active-Low
.
When
active,
low ac
signal levels
are
detected
by
the
limit-
ing
amplifier
and/or
loss
of
lock
at
the
CDR
.
LSRBIAS
Laser
Bias (Analog)
.
This
signal
provides
an
indication
of
the
health
of
the
laser
in
the
transmitter
.
It
changes
at
the
rate
of
20
mV/mA
of
bias current
.
It
this
output
reaches
1
.4
V
(70
mA
of
bias),
the
automatic
power
control
circuit
is
struggling
to
maintain
output
power
.
This
may
indicate that
the
transmitter
has
reached an
end-of-life
condition
.
LSRALM
Laser
Degrade
Alarm
(5
V
CMOS)
.
A
logic
low
on
this
output
indicates
that
the
transmitter's
auto-
matic
power
control
circuits
are
unable
to
maintain
the
nominal
output
power
.
This
output
becomes
active
when
the
optical
output
power
degrades
2
db
below
the
normal
operating
power
.
LPM
Laser
Power
Monitor
(Analog)
.
This
signal
provides
an
indication
of
the
output
power
level
from
the
transmitter
laser
.
It
is
set
at
500
mV
for
the
nominal
transmitter
optical
output
power
.
If
the
opti-
cal
power
decreases by 3
dB,
this
output
will
drop
to
approximately
250
mV,
and
if
the
output
power
should
increase
by 3
dB,
this
output
will
increase
to
1000
mV
.
IPDMON
Receiver
Photodiode
Current
Monitor
(Analog)
.
This
output
provides
a
current
output
that
is
a
mirror
of
the
of
the photocurrent
generated
by
the
optical
receiver's
APD
photodetector
diode
by a
gain
of
10
times
.
LOCKDET
Lock
Detect
(CMOS)
.
This
output
goes
low
after
the
transmit
side
PLL
has
locked
to
the
clock
sig-
nal
provided
at
the
TxREFCLK
input
pins
.
LOCKDET
is
an
asychronous
output
.
PCLKP/N
Parallel
Byte
Clock
(Differential
LVPECL)
.
This
byte-rate
reference
clock
is
generated by
divid-
ing the
internal
2
.488
GHz
serial
bit
clock
by
16
.
This
output
is
normally
used
to
synchronize
byte-
wide
transfers
from
the
upstream
logic into
the
TD
16
transponder
.
See
section
on
Parallel
Data
and
Clock,
page
19
.
Agere
Systems
Inc
.
11
AdLib OCR Evaluation
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
Advance
Data
Sheet
May
2002
Functional
Description
Transmitter
The
optical
transmitter
in
the
TD16-type
transponder
is
optimized
for
the
particular
SDH/SONET
application
segment
in
which
it
was
designed
to
operate
.
The
transmitter
has
a
DFB
laser
as
the
optical
element
and
can
operate
at
either
1310
nm
or
1550
nm
.
The
trans-
mitter
is
driven
by
a
serial
data
stream developed
in
the
parallel-to-serial
conversion
logic
and
by a
2488
.32
MHz
serial
bit
clock,
which
is
created
from
the
clock
synthesizer using
a
PLL
and
a
reference
fre-
quency
from
the
TxREFCLKP/N
.
The
clock
synthesizer
will
acquire
phase/frequency
lock
after
a
valid
SONET
signal
is
applied
.
The
LOCK-
DET
pin
indicates
when
the
clock
synthesizer
has
exceeded
phase-lock
limits
with
the
incoming
TxREF-
CLKP/N
.
The
lock-detect function
compares
the
phases
of
the
input
155
MHz
clock
at
the
TxREFCLKP/N
and
the
internally
generated
155
MHz
output
clock
.
When
the
phase
difference
between
the
two
signals
is
close
to
zero,
LOCKDET
is
set
to
a
logic-low state
.
When
the
phase
difference
between
the
two
signals
is
changing
with
time
at
a
rate
greater
than
the
cutoff
frequency
(2
MHz),
the
LOCKDET
is
set
to
a
logic
high
.
A
16
:1
multiplexer
performs
the
parallel-to-serial
con-
version
and
generates
2
.5
Gbits/s
serial
data
for
the
optical
transmitter
.
Receiver
The
optical
receiver
in
the
TD
16-type
transponder
has
an
APD
and
is
optimized
for
the
particular
SDH/
SONET
application
segment
in
which
it
was
designed
to
operate
.
The
detected
serial
data
output
of
the
opti-
cal
receiver
is
connected
to
a
clock
and
data recovery
circuit
(CDR), which
extracts
a
2488
.32
MHz
clock
sig-
nal
.
The
recovered
serial
bit
clock
signal
and
a
retimed
serial
data
signal
are
presented
to
the
16-bit
serial-to-
parallel
converter
and
to
the
frame and
byte
detection
logic
.
The
optoelectronic
receiver
circuitry
is
responsible
for
amplifying
the
signal
sufficiently
to
provide
a
digital
waveform
to
the
clock
and
data
recovery
PLL
.
The
CDR
circuitry
consists
of
a
PLL
that
is
responsible
for
clock
recovery
and
retiming
.
A
1
:16
demultiplexer
performs
the
serial-to-parallel
conversion
and
gener-
ates
16
parallel
outputs
at
a 155
Mbits/s
rate
.
The
par-
allel
output
data
is
aligned
to
a 155
MHz
clock
derived
from
the
2
.5
GHz
recovered
clock
.
Loopback
Modes
The
TD
16
transponder
is
capable
of
operating
in
either
of
two loopback
modes
:
line
loopback
or
diagnostic
loopback
.
Line
Loopback
.
When
LLOOP
is
pulled
low,
the
received
serial
data
stream
and
recovered
2488
.32
MHz
serial
clock
from
the
optical
receiver
are
connected
directly to
the
serial
data
and
clock
inputs
of
the
optical
transmitter
.
This
establishes
a
receive-to-
transmit
loopback
at
the
serial
line
rate
.
Diagnostic
Loopback
.
When
DLOOP
is
pulled
low,
a
loopback
path
is
established
from
the
transmitter
to
the
receiver
.
In
this
mode,
the
serial
data
from
the
parallel-
to-serial
converter
and
the
transmit
serial
clock
are
looped
back
to
the
serial-to-parallel
converter
and
the
frame
and
byte detect
circuitry,
respectively
.
1Z
AgereSystems
Inc
.
AdLib OCR Evaluation
Advance
Data
Sheet
May
2002
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel155
Mbits/s
Multiplexer/Demultiplexer
Absolute
Maximum
Ratings
Stresses
in
excess
of
the
absolute
maximum
ratings
can
cause permanent
damage
to
the
device
.
These
are
abso-
lute
stress
ratings
only
.
Functional
operation
of
the
device
is
not
implied
at
these
or
any
other
conditions
in
excess
of
those
given
in
the
operations
sections
of
the
data
sheet
.
Exposure
to
absolute
maximum
ratings
for
extended
periods
can
adversely
affect
reliability
.
Parameter
Symbol
Min
Max
Unit
Operating
Case
Temperature
Range
:
TD161_1
TD161_2
Tc
-40
-25
85
70
0C
0C
Storage
Case
Temperature
Range
Ts
-40
85
°C
Supply
Voltage
-
-0
.5
5
.5
V
Voltage
on
Any
LVPECL
Pin
-
0
Vcc
-
High-speed
LVPECL
Output
Source
Current
- -
50
mA
Static
Discharge
Voltages
ESD
-
500
V
Relative
Humidity
(noncondensing)
RH
-
85
%
Receiver
Optical
Input
Power
:
APD
PAN
-
-3
dBm
Minimum
Fiber
Bend
Radius
-
1
.25
(31
.8)
-
in
.
(mm)
1
.
Human
body
model
.
Agere
Systems
Inc
.
13
AdLib OCR Evaluation
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
Advance
Data
Sheet
May
2002
Optical
Characteristics
(continued)
Table 5
.
TD16L1
Long-Reach/Long-Haul
1310
nm
(DFB
Laser,
APD
Receiver)
Optical
Characteristics
(Tc=-5
°Cto70°C,VCC=3
.3V±5%)
Parameter
Symbol
Min
Typ
Max
Unit
Average
Output
Power
:
BOL
EOL
PBOL
PEOL
-1
.2
-2 0
-
1
.3
2
dBm
dBm
Operating
Wavelength
X
1280
-
1335
nm
Spectral
Width
2
AX20
- -
1
nm
Side-mode
Suppression
Ratio
(DFB
laser)3
SSR
30
- -
dB
Extinction
Ratio
:
BOL4
EOL4
reBOL
reEOL
10
8
.2 11
--
-
dBdB
Optical
Rise
and
Fall
Times
tR,
tF
- -
200
ps
Eye
Mask
of
Optical
output
5,6
Compliant
with
GR-253
and
ITU-T
G
.
957
Jitter
Generation
Compliant
with
GR-253
and
ITU-T
6
.783
Power
Output
with
Transmitter
Disabled
PDIS
-
-
-40
dBm
Average
Receiver
Sensitivity
:
BOL
(BER
=
1
x
10-10)7
EOL
(BER
=
1
x
10-10)7
PRBOL
PREOL
-30
-29
-31
-
--
dBm
dBm
Maximum
Receiver
Optical
Power
PRmAx
-6
- -
dBm
Link Status
ResponseTime
-
3
-
100 gs
Optical
path
Penalty
- - -
1
dB
Receiver
Reflectance
- - -
-27
dB
Jitter
Tolerance
and
Jitter
Transfer
I
Compl
iant
with
GR-253
and ITU-T
G
.958,
G
.825
1
.
Output
power
definitions
and measurements
per
ITU-T
Recommendation
G
.957
.
2
.
Full
spectral
width
measured
20
dBdown
from
the
central
wavelength
peak
under
fully
modulated
conditions
.
3
.
Ratio
of
the output
power
in
the
dominant
longitudinal
mode
to
the
power
in
the
most
significant
side
mode
under
fully
modulated
conditions
.
4
.
Ratio
of
logic
1
output
power
to
logic
0
output
power
under
fully
modulated
conditions
.
5
.
GR-253_CORE,
Synchronous
Optical
Network
(SONET)
Transport
Systems
:
Common
Generic
Criteria
.
6
.
ITU-T
Recommendation
G
.957, Optical
Interfaces
for
Equipment
and
Systems
Relating
to
the
Synchronous
Digital
Hierarchy
.
7
.
At
1
x 10-10
BER,
223-
1
pseudorandom
data
input
with
a 10
dB
extinction
ratio
light
source
.
14
Agere
Systems
Inc
.
AdLib OCR Evaluation
Advance
Data
Sheet
May
2002
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel155
Mbits/s
Multiplexer/Demultiplexer
Optical Characteristics
(continued)
Table
6
.
TD16L2
Long-Reach/Long-Haul
1550
nm
(DFB
Laser,
APD
Receiver)
Optical
Characteristics
(Tc=0
°Cto65°C,VCC=3.3V±5%)
Parameter
Symbol
Min
TO
Max
Unit
Average
Output
Power
:
BOL
EOL
PBOL
PEOL
-1
.2
-2 0
-
1
.3
2
dBm
dBm
Operating
Wavelength
X
1500
-
1580
nm
Spectral
Width
2
AX20
- -
1
nm
Side-mode
Suppression
Ratio
(DFB
laser)3
SSR
30
- -
dB
Extinction
Ratio
:
BOL4
EOL4
reBOL
reEOL
10
8
.2 11
--
-
dBdB
Optical
Rise
and
Fall
Times
tR,
tF
- -
200
ps
Eye
Mask
of
Optical
output
5,6
Compliant
with
GR-253
and
ITU-T
G
.
957
Jitter
Generation
Compliant
with
GR-253
and
ITU-T
G
.783
Power
Output
with Transmitter
Disabled
PDIS
-
-
-40
dBm
Average
Receiver
Sensitivity
:
BOL
(BER
=
1
x
10-10)7
EOL
(BER
=
1
x
10-10)7
PRBOL
PREOL
-30
-29
-31
-
--
dBm
dBm
Maximum
Receiver
Optical
Power
PRmAx
-6
- -
dBm
Link Status
ResponseTime
-
3
-
100 gs
Optical
path
Penalty
- - -
2
dB
Receiver
Reflectance
- - -
-27
dB
Jitter
Tolerance
and
Jitter
Transfer
I
Compl
iant
with
GR-253
and ITU-T
G
.958,
G
.825
1
.
Output
power
definitions
and measurements
per
ITU-T
Recommendation
G
.957
.
2
.
Full
spectral
width
measured
20
dBdown
from
the
central
wavelength
peak
under
fully
modulated
conditions
.
3
.
Ratio
of
the output
power
in
the
dominant
longitudinal
mode
to
the
power
in
the
most
significant
side
mode
under
fully
modulated
conditions
.
4
.
Ratio
of
logic
1
output
power
to
logic
0
output
power
under
fully
modulated
conditions
.
5
.
GR-253
-CORE,
Synchronous
Optical
Network
(SONET)
Transport
Systems
:
Common
Generic
Criteria
.
6
.
ITU-T
Recommendation
G
.957,
Optical
Interfaces
for
Equipmentand
Systems
Relating
to
the
Synchronous
Digital
Hierarchy
.
7
.
At
1
x 10-10
BER,
223-1
pseudorandom
data
input
with
a 10
dB
extinction
ratio
light
source
.
Agere
Systems
Inc
.
15
AdLib OCR Evaluation
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
Advance
Data
Sheet
May
2002
Electrical
Characteristics
Table 7
.
Transmitter
Electrical
I/O
Characteristics
(TC
=
-5°C
to
70
°C,
Vcc
=
3
.3
V
±
5%)
Parameter
Symbol
Logic
Min
TO
Max
Unit
Reference Clock
TxREFCLKP/N
Diff
.
-20
-
20
ppm
Frequency
Tolerance
LVPECL
Reference Clock
- -
40
-
60
%
Input
Duty
Cycle
Reference
Clock
Phase
Jitter
- -
-
-
3
psrms
Reference Clock
Signal
Levels
:
Diff
.
Differential
Input
Signal
level
OVINDIFF
LVPECL
300
-
1200
mV
Differential
Input
Impedance
AR
80
-
120
0
Input
Data
Signal
Levels
:
TxD[0
:15]P/N
Diff
.
Input High,
VIH
LVPECL
Vcc-
1
.165
-
Vcc-
0
.880
V
Input
Low,
VIL
Vcc-
1
.810
-
Vcc-
1
.475
V
Input
Voltage
Swing,
AVIV
150
- -
mV
Transmitter
Disable
Inputs
TxDis
TTL
(5
V)
Vcc-
2
.0
-
Vcc
V
Transmitter
Enable
Input'
TxEN
TTL
(5
V) 0
-
0
.8
V
Laser
Degrade
Alarm2
LSRALM
CMOS
TTL
Output
High,
VOH
(5
V)
4
.5
-
5
V
Output
Low,
VOL
0
-
0
.3
V
Laser
Power
Monitor
Output3
LPM
Analog
460 500 540
mV
Line
Loopback
Enable
LLOOP
LVTTL
(Active-low)
:
Input High,
VIH
2
.0
-
Vcc
+
1
.0
V
Input
Low,
VIL
0
-
0
.8
V
Diagnostic
Loopback
Enable
DLOOP
LVTTL
(Active-
low)
:
Input
High,
VIH
2
.0
-
Vcc
+
1
.0
V
Input
Low,
VIL
0
-
0
.8
V
Parallel
Output
Clocks
:
PCLKP/N
Diff
.
Output
High,
VOH
LVPECL
Vcc-
1
.21
Vcc-
1
.11
Vcc-
1
.06
V
Output
Low,
VOL
Vcc-
1
.94
Vcc-
1
.92
Vcc-
1
.91
V
1
.
The
transmitter
is
normally
enabled and
only
requires
an
external
voltage
to
disable
.
ACMOS
LVTTL
high
will
disable
the
Tx
.
2
.
The
Tx
operates from
an
internally
generated 5
V
supply
.
3
.
Set
at
500
mV
at
nominal
optical
output
power
.
Provides
linear
Po
tracking
(-3
dB
=
250 mV,
+3
dB
=
1000
mV)
.
4
.
Wavelength
variation
in
picometers
is
determined
by
laser
temperature
shift
as
measured
by the
internal
thermistor
.
5
.
Terminated
into
50
S2 to
Vcc-2
.00
V
.
16
Agere
Systems
Inc
.
AdLib OCR Evaluation
Advance
Data
Sheet
May
2002
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel155
Mbits/s
Multiplexer/Demultiplexer
Electrical
Characteristics
(continued)
Table
8
.
Receiver
Electrical
I/O
Characteristics
(Tc
=
-5
°C
to
70
°C,
Vcc
= 3
.3
V
±
5%)
Parameter
Symbol
Logic
Min
Typ
Max
Unit
Parallel
Output
Clock
:
POCLKP/N
Diff
.
Output
High,
VOH
LVPECL
Vcc-
1
.21
Vcc-
1
.11
Vcc-
1
.06
V
Output
Low,
VOL
Vcc-
1
.94
Vcc-
1
.92
Vcc-
1
.91
V
POCuc
Duty
Cycle
--
40
-
60
%
Output Data
Signal
Levelsi
:
RXQ[0
:15]P/N
Diff
.
Output
High,
VOH
LVPECL
Vcc-
1
.21
Vcc-
1
.11
Vcc-
1
.06
V
Output
Low,
VOL
Vcc-
1
.94
Vcc-1
.92
Vcc-
1
.91
V
RxQ[0
:15]
Rise/Fall
Ti
me2
-
-
-
-
1
.0
ns
Loss-of-Signal
Output
:
LOS
LVTTL
Output
High,
VOH
2
-
Vcc
+
1
.0
V
Output
Low,
VOL
GND
-
0
.8
V
Photodiode
Monitor
IDPMON
Analog
1
-
-
pA
1
.
Terminated
into
330
S2
to
ground
.
2
.
20%
to
80%,
330
S2 to
ground
.
Table
9
.
Power
Supply
Characteristics
(Tc
=
-5
°C
to
70
°C)
Parameter
Symbol
Min
Typ
Max
Unit
Supply
Voltage
Vcc
3
.13
3
.3
3
.47
V
do
Power
Supply
Current
Drain'
Icc
-
1800
2000
mA
Power
Dissipation
I
PDIss
I
-
I
6
I
7
I
W
1
.
Does
not
include
output
termination
resistor
drain
.
Agere
Systems
Inc
.
17
AdLib OCR Evaluation
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
Advance
Data
Sheet
May
2002
Applications
Category
II
Jitter
Transfer
Mask,
and
ITU-T
specifica-
tion
Figure
9-2,
G
.958
Jitter
Transfer
Type
A
.
Jitter
Measurement
Transmitter
jitter
generation
meets
Telcordia
GR-253_CORE
specification
in
section
5
.6 .2
.3
.6
on
page
5-119 and ITU-T
G
.783
specification
in
Table
9
on
page
30
.
Measurements
were
done
over
full
tempera-
ture
range
and
power
supply
variations
using
HP08664A
as a
reference
clock
and
measured
using
HPIAgilent®
OmniBER
TM
718
(the
running
data
pat-
tern
has
SONET
frame
with
223
-
1
PRBS
as
payload)
.
Receiver
jitter
tolerance
meets
template
in
Figure
4/
G
.825
STM-16
jitter
tolerance
.
This
is
Type
A
normal
fit-
ter
tolerance,
in
line
with
ITU-T
G
.958
and
Telcordia
GR-253_CORE
regarding
jitter
tolerance
.
A
1
dB
BER
penalty
test
methodology
is
used
.
Parallel
Data
and
Clock
The
TxD[0
:15]P/N
and
the
RxQ[0
:15]P/N,
POCLKP/N
and
PCLKP/N
outputs
are
high-speed
(155
Mbits/s),
LVPECL
differential
data
and
clock
signals
.
To
maintain
optimum
signal
fidelity,
these
inputs
and
outputs
must
be connected
to their
terminating
devices
via
50
0
controlled-impedance
transmission
lines
.
The
transmitter
input
(TxD[0
:15]P/N)
must
be
terminated
as
close
as
possible
to
the
TD
16
transponder
connector
.
Figure
3,
below,
shows
one
example
of
the
proper
ter-
minations
.
Other
methods
may
be used
.
Single-ended
interfacing
is
not
recommended
.
Jitter
transfer,
measured
with
the
transponder
operat-
ing
in
line-loopback
mode,
meets
Telcordia
GR-253
CORE
specification
shown
in
Figure
5-27,
Figure
3
.
Transponder
Interfacing
19
AgereSystems
Inc
.
SONET/SDH
INTERFACE
IC
(LVPECL)
TD16-TYPE
TRANSPONDER
AdLib OCR Evaluation
Advance
Data
Sheet
May
2002
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel155
Mbits/s
Multiplexer/Demultiplexer
Applications
(continued)
Transmitter
Reference
Clock
Input
The
TxREFCLK
input
is
different
than
the
other
inputs
to
the
transmitter
because
it
is
internally
terminated,
ac-
LVPECL
SONET/SDH
INTERFACE
IC
(Vcc = 3
.3
V)
LVPECL
SONET/SDH
INTERFACE
IC
(Vcc = 3
.3
V)
coupled,
and
self-biased
.
Therefore,
it
must
be
treated
differently
than
the
TxD
and
PI
CLK
inputs
.
Differentially,
the
input
impedance
at
this
input
is
100
0, but
due
to
the
way
it
is
biased
internally,
when
driven
single-
ended,
the
impedance
appears
as 60
0
.
The
proper
termination
scheme
for
the
TXREFCLK
input
is
shown
in
Figure
4
.
TD16TRANSPONDER
MULTIPLEXER
TXREFCLKP
'
PLL
o
CLOCK
TXREFCLKN
°
SYNTHESIZER
i
CD CD
O
1)
y
M
50
E2
TRANSMISSION
LINES
Z
Z
O
U
DIFFERENTIAL
INTERFACE
TD16TRANSPONDER
MULTIPLEXER
44
TXREFCLKP
'
~
PLL
00
TXREFCLKN
CLOCK
CO
~(
SYNTHESIZER
0
.1
ItF
1
O
0
M
50
E2
TRANSMISSION
LINES
ZFORA
SINGLE-ENDED
INPUT
-T
z
THE
INPUT
IMPEDANCE
IS
O
EQUIVALENT
TO
60
S2
.
U
SINGLE-ENDED
INTERFACE
Figure
4
.
Interfacing
to
the
TxRefClk
Input
Agere
Systems
Inc
.
19
AdLib OCR Evaluation
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
Advance
Data
Sheet
May
2002
Applications
(continued)
Clocking
Scheme
Figure
5
shows
how
to
clock
the
TD16
transponder
with
customer
ICs
.
TD16TRANSPONDER
Figure
5
.
Timing
Mode
Block
Diagram
20
Agere
Systems
Inc
.
AdLib OCR Evaluation
Advance
Data
Sheet
May
2002
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel155
Mbits/s
Multiplexer/Demultiplexer
Applications
(continued)
ReceiverPhotocurrent
Monitor
The
receiver
photocurrent,
IPDMON,
is
amplified
by
10
times
and
is
available
as a
current
source
for
monitor-
ing
purposes
.
It
is
linear
with
respect
to
receiver
power
in
milliwatts
.
An
external
resistor
may
be
attached
to
it
to
provide
an
indication
in
voltage,
VPD
.
When
receiver
optical
input
power
is
low,
the higher the
resistor
value,
the
higher
the
resolution
.
However,
when
the
optical
power
is
high,
a
resistor
with
a
value
too
high
can
satu-
rate
VPD
and
it
will
not
be
monolithic
with
the
optical
power
input
.
To
maintain
proper
balance,
a
resistor
value
of
200
0
is
recommended
.
Compatibility
with
Other
Codes
The
following
information
outlines
certain
consider-
ations
in
the
event a board
design
is
desirable
for
vari-
ous
different
transponders
.
TEC
Voltage
Supplies
In
a
cooled
transponder
such as
the
CA16,
pins
52, 53,
54,
133,
and
134
are
used
to
provide
a 3
.3
V
power
supply
for
the
on-chip
thermoelectric cooler
.
These
pins
are
defined
as
No
Function
in
the
TD
16
.
These
pins
may
be
supplied with
such
voltage,
even
though
it
is
not
required
in
TD
16
.
12C
Interface
An
12C
interface
designed
into
the
TD
16
is
meant
for
internal
use
.
However, customers
may
use
it
.
Through
this
interface,
the
loss-of-signal
threshold
may
be
adjusted
.
Other
functions
are
to
be
defined
.
Agere
Systems
Inc
.
21
AdLib OCR Evaluation
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
Advance
Data
Sheet
May
2002
Qualification
and
Reliability
To
help
ensure
high
product
reliability
and
customer
satisfaction,
Agere
Systems
Inc
.
is
committed
to
an
intensive
quality
program
that
starts
in
the
design
phase
and
proceeds
through
the
manufacturing
process
.
Optoelectronics
modules
are
qualified
to
Agere
Systems'
internal
standards
using
MIL-STD-883
test
methods
and
procedures
and
using
sampling
techniques
consistent
with
Telcordia
Technologies
requirements
.
This
qualification
program
fully
meets
the
intent
of
Telcordia
Technologies
reliability
practices
TR-NWT-000468
and
TA-TSY
000983
.
In
addition,
the
Agere
Systems'
optoelectronics
design,
development,
and
manufacturing
facility
has
been
certified
to
be
in
full
compliance
with
the
latest
ISO®
9001
Quality
System
Standards
.
Regulatory
and
Voluntary
Compliance
Table 10
.
Regulatory
and
Voluntary
Compliance
Feature
Standard
Test
Parameters/Performance
Electrostatic
Discharge
(ESD)
to
Sensitivity
Classification
Class
1
(0
V
to
1,999
V)
the
electrical
pins
MIL-STD-883E,
Method
3015
.7
Electrostatic
Discharge
(ESD)
to
EN
61000-4-2
Full
recovery
following
±8
kV
contact
dis-
housing
and
optical
connector
IEC®
61000-4-2 charge
and
±15
kV
air
discharge
Electromagnetic
Compatibility
:
Radiated
Emissions
FCC
Part
15,
Class
B
Full
compliance
within
the
frequency
EN55022,
Class
B
range
of
GRA089
CORE*
10
kHz-5
GHz
Immunity
EN
61000-4-3
GRA089
CORE*
Full
compliance
within
the
frequency
range
of
10
kHz-10
G
Hz
at
a
field
strength of
8
.5
V/m
Safety
of
Information
Technology
IEC
60950
CB
Scheme
;
Equipment
EN
60950
Test
Report
Reference
UL®
60950
No
.
01
RT14477-02252002
CAN/CSA®-C22
.2
No
.
60950
Reference
Certificate
No
.
US/5754/UL
UUCSA
Recognition
File
No
.
E225949
Laser
Safety
21
CFR
1040
.10
and
1040
.11
CDRH
Accession
No
.
(TBD)
includes
Laser
Notice
No
.
50,
/EC60825-1
:1993,
A1
:1997,
and
AEL
Class
1
A2
:2001
CE
Mark
LVD
73/23/EEC
EC
Declaration
of
Conformity
EMC
89/336/EEC
Component
Recognition
UL
and
CSA
Joint
Component
UL
File
Number
:
US/5786/UL
Recognition
for
Information
Technology
Equipment
Compositional
Analysis
Standard
ICPS,
GC/MS,
FTIR
Analytical
test results
:
elements,
organic
analytical
processes
compounds
*
Complies
with
applicable
Telcordia
NEBS
Level
1-3
EMC
requirements
for
components
in
a
stand alone
config-
uration
.
22
Agere
Systems
Inc
.
AdLib OCR Evaluation
Advance
Data
Sheet
May
2002
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel155
Mbits/s
Multiplexer/Demultiplexer
Outline
Diagram
Dimensions
are
in
inches
and
(millimeters)
.
6-6-
1
.70
(43
.18)
0
.15
(0
.38)
3
.
.60
0
.653
(91
.44)
(16
.59)
RECEIVER
2
.60
1
.192
(66
.04)
(30
.27)
TRANSMITTER
0
.755
(19
.18)
0
.500
(12
.70)
0
.45
01
1
.500
(11
.43)
(38
.10)
0
.015
(0
.38)
0
.300
(7
.62)
0
.108
10
.002
(45
.72)
0
.380
0
.450
(9
.65)-
'
(11
.43)
-
_
o
1
0
1
o
o
PIN
#1 PIN #81
1
.840
±0
.002
1
.700
(46
.7
4)
PIN
#80
0
(43
.18)
PIN
#160
I
0
OO
0
.106±0
.005~
o
o
0
0
(2
.69)
0
.047
±0
.01
(1
.19)
0
.272
(6
.91)
O
O
0
.222
(5
.64)
(
MOUNTING
HOLES
:
BLIND
(3
PLACES)
160-PIN
JAE
CONNECTOR
M2
.5
X
0
.45
(METRIC)
MATING
PIN
WR-160PB-VF50-A3
3
mm
MAX,
LENGTH
INTO
PACKAGE
Agere
Systems
Inc
.
23
AdLib OCR Evaluation
TD16-Type
2
.5
Gbits/s
Transponder
with
16-Channel
155
Mbits/s
Multiplexer/Demultiplexer
Advance
Data
Sheet
May
2002
Ordering
Information
Table
11
.
Ordering
Information
Code
Applications
Connector
Comcode
X-TD16L1
CAA
1310
nm
Long
Haul
SC
10912220OX
X-TD16L1
FAA
1310
nm
Long
Haul
FC/PC
109122218X
X-TD16L1TAA
1310
nm
Long
Haul
ST
109122226X
X-TD16L1WAA
1310
nm
Long
Haul
LC 109122234X
X-TD16L2CAA
1550
nm
Long
Haul
SC
109122242X
X-TD16L2FAA
1550
nm
Long
Haul
FC/PC
109122259X
X-TD16L2TAA
1550
nm
Long
Haul
ST
109122267X
X-TD16L2WAA
1550
nm
Long
Haul
LC 109122275X
Table
12
.
Related
Documentation
Document
Title
Document
Type
Document
Number
Using
the
AgereSystems
OC-48
Transponder
Test
Board
Application
Note
AP00-017TPDR-1
TD
16-Transponder
Quick-Start
and
Troubleshooting
Guide
Application
Note
AP02-060TPDR
TD16-Type
2
.5
Gbits1s
TransponderOverview
Application
Note
AP02-059TPDR
2
.5
Gbits/s
Jitter
and
Measurements
Application
Note
AP02-005TPDR
Telcordia
Technologies
is
a trademark
of
Telcordia
Technologies
Inc
.
ISO
is
a
registered
trademark
of
The
International
Organization
for
Standardization
.
IEC
is
a
registered
trademark
of
The
International
Electrotechnical
Commission
.
HP
is
a
registered
trademark
of
Hewlett-Packard
Company
.
Agilent
is
a
registered
trademark
and
OmniBER
is
a trademark
of
Agilent
Technologies,
Inc
.
UL
is
a
registered
trademark
of
Underwriters
Laboratories,
Inc
.
CSA
is
a
registered
trademark
of
Canadian
Standards
Association
.
For
additional
information,
contact your
Agere
Systems
Account
Manager
or
the
following
:
INTERNET
:
http
://www
.agere
.com
E-MAIL
:
docmaster@agere
.com
N
.
AMERICA
:
Agere
Systems
Inc
.,
555
Union
Boulevard,
Room
30L-15P-BA,
Allentown,
PA
18109-3286
1-800-372-2447,
FAX
610-712-4106
(In
CANADA
:
1-800-553-2448,
FAX
610-712-4106)
ASIA
:
Agere
Systems
Hong
Kong
Ltd
.,
Suites
3201
&
3210-12,
32/F,
Tower
2,
The
Gateway,
Harbour
City,
Kowloon
Tel
.
(852)
3129-2000,
FAX
(852)
3129-2020
CHINA
:
(86)
21-5047-1212
(Shanghai),
(86)
10-6522-5588
(Beijing),
(86)
755-5881122
(Shenzhen)
JAPAN
:
(81)
3-5421-1600
(Tokyo),
KOREA
:
(82)
2-767-1850
(Seoul),
SINGAPORE
:
(65)
6778-8833,
TAIWAN
:
(886)
2-2725-5858
(Taipei)
EUROPE
:
Tel
.
(44)
7000
624624,
FAX
(44)
1344
488
045
Agere
Systems
Inc
.
reserves
the
right
to
make
changes
to
the
product(s)
or
information
contained
herein
without
notice
.
No
liability is
assumed
as a
result
of
their
use or
application
.
Agere,
Agere Systems,
and
the
Agere
logo
are
trademarks
of
Agere
Systems
Inc
.
Copyright
©
2002
Agere
Systems
Inc
.
sys
tems
All
Rights
Reserved
we
r
e
May
2002
DS02-249TPDR
(Replaces
DS01-240PTO)
8
AdLib OCR Evaluation