The 4N25, 4N26, 4N27 and 4N28 devices consist of a gallium arsenide
infrared emitting diode optically coupled to a monolithic silicon phototransistor
detector.
•Most Economical Optoisolator Choice for Medium Speed, Switching Applications
•Meets or Exceeds All JEDEC Registered Specifications
•
To order devices that are tested and marked per VDE 0884 requirements, the
suffix ”V” must be included at end of part number. VDE 0884 is a test option.
Applications
•General Purpose Switching Circuits
•Interfacing and coupling systems of different potentials and impedances
•I/O Interfacing
•Solid State Relays
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating Symbol Value Unit
INPUT LED
Reverse Voltage VR3 Volts
Forward Current — Continuous IF60 mA
LED Power Dissipation @ TA = 25°C
with Negligible Power in Output Detector
Derate above 25°C
PD120
1.41
mW
mW/°C
OUTPUT TRANSISTOR
Collector–Emitter Voltage VCEO 30 Volts
Emitter–Collector Voltage VECO 7 Volts
Collector–Base Voltage VCBO 70 Volts
Collector Current — Continuous IC150 mA
Detector Power Dissipation @ TA = 25°C
with Negligible Power in Input LED
Derate above 25°C
PD150
1.76
mW
mW/°C
TOTAL DEVICE
Isolation Surge Voltage(1)
(Peak ac Voltage, 60 Hz, 1 sec Duration) VISO 7500 Vac(pk)
Total Device Power Dissipation @ TA = 25°C
Derate above 25°CPD250
2.94 mW
mW/°C
Ambient Operating Temperature Range TA–55 to +100 °C
Storage Temperature Range Tstg –55 to +150 °C
Soldering Temperature (10 sec, 1/16″ from case) TL260 °C
Order this document
by 4N25/D
GlobalOptoisolator
SCHEMATIC
PIN 1. LED ANODE
2. LED CATHODE
3. N.C.
4. EMITTER
5. COLLECTOR
6. BASE
1
2
3
6
5
4
STANDARD THRU HOLE
61
1. Isolation surge voltage is an internal device dielectric breakdown rating.
1. For this test, Pins 1 and 2 are common, and Pins 4, 5 and 6 are common.
4N25
4N26
4N27
4N28
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)(1)
Characteristic Symbol Min Typ(1) Max Unit
INPUT LED
Forward Voltage (IF = 10 mA) TA = 25°C
TA = –55°C
TA = 100°C
VF—
—
—
1.15
1.3
1.05
1.5
—
—
Volts
Reverse Leakage Current (VR = 3 V) IR— — 100 µA
Capacitance (V = 0 V, f = 1 MHz) CJ—18 —pF
OUTPUT TRANSISTOR
Collector–Emitter Dark Current 4N25,26,27
(VCE = 10 V, TA = 25°C 4N28 ICEO —
—1
150
100 nA
(VCE = 10 V, TA = 100°C) All Devices ICEO —1—µA
Collector–Base Dark Current (VCB = 10 V) ICBO —0.2 —nA
Collector–Emitter Breakdown Voltage (IC = 1 mA) V(BR)CEO 30 45 —Volts
Collector–Base Breakdown Voltage (IC = 100 µA) V(BR)CBO 70 100 —Volts
Emitter–Collector Breakdown Voltage (IE = 100 µA) V(BR)ECO 7 7.8 —Volts
DC Current Gain (IC = 2 mA, VCE = 5 V) hFE —500 — —
Collector–Emitter Capacitance (f = 1 MHz, VCE = 0) CCE —7—pF
Collector–Base Capacitance (f = 1 MHz, VCB = 0) CCB —19 —pF
Emitter–Base Capacitance (f = 1 MHz, VEB = 0) CEB —9—pF
COUPLED
Output Collector Current (IF = 10 mA, VCE = 10 V) 4N25,26
4N27,28
IC (CTR)(2) 2 (20)
1 (10) 7 (70)
5 (50) —
—
mA (%)
Collector–Emitter Saturation Voltage (IC = 2 mA, IF = 50 mA) VCE(sat) —0.15 0.5 Volts
Turn–On Time (IF = 10 mA, VCC = 10 V, RL = 100 Ω)(3) ton —2.8 —µs
Turn–Off Time (IF = 10 mA, VCC = 10 V, RL = 100 Ω)(3) toff —4.5 —µs
Rise Time (IF = 10 mA, VCC = 10 V, RL = 100 Ω)(3) tr—1.2 —µs
Fall Time (IF = 10 mA, VCC = 10 V, RL = 100 Ω)(3) tf—1.3 —µs
Isolation Voltage (f = 60 Hz, t = 1 sec)(4) VISO 7500 — — Vac(pk)
Isolation Resistance (V = 500 V)(4) RISO 1011 — — Ω
Isolation Capacitance (V = 0 V, f = 1 MHz)(4) CISO —0.2 —pF
1. Always design to the specified minimum/maximum electrical limits (where applicable).
2. Current Transfer Ratio (CTR) = IC/IF x 100%.
3. For test circuit setup and waveforms, refer to Figure 11.
4. For this test, Pins 1 and 2 are common, and Pins 4, 5 and 6 are common.
4N25 4N26 4N27 4N28
IC, OUTPUT COLLECTOR CURRENT (NORMALIZED)
TYPICAL CHARACTERISTICS
Figure 1. LED Forward Voltage versus Forward Current
2
1.8
1.6
1.4
1.2
1110 100 1000
10
1
0.1
0.01 0.5 1
IF, LED FORWARD CURRENT (mA) 2 5 10 20 50
IF, LED INPUT CURRENT (mA)
VF, FORWARD VOLTAGE (VOLTS)
25
°
C
100
°
C
TA = –55
°
C
NORMALIZED TO:
IF = 10 mA
Figure 2. Output Current versus Input Current
PULSE ONLY
PULSE OR DC
10
7
5
2
1
0.7
0.5
0.2
0.1 –60 –40 –20 0 20 40 60 80 100
TA, AMBIENT TEMPERATURE (
°
C)
IC, OUTPUT COLLECTOR CURRENT (NORMALIZED)
1
10
100
0.1 0 20 40 60 80 100
TA, AMBIENT TEMPERATURE (
°
C)
t, TIME ( s)
I
100
50
20
10
5
2
1
0.1 0.2 0.5 1 2 5 10 20 50 100
IF, LED INPUT CURRENT (mA)
CEO, COLLECTOR–EMITTER DARK CURRENT
(NORMALIZED)
µ
VCE = 30 V
10 V
tf
tr
tr
tf
0
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
IC, COLLECTOR CURRENT (mA)
4
8
12
16
20
24
28
5 mA
2 mA
1 mA
01 2 3 4 5 6 7 8 910
Figure 3. Collector Current versus
Collector–Emitter Voltage Figure 4. Output Current versus Ambient Temperature
Figure 5. Dark Current versus Ambient Temperature Figure 6. Rise and Fall Times
(Typical Values)
IF = 10 mA NORMALIZED TO TA = 25
°
C
NORMALIZED TO:
VCE = 10 V
TA = 25
°
C
VCC = 10 V
RL = 1000
RL = 100{{
4N25 4N26 4N27 4N28
100
70
50
20
10
7
5
2
10.1 0.2 0.5 0.7 1 2 5 7 10 20 50 70100
IF, LED INPUT CURRENT (mA)
RL = 1000
100
10
100
70
50
20
10
7
5
2
10.1 0.2 0.5 0.7 1 2 5 7 10 20 50 70100
IF, LED INPUT CURRENT (mA)
RL = 1000
100
10
t , TURN –OFF TIME ( s)
off
µ
t , TURN –ON TIME ( s)
on
µ
Figure 7. Turn–On Switching Times
(Typical Values) Figure 8. Turn–Off Switching Times
(Typical Values)
VCC = 10 V VCC = 10 V
6
6
µ
A
C, CAPACITANCE (pF)
Figure 9. DC Current Gain (Detector Only) Figure 10. Capacitances versus Voltage
20
18
16
14
12
10
8
4
2
0
CCE
f = 1 MHz
0.05 0.1 0.2 0.5 1 2 5 10 20 50
V, VOLTAGE (VOLTS)
CLED
CCB
CEB
5
µ
A
4
µ
A
3
µ
A
2
µ
A
1
µ
A
4
3
2
1
024681012141618
20
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
IC, TYPICAL COLLECTOR CURRENT (mA)
IB = 7
µ
A
IF = 0
TEST CIRCUIT
VCC = 10 V
IF = 10 mA
INPUT
RL = 100
Ω
OUTPUT
WAVEFORMS
10%
90%
ton
INPUT PULSE
OUTPUT PULSE
tf
toff
tr
Figure 11. Switching Time Test Circuit and Waveforms
4N25 4N26 4N27 4N28
PACKAGE DIMENSIONS
THRU HOLE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
STYLE 1:
PIN 1. ANODE
2. CATHODE
3. NC
4. EMITTER
5. COLLECTOR
6. BASE
64
13
–A–
–B–
SEATING
PLANE
–T–
4 PLF
K
C
N
G
6 PLD
6 PLE
M
A
M
0.13 (0.005) B M
T
L
M
6 PLJ
M
B
M
0.13 (0.005) A M
T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.320 0.350 8.13 8.89
B0.240 0.260 6.10 6.60
C0.115 0.200 2.93 5.08
D0.016 0.020 0.41 0.50
E0.040 0.070 1.02 1.77
F0.010 0.014 0.25 0.36
G0.100 BSC 2.54 BSC
J0.008 0.012 0.21 0.30
K0.100 0.150 2.54 3.81
L0.300 BSC 7.62 BSC
M0 15 0 15
N0.015 0.100 0.38 2.54
SURFACE MOUNT
–A–
–B–
SEATING
PLANE
–T–
J
K
L
6 PL
M
B
M
0.13 (0.005) A M
T
C
D6 PL
M
A
M
0.13 (0.005) B M
T
H
G
E6 PL
F4 PL
31
46
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.320 0.350 8.13 8.89
B0.240 0.260 6.10 6.60
C0.115 0.200 2.93 5.08
D0.016 0.020 0.41 0.50
E0.040 0.070 1.02 1.77
F0.010 0.014 0.25 0.36
G0.100 BSC 2.54 BSC
H0.020 0.025 0.51 0.63
J0.008 0.012 0.20 0.30
K0.006 0.035 0.16 0.88
L0.320 BSC 8.13 BSC
S0.332 0.390 8.43 9.90
*Consult factory for leadform
option availability
4N25 4N26 4N27 4N28
*Consult factory for leadform
option availability
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
0.4" LEAD SPACING
64
13
–A–
–B–
N
C
K
G
F4 PL
SEATING
D6 PL
E6 PL
PLANE
–T–
M
A
M
0.13 (0.005) B M
T
L
J
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.320 0.350 8.13 8.89
B0.240 0.260 6.10 6.60
C0.115 0.200 2.93 5.08
D0.016 0.020 0.41 0.50
E0.040 0.070 1.02 1.77
F0.010 0.014 0.25 0.36
G0.100 BSC 2.54 BSC
J0.008 0.012 0.21 0.30
K0.100 0.150 2.54 3.81
L0.400 0.425 10.16 10.80
N0.015 0.040 0.38 1.02
4N25 4N26 4N27 4N28
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
www.fairchildsemi.com © 2000 Fairchild Semiconductor Corporation
