0.5 Ω, CMOS,
1.8 V to 5.5 V, 2:1 Mux/SPDT Switch
Data Sheet
ADG819
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2002–2012 Analog Devices, Inc. All rights reserved.
FEATURES
Low on resistance: 0.8 Ω maximum at 125°C
0.25 Ω maximum on resistance flatness
1.8 V to 5.5 V single supply
200 mA current carrying capability
Automotive temperature range: –40°C to +125°C
Rail-to-rail operation
6-lead SOT-23, 8-lead MSOP, and 6-ball WLCSP packages
Fast switching times
Typical power consumption (<0.01 µW)
TTL-/CMOS-compatible inputs
Pin compatible with the ADG719
APPLICATIONS
Power routing
Battery-powered systems
Communication systems
Data acquisition systems
Cellular phones
Modems
PCMCIA cards
Hard drives
Relay replacement
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
GENERAL DESCRIPTION
The ADG819 is a monolithic, CMOS, single-pole, double-throw
(SPDT) switch. This switch is designed on a submicron process
that provides low power dissipation yet gives high switching
speed, low on resistance, and low leakage currents.
Low power consumption and an operating supply range of
1.8 V to 5.5 V make the ADG819 ideal for battery-powered,
portable instruments.
Each switch of the ADG819 conducts equally well in both
directions when on. The ADG819 exhibits break-before-make
switching action, thus preventing momentary shorting when
switching channels.
The ADG819 is available in a 6-lead SOT-23 package, an 8-lead
MSOP package, and in a 6-ball WLCSP package. This chip
occupies only a 1.14 mm × 2.18 mm area, making it the ideal
candidate for space-constrained applications.
PRODUCT HIGHLIGHTS
1. Very low on resistance, 0.5 Ω typical.
2. 1.8 V to 5.5 V single-supply operation.
3. High current carrying capability.
4. Tiny 6-lead SOT-23, 8-lead MSOP, and 6-ball, 1.14 mm ×
2.18 mm WLCSP packages.
S2 D
S1
IN
ADG819
SWIT CHES SHOWN
FOR A LOGIC 1 INPUT
02801-001
ADG819 Data Sheet
Rev. A | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
ESD Caution...................................................................................5
Pin Configurations and Function Descriptions ............................6
Typical Performance Characteristics ..............................................7
Test Circuits ........................................................................................9
Terminology .................................................................................... 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 13
REVISION HISTORY
5/12—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Deleted ADG820 ................................................................ Universal
Changes to General Description .................................................... 1
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Change to WLCSP θJA Thermal Impedance Parameter,
Table 3 ................................................................................................ 5
Added Table 5 and Table 6; Renumbered Sequentially ............... 6
Deleted Test Circuit 6; Renumbered Sequentially ....................... 8
Changes to Figure 11 to Figure 14 .................................................. 8
Changes to Terminology Section.................................................. 11
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 13
5/02—Revision 0: Initial Version
Data Sheet ADG819
Rev. A | Page 3 of 16
SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter 25°C
−40°C to
+85°C
–40°C to
+125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance, RON1 0.5 Ω typ VS = 0 V to VDD, IS = 100 mA; see Figure 16
0.6 0.7 0.8 Ω max
On Resistance Match Between
Channels, ΔRON1
0.06 Ω typ VS = 0 V to VDD, IS = 100 mA
0.08 0.1 0.12 Ω max
On Resistance Flatness, RFLAT(ON)1 0.1 Ω typ VS = 0 V to VDD, IS = 100 mA
0.17 0.2 0.25 Ω max
LEAKAGE CURRENTS VDD = 5.5 V
Source Off Leakage, IS (Off) ±0.01 nA typ VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 17
±0.25 ±3 ±10 nA max
Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = 1 V, or VS = VD = 4.5 V; see Figure 18
±0.25 ±3 ±25 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current
IINL or IINH 0.005 μA typ VIN = VINL or VINH
±0.1 μA max
Digital Input Capacitance, C
IN
5 pF typ
DYNAMIC CHARACTERISTICS2
tON 35 ns typ RL = 50 Ω, CL = 35 pF, VS = 3 V; see Figure 19
45 50 55 ns max
tOFF 10 ns typ RL = 50 Ω, CL = 35 pF, VS = 3 V; see Figure 19
16 18 21 ns max
Break-Before-Make Time Delay,
tBBM
5 ns typ RL = 50 Ω, CL = 35 pF, VS1 = VS2 = 3 V; see Figure 20
1 ns min
Charge Injection 20 pC typ VS = 2.5 V, RS = 0 Ω, CL = 1 nF; see Figure 21
Off Isolation –71 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 22
Channel-to-Channel Crosstalk –72 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 24
Bandwidth, –3 dB 17 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 23
CS (Off) 80 pF typ f = 1 MHz
CD, CS (On) 300 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 5.5 V, digital inputs = 0 V or 5.5 V
IDD 0.001 μA typ
1.0 2.0 μA max
1 On resistance parameters tested with IS = 10 mA.
2 Guaranteed by design; not subject to production test.
ADG819 Data Sheet
Rev. A | Page 4 of 16
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter 25°C
–40°C to
+85°C
–40°C to
+125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance, RON1 0.7 Ω typ VS = 0 V to VDD, IS = 100 mA; see Figure 16
1.4 1.5 1.6 Ω max
On Resistance Match Between
Channels, ΔR
ON
1
0.06 Ω typ VS = 0 V to VDD, IS = 100 mA
0.13 0.13 Ω max
On Resistance Flatness, RFLAT(ON)1 0.25 Ω typ VS = 0 V to VDD, IS = 100 mA
LEAKAGE CURRENTS V
DD
= 3.6 V
Source Off Leakage, IS (Off) ±0.01 nA typ VS = 3.3 V/1 V, VD = 1 V/3.3 V; see Figure 17
±0.25 ±3 ±10 nA max
Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = 1 V, or VS = VD = 3.3 V; see Figure 18
±0.25 ±3 ±25 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current
IINL or IINH 0.005 μA typ VIN = VINL or VINH
±0.1 μA max
Digital Input Capacitance, CIN 5 pF typ
DYNAMIC CHARACTERISTICS2
tON 40 ns typ RL = 50 Ω, CL = 35 pF, VS = 1.5 V; see Figure 19
60 65 70 ns max
tOFF 10 ns typ RL = 50 Ω, CL = 35 pF, VS = 1.5 V; see Figure 19
16 18 21 ns max
Break-Before-Make Time Delay,
tBBM
40 ns typ RL = 50 Ω, CL = 35 pF, VS1 = VS2 = 1.5 V; see Figure 20
1 ns min
Charge Injection 10 pC typ VS = 1.5 V, RS = 0 Ω,CL = 1 nF; see Figure 21
Off Isolation −71 dB typ RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 22
Channel-to-Channel Crosstalk −72 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see Figure 24
Bandwidth, –3 dB 17 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 23
CS (Off) 80 pF typ f = 1 MHz
CD, CS (On) 300 pF typ f = 1 MHz
POWER REQUIREMENTS VDD = 3.6 V, digital Inputs = 0 V or 3.6 V
IDD 0.001 μA typ
1.0 2.0 μA max
1 On resistance parameters tested with IS = 10 mA.
2 Guaranteed by design; not subject to production test.
Data Sheet ADG819
Rev. A | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted
Table 3.
Parameter Rating
VDD to GND −0.3 V to +7 V
Analog Inputs1 −0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first
Digital Inputs1 −0.3 V to VDD + 0.3 V or 30 mA,
whichever occurs first
Peak Current, Sx or D 400 mA (pulsed at 1 ms, 10%
duty cycle maximum)
Continuous Current, Sx or D 200 mA
Operating Temperature Range
Industrial −40°C to +85°C
Automotive −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
MSOP
θJA Thermal Impedance 206°C/W
θJC Thermal Impedance 44°C/W
SOT-23 (4-Layer Board)
θJA Thermal Impedance 119°C/W
WLCSP (4-Layer Board)
θJA Thermal Impedance 80°C/W
Lead Temperature, Soldering
(10 sec)
300°C
IR Reflow, Peak Temperature
(<20 sec)
235°C
1 Overvoltages at IN, Sx, or D are clamped by internal diodes. Current should
be limited to the maximum ratings given.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating can be applied at any
one time.
Table 4. Truth Table for the ADG819
IN Switch S1 Switch S2
0 On Off
1 Off On
ESD CAUTION
ADG819 Data Sheet
Rev. A | Page 6 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 2. 6-Lead SOT-23 Pin Configuration
Figure 3. 6-Ball WLCSP Pin Configuration
Table 5. 6-Lead SOT-23 and 6-Ball WLCSP Pin Function Descriptions
Pin No.
SOT-23 WLCSP Mnemonic Description
1 6 IN Logic Control Input.
2 5 VDD Most Positive Power Supply Potential.
3 4 GND Ground (0 V) Reference.
4 3 S1 Source Terminal. Can be an input or output.
5 2 D Drain Terminal. Can be an input or output.
6 1 S2 Source Terminal. Can be an input or output.
Figure 4. 8-Lead MSOP Pin Configuration
Table 6. 8-Lead MSOP Pin Function Descriptions
Pin No. Mnemonic Description
1 D Drain Terminal. Can be an input or output.
2 S1 Source Terminal. Can be an input or output.
3 GND Ground (0 V) Reference.
4 VDD Most Positive Power Supply Potential.
5 NC No Connect. Do not connect to this pin.
6 IN Logic Control Input.
7 NC No Connect. Do not connect to this pin.
8 S2 Source Terminal. Can be an input or output.
TOP VI EW
(No t t o Scal e)
6
25
4
1
3
ADG819
S2
IN
D
V
DD
S1
GND
02801-002
TOP VI EW
(BUMPS AT THE BOTT O M)
NOT TO SCALE
S2
1
IN
6
D
2
V
DD
5
S1
3
GND
4
ADG819
02801-003
D
TOP VI EW
(No t t o Scal e)
8
7
6
5
1
2
3
4
ADG819
S2
NC
S1
IN
GND
V
DD
NC
NC = NO CONNECT
02801-004
Data Sheet ADG819
Rev. A | Page 7 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 5. On Resistance vs. VD, VS
Figure 6. On Resistance vs. VD, VS
Figure 7. Leakage Currents vs. Temperature
Figure 8. On Resistance vs. VD, VS for Different Temperatures
Figure 9. On Resistance vs. VD, VS for Different Temperatures
Figure 10. tON/tOFF Times vs. Temperature
LE AKAGE CURRENTS ( nA)
10 VDD = 3V, 5V
I
D
, I
S
(O N)
I
S
(OFF)
8
6
4
2
0
–2
020 40
60
80 100 120
TEMPERATURE (°C)
02801-007
1.0
0.8
V
DD
= 3V
T
A
= +85°C T
A
= +125°C
T
A
= +25°C
T
A
= –40° C
ON RE S IST ANCE (
Ω)
0.6
0.4
0.2
0
03.00.5
V
D
, V
S
(V)
2.52.01.51.0
02801-008
50
t
ON
V
DD
= 3V
V
DD
= 5V
t
OFF
V
DD
= 3V, 5V
40
TIME (n s)
30
20
10
0
TEMPERATURE (°C)
020–20 40–40
60
80 100 120
02801-010
ADG819 Data Sheet
Rev. A | Page 8 of 16
Figure 11. Charge Injection vs. VS (Source Voltage)
Figure 12. Off Isolation vs. Frequency
Figure 13. Crosstalk vs. Frequency
Figure 14. On Response vs. Frequency
Figure 15. Logic Threshold Voltage vs. Supply Voltage
250
200
150
VDD = 3V VDD = 5V
CHARGE INJECT IO N ( pC)
100
50
0
–50
–100
–150
–2000
VS (V)
TA = 25° C
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
02801-011
0
–10
–20
OFF ISOLATION
(d B)
–30
–40
–50
–60
–70
–80
–90
0.1 1 2
FREQUENCY (MHz)
V
DD
= 5V, 3V
T
A
= 25° C
02801-012
0.1 1 2
FREQUENCY (MHz)
0
CROSSTALK
(dB)
–20
–50
–70
–80
–90
–10
–30
–40
–60
02801-013
1
0
0.2 10130
VDD = 3V, 5V
TA = 25 C
–1
ON RESPONSE (dB)
–2
–3
–4
–5
–6
FREQUENCY (MHz)
02801-014
LOGIC THRESHOLD VOLTAGE (V)
1.8
RISING
FALLING
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
V
DD
(V)
TA = 25° C
0 1 2 3 4 65
02801-015
Data Sheet ADG819
Rev. A | Page 9 of 16
TEST CIRCUITS
Figure 16. On Resistance Figure 17. Off Leakage
Figure 18. On Leakage
Figure 19. Switching Times
Figure 20. Break-Before-Make Time Delay, tBBM
Figure 21. Charge Injection
I
DS
S D
V1
R
ON
= V1 / I
DS
V
S
02801-016
SDI
D
(OFF)I
S
(OFF)
V
S
V
D
02801-017
NC VD
SDID (ON)
NC = NO CONNECT
02801-018
V
DD
R
L
50
Ω
C
L
35pF
IN
GND
V
DD
0.1
µ
F
V
IN
50%
90% 90%
V
OUT
V
S
50%
t
ON
t
OFF
02801-019
V
DD
R
L
50
Ω
C
L
35pF
IN
GND
V
DD
0.1
µ
F
S2
S1
V
IN
D
V
IN
50% 50%
0V
V
S1
V
OUT
90% 90%
V
OUT
0V
V
S2
t
BBM
t
BBM
02801-020
VSCL
1nF
IN
GND
VDD
VDD
VOUT
SW OFF
SW OFFSW OFF
SW OFF
SW ON
SW ON
QINJ = CLVOUT
VOUT
VIN
VIN
RSVOUT
02801-022
ADG819 Data Sheet
Rev. A | Page 10 of 16
Figure 22. Off Isolation
Figure 23. Bandwidth
Figure 24. Channel-to-Channel Crosstalk
IN
GND
V
DD
V
DD
0.1
µ
F
50
Ω
V
IN
S
D
NETWORK
ANALYZER
V
OUT
R
L
50
Ω
V
S
50
Ω
V
OUT
OFF ISOLATION = 20 LOG V
S
02801-023
IN
GND
V
DD
V
DD
0.1µF
V
IN
S
D
NETWORK
ANALYZER
V
OUT
R
L
50Ω
V
S
50Ω
V
OUT
WITH SWITCH
INSERTION LOSS = 20 LOG V
OUT
WITHOUT SWITCH
02801-024
GND
V
DD
0.1
µ
F
S2
S1
D
IN
NETWORK
ANALYZER
V
OUT
R
L
50
Ω
V
S
R
50
Ω
V
DD
50
Ω
V
OUT
CHANNEL - TO- CHANNE L CRO S S TALK = 20 LO G V
S
02801-025
Data Sheet ADG819
Rev. A | Page 11 of 16
TERMINOLOGY
RON
Ohmic resistance between D and Sx.
ΔRON
On resistance match between any two channels, that is, RON
maximum − RON minimum.
RFLAT(ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
IS (Off)
Source leakage current with the switch off.
ID, IS (On)
Channel leakage current with the switch on.
VD (VS)
Analog voltage on Terminal D and Terminal S.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL (IINH)
Input current of the digital input.
CS (Off)
Off switch source capacitance.
CD, CS (On)
On switch capacitance.
tON
Delay between applying the digital control input and the output
switching on.
tOFF
Delay between applying the digital control input and the output
switching off.
tBBM
Off time or on time measured between the 90% points of both
switches when switching from one address state to another.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Channel-to-Channel Crosstalk
A measure of unwanted signal coupled through from one
channel to another as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Bandwidth
Frequency at which the output is attenuated by −3 dB.
On Response
Frequency response of the on switch.
ADG819 Data Sheet
Rev. A | Page 12 of 16
OUTLINE DIMENSIONS
Figure 25. 6-Lead Small Outline Transistor Package [SOT-23]
(RJ-6)
Dimensions shown in millimeters
Figure 26. 8-Lead mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
COMPLIANT TO JEDEC STANDARDS MO-178-AB
10°
4°
0°
SEATING
PLANE
1.90
BSC
0.95 BSC
0.60
BSC
6 5
1 2 3
4
3.00
2.90
2.80
3.00
2.80
2.60
1.70
1.60
1.50
1.30
1.15
0.90
0.15 MAX
0.05 MIN
1.45 MAX
0.95 MIN
0.20 MAX
0.08 MIN
0.50 MAX
0.30 MIN
0.55
0.45
0.35
PIN 1
INDICATOR
12-16-2008-A
COMPLIANT TO JEDEC STANDARDS MO-187-AA
6°
0°
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Data Sheet ADG819
Rev. A | Page 13 of 16
Figure 27. 6-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-6-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Notes Temperature Range Package Description
Package
Option Branding2
ADG819BCBZ-REEL 3 –40°C to +85°C 6-Ball Wafer Level Chip Package [WLCSP] CB-6-1 SBC
ADG819BCBZ-REEL7 3 –40°C to +85°C 6-Ball Wafer Level Chip Package [WLCSP] CB-6-1 SBC
ADG819BRM –40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 SNB
ADG819BRM-REEL –40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 SNB
ADG819BRMZ –40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 SBC
ADG819BRMZ-REEL7 3 –40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 SBC
ADG819BRT-500RL7 3 –40°C to +125°C 6-Lead Small Outline Transistor Package [SOT-23] RJ-6 SNB
ADG819BRT-REEL7 3 –40°C to +125°C 6-Lead Small Outline Transistor Package [SOT-23] RJ-6 SNB
ADG819BRTZ-500RL7 3 –40°C to +125°C 6-Lead Small Outline Transistor Package [SOT-23] RJ-6 SBC
ADG819BRTZ-REEL 3 –40°C to +125°C 6-Lead Small Outline Transistor Package [SOT-23] RJ-6 SBC
ADG819BRTZ-REEL7 3 –40°C to +125°C 6-Lead Small Outline Transistor Package [SOT-23] RJ-6 SBC
1 Z = RoHS Compliant Part.
2 Branding on these packages is limited to three characters due to space constraints.
3 Contact factory for availability.
0.50
0.32 NOM
0.32
0.59
2.38
2.18
1.98
1.34
1.14
0.94
0.67
0.57
0.47
0.50
BALL PITCH
0.24 M AX
COPLANARITY
0.44
0.36
0.28
BALLA1
IDENTIFIER
TOP VIEW
(BALL SI DE DOW N)
BOTTOM VIEW
(BALL SI DE UP)
SEATING
PLANE
A
12
B
C
02-03-2012-A
ADG819 Data Sheet
Rev. A | Page 14 of 16
NOTES
Data Sheet ADG819
Rev. A | Page 15 of 16
NOTES
ADG819 Data Sheet
Rev. A | Page 16 of 16
NOTES
©2002–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02801-0-5/12(A)