IRF441 - Intersil Corporation

File Number

2308.3

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

IRF440

8A, 500V, 0.850 Ohm, N-Channel

Power MOSFET

This N-Channel enhancement mode silicon gate power ﬁeld

effect transistor is an advanced power MOSFET designed,

tested, and guaranteed to withstand a speciﬁed level of

energy in the breakdown avalanche mode of operation. All of

these power MOSFETs are designed for applications such

as switching regulators, switching convertors, motor drivers,

relay drivers, and drivers for high power bipolar switching

transistors requiring high speed and low gate drive power.

These types can be operated directly from integrated

circuits.

Formerly developmental type TA17425.

Features

• 8A, 500V

•r

DS(ON) = 0.850Ω

• Single Pulse Avalanche Energy Rated

• SOA is Power-Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Majority Carrier Device

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Packaging

JEDEC TO-204AE

Ordering Information

PART NUMBER PACKAGE BRAND

IRF440 TO-204AE IRF440

NO TE: When ordering, use the entire part number .

DRAIN

(FLANGE)

SOURCE (PIN 2)

GATE (PIN 1)

Data Sheet March 1999

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Speciﬁed

IRF440 UNITS

Drain To Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 500 V

Drain To Gate Voltage (RGS = 20kΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 500 V

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID

TC= 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID8.0

5.0 A

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM 32 A

Gate To Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD125 W

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 510 A

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG -55 to 150 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300

260

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTE:

1. TJ= 25oC to 125oC.

Electrical Speciﬁcations TC = 25oC, Unless Otherwise Speciﬁed

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain To Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 10) 500 - - V

Gate Threshold Voltage VGS(TH) VDS = VGS, ID = 250µA 2.0 - 4.0 V

Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA

VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA

On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V 8.0 - - A

Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA

Drain to Source On Resistance (Note 2) rDS(ON) ID = 4.4A, VGS = 10V (Figures 8, 9) - 0.70 0.850 Ω

Forward Transconductance (Note 2) gfs VDS = 50V, ID = 4.4A (Figure 12) 4.9 7.5 - S

Turn-On Delay Time td(ON) VDD = 250V, ID≈ 8.0A, RG = 9.1Ω, RL = 30Ω,

(Figure 17, 18) MOSFET Switching Times are

Essentially Independent of Operating Temperature

-1521ns

Rise Time tr-2235ns

Turn-Off Delay Time td(OFF) -4974ns

Fall Time tf-2030ns

Total Gate Charge

(Gate to Source + Gate to Drain) Qg(TOT) VGS = 10V, ID = 8.0A, VDS = 0.8 x Rated BVDSS,

Ig(REF) = 1.5mA (Figures 14, 19, 20) Gate Charge is

Essentially Independent of Operating Temperature

-4263nC

Gate to Source Charge Qgs - 9 - nC

Gate to Drain “Miller” Charge Qgd -22-nC

Input Capacitance CISS VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - 1225 - pF

Output Capacitance COSS - 200 - pF

Reverse Transfer Capacitance CRSS -85-pF

Internal Drain Inductance LDMeasured between the

Contact Screw on Header

thatis Closerto Sourceand

Gate Pins and Center of

Die

Modified MOSFET

Symbol Showing the

Internal Device

Inductances

- 5.0 - nH

Internal Source Inductance LSMeasured from the Source

Lead, 6mm (0.25in) from

Header and Source

Bonding Pad

- 12.5 - nH

Thermal Resistance Junction to Case RθJC - - 1.0 oC/W

Thermal Resistance Junction to Ambient RθJA Free Air Operation - - 30 oC/W

IRF440

Source To Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current ISD Modified MOSFET Symbol

Showing the Integral

Reverse P-N Junction

Rectifier

- - 8.0 A

Pulse Source to Drain Current

(Note 3) ISDM - - 32 A

Drain to Source Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 8.0A, VGS = 0V (Figure 13) - - 2.0 V

Reverse Recovery Time trr TJ = 25oC, ISD = 8.0A, dISD/dt = 100A/µs 210 460 970 ns

Reverse Recovery Charge QRR TJ = 25oC, ISD = 8.0A, dISD/dt = 100A/µs 2 4 8.9 µC

NOTE:

2. Pulse Test: Pulse Width ≤ 300µs, Duty Cycle ≤ 2%.

3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance Curve (Figure 3).

4. VDD = 50V, starting TJ = 25oC, L = 14mH, RG = 25Ω, peak IAS = 8.0A (Figures 15, 16).

Typical Performance Curves

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

0 50 100 150

TC, CASE TEMPERATURE (oC)

POWER DISSIPATION MULTIPLIER

0.2

0.4

0.6

0.8

1.0

1.2

25 50 75 100 125 150

TC, CASE TEMPERATURE (oC)

ID, DRAIN CURRENT (A)

10-5 10-4 10-3 10-2 0.1 1 10

10-3

0.1

10-2

ZθJC, TRANSIENT THERMAL IMPEDANCE

RECTANGULAR PULSE DURATION (s)

SINGLE PULSE PDM

t1t2

NOTES:

DUTY FACTOR: D = t1/t2

PEAK TJ = PDM x ZθJC x RθJC + TC

0.5

0.2

0.1

0.05

0.02

0.01

IRF440

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves

(Continued)

110102103

VDS, DRAIN TO SOURCE VOLTAGE (V)

102

0.1

ID, DRAIN CURRENT (A)

TC = 25oC

TJ = 150oC

SINGLE PULSE

OPERATION IN

THIS AREA LIMITED

BY rDS(ON)

100µs

10µs

1ms

10ms

0 50 100 150 200 250

VDS, DRAIN TO SOURCE VOLTAGE (V)

ID, DRAIN CURRENT (A)

80µs PULSE TEST

VGS = 10V

VGS = 4V VGS = 4.5V

VGS = 5V

VGS = 6V

VGS = 5.5V

0 3 6 9 12 15

VDS, DRAIN TO SOURCE VOLTAGE (V)

ID, DRAIN CURRENT (A)

80µs PULSE TEST

VGS = 5.5V

VGS = 5V

VGS = 4.5V

VGS = 6V

VGS = 10V

VGS = 4V

0246810

VGS, GATE TO SOURCE VOLTAGE (V)

0.1

10-2

IDS(ON), DRAIN TO SOURCE

TJ = 150oCTJ = 25oC

VDS ≥ 50V

80µs PULSE TEST

CURRENT (A)

0 8 16 24 32 40

ID, DRAIN CURRENT (A)

rDS(ON), DRAIN TO SOURCE

80µs PULSE TEST

VGS = 20V

VGS = 10V

ON RESISTANCE

3.0

2.4

1.8

1.2

0.6

NORMALIZED DRAIN TO SOURCE

ON RESISTANCE

-60 0 60 120 180

TJ, JUNCTION TEMPERATURE (oC)

ID = 8.0A

VGS = 10V

IRF440

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves

(Continued)

1.25

1.15

1.05

0.95

0.85

0.75

-60 0 60 120 180

TJ, JUNCTION TEMPERATURE (oC)

NORMALIZED DRAIN TO SOURCE

BREAKDOWN VOLTAGE

ID = 250µA3000

2400

1800

1200

600

0110

100

VDS, DRAIN TO SOURCE VOLTAGE (V)

C, CAPACITANCE (pF)

VGS = 0V, f = 1MHz

CISS = CGS + CGD

CRSS = CGD

COSS ≈ CDS + CGS

CISS

CRSS

COSS

TJ = 150oC

TJ = 25oC

0 3 6 9 12 15

ID, DRAIN CURRENT (A)

gfs, TRANSCONDUCTANCE (S)

VDS ≥50V

80µs PULSE TEST

0 0.3 0.6 0.9 1.2 1.5

VSD, SOURCE TO DRAIN VOLTAGE (V)

100

0.1

ISD, SOURCE TO DRAIN CURRENT (A)

TJ = 150oCTJ = 25oC

00 1224364860

Qg(TOT), TOTAL GATE CHARGE (nC)

VGS, GATE TO SOURCE VOLTAGE (V)

ID = 8.0A VDS = 400V

VDS = 250V

VDS = 100V

IRF440

Test Circuits and Waveforms

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

VGS

0.01Ω

IAS

VDS

VDD

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

VDD

VDS

BVDSS

IAS

tAV

VGS

DUT

-VDD

tON

td(ON)

90%

10%

VDS 90%

10%

td(OFF)

tOFF

90%

50%

10% PULSE WIDTH

VGS

0.3µF

12V

BATTERY 50kΩ

VDS

DUT

Ig(REF)

(ISOLATED

VDS

0.2µF

CURRENT

REGULATOR

ID CURRENT

SAMPLING

IG CURRENT

SAMPLING

SUPPLY)

RESISTOR RESISTOR

SAME TYPE

AS DUT

Qg(TOT)

Qgd

Qgs

VDS

VGS

VDD

Ig(REF)

IRF440

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiﬁcation.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see w eb site http://www.intersil.com

Sales Ofﬁce Headquarters

NORTH AMERICA

Intersil Corporation

P. O. Box 883, Mail Stop 53-204

Melbourne, FL 32902

TEL: (407) 724-7000

FAX: (407) 724-7240

EUROPE

Intersil SA

Mercure Center

100, Rue de la Fusee

1130 Brussels, Belgium

TEL: (32) 2.724.2111

FAX: (32) 2.724.22.05

ASIA

Intersil (Taiwan) Ltd.

7F-6, No. 101 Fu Hsing North Road

Taipei, Taiwan

Republic of China

TEL: (886) 2 2716 9310

FAX: (886) 2 2715 3029

IRF440