WIZ830MJ Datasheet (Ver. 1.3) (c) 2013 WIZnet Co., Ltd. All Rights Reserved. For more information, visit our website at www.wiznet.co.kr WIZ830MJ Datasheet Document History Information Revision Ver.1.0 Ver.1.1 Ver.1.2 Data June 04, 2008 July 29, 2008 March 4, 2010 Ver.1.3 January 28, 2013 Description Release with WIZ830MJ Launching Modified dimensions(Symbol B and C). Pin number of A[9:0] modified in Chapter 2.3 Hardware revision(Rev1.1) Changed just partlist at this revision 2 TOP WIZ8 10M J Data shee t (c) Copyright 2008 WIZnet Co., Ltd. All rights reserved WIZ830MJ Datasheet WIZnet's Online Technical Support If you have something to ask about WIZnet Products, Write down your question on Q&A Board in WIZnet website (www.wiznet.co.kr). WIZnet Engineer will give an answer as soon as possible. 3 TOP WIZ8 10M J Data shee t (c) Copyright 2008 WIZnet Co., Ltd. All rights reserved WIZ830MJ Datasheet Table of Contents 1. Introduction .............................................................................. 5 4 2. 3. 1.1. Features ................................................................................................... 5 1.2. Block Diagram .......................................................................................... 5 Pin Assignments & descriptions ................................................... 6 2.1. Pin Assignments ....................................................................................... 6 2.2. Power & Ground ....................................................................................... 7 2.3. MCU Interfaces ........................................................................................ 7 2.4. Network Indicator LED Signals ................................................................. 8 2.5. Miscellaneous Signals .............................................................................. 8 Timing Diagrams ....................................................................... 9 3.1. Reset Timing ............................................................................................ 9 3.2. Register / Memory READ Timing.............................................................. 9 3.3. Register / Memory WRITE Timing .......................................................... 10 4. Dimensions ............................................................................. 11 5. Schematic .............................................................................. 12 6. Partlists .................................................................................. 13 (c) Copyright 2008 WIZnet Co., Ltd. All rights reserved TOP WIZ8 10M J Data shee t WIZ830MJ Datasheet 1. Introduction WIZ830MJ is the network module that includes W5300 (TCP/IP hardwired chip, include PHY), MAG-JACK (RJ45 with X'FMR) with other glue logics. It can be used as a component and no effort is required to interface W5300 and Transformer. The WIZ830MJ is an ideal option for users who want to develop their Internet enabling systems rapidly. For the detailed information on implementation of Hardware TCP/IP, refer to the W5300 Datasheet. WIZ830MJ consists of W5300 and MAG-JACK. TCP/IP, MAC protocol layer: W5300 Physical layer: Included in W5300 Connector: MAG-JACK(RJ45 with Transformer) 1.1. Features Supports 10/100 Base TX High network performance : Up to 50Mbps Supports half/full duplex operation Supports auto-negotiation and auto cross-over detection IEEE 802.3/802.3u Compliance Operates 3.3V with 5V I/O signal tolerance Supports network status indicator LEDs Includes Hardware Internet protocols: TCP, IP Ver.4, UDP, ICMP, ARP, PPPoE, IGMP Includes Hardware Ethernet protocols: DLC, MAC Supports 8 independent connections simultaneously Supports MCU bus Interface Supports Direct/Indirect mode bus access Supports 16/8 bit data bus width Supports memory-to-memory DMA (only 16bit Data bus width & slave mode) Supports Socket API for easy application programming Supports hybrid TCP/IP stack(software and hardware TCP/IP stack) Supports PPPoE connection (with PAP/CHAP Authentication mode) More flexible allocation internal TX/RX memory according to application throughput Interfaces with two 2.54mm pitch 2 x 14 header pin 1.2. Block Diagram (c) Copyright 2008 WIZnet Co., Ltd. All rights reserved 5 TOP WIZ8 10M J Data shee t WIZ830MJ Datasheet 2. Pin Assignments & descriptions 2.1. Pin Assignments 6 TOP WIZ8 10M J Data shee t (c) Copyright 2008 WIZnet Co., Ltd. All rights reserved WIZ830MJ Datasheet I : Input I/O : Bi-directional Input and output 2.2. Power & Ground Symbol Type VCC P GND O : Output P : Power P Pin No. J1:1, J1:18, J2:16, J2:1 J2:10, J2:23, Description Power : 3.3 V power supply J2:15, J2:24 Ground 7 TOP 2.3. MCU Interfaces Symbol Type Pin No. A[9:0] I D[15:8] I/O J1:2 ~ J1:9 D[7:0] I/O J1:10 ~ J1:17 /CS I J2:19 Module Select : Active low. /CS of W5300 /RD I J2:20 Read Enable : Active low. /RD of W5300 /WR I J2:21 Write Enable : Active low /WR of W5300 J1:19 ~ J1:28 Description Address Used as Address[9-0] pin Data 16 bit-wide high data bus In case of using 8 bit data bus, there are driven as High-Z Data 16 bit-wide low data bus /INT O J2:18 Interrupt : Active low After reception or transmission it indicates that the W5300 requires MCU attention. By writing values to the Interrupt Register(IR) of W5300 the interrupt will be cleared by host. All interrupts can be masked by writing values to the IMR of W5300 (Interrupt Mask Register). For more details refer to the W5300 Datasheet BIT16EN I J2:2 16/8 bit data bus select. High : 16 bit data bus Low : 8 bit data bus. (c) Copyright 2008 WIZnet Co., Ltd. All rights reserved WIZ8 10M J Data shee t WIZ830MJ Datasheet 2.4. Network Indicator LED Signals Symbol Type /LINKLED O /TXLED /RXLED /COLLED /FDXLED /SPDLED /ACTLED O O O O O O Pin No. Description J2:3 Link LED It indicates the link status of media(10/100M). J2:4 Transmit activity LED : Transmit Enable It notifies the output of transmit data through TXOP/TXON (Transmit Activity). J2:5 Receive activity LED : Transmit Data It notifies the input of receive data from RXIP/RXIN (Receive Activity) J2:6 Collision LED : Transmit Data It notifies when collisions occur. It is valid at half-duplex, and is ignored at full-duplex. J2:7 Full duplex LED : Transmit Data It outputs low at the full-duplex and outputs high at the halfduplex according to auto-negotiation or manual configuration of OP_MODE[2:0]. J2:8 Link speed LED : Transmit Data It is asserted low at the 100Mbps and high at the 10Mbps according to auto-negotiation or manual configuration of OP_MODE[2:0]. J2:9 Activity LED It notifies the output of transmit data through TXOP/TXON or the input of receive data from RXIP/RXIN. 2.5. Miscellaneous Signals Symbol /RESET Type I Pin No. Description J2:17 Reset : This pin is active low input to initialize or re-initialize W5300. RESET should be held at least 2us after low assert, and wait for at least 10ms after high de-assert in order for PLL logic to be stable Buffer Ready Indicator BRDYn monitors TX/RX memory status of each socket. For more details refer to the W5300 Datasheet BRDY[3:0] O J2:11 ~ J2:14 NC - J2 : 22, J2:25, J2:27, J2:28 J2:26, (c) Copyright 2008 WIZnet Co., Ltd. All rights reserved Not Connect 8 TOP WIZ8 10M J Data shee t WIZ830MJ Datasheet 3. Timing Diagrams WIZ830MJ provides following interfaces of W5300. -. Direct/Indirect mode bus access 3.1. Reset Timing 9 TOP Description Reset Cycle Time PLL Lock-in Time 1 2 3.2. Min 2 us 50us Max 10 s Register / Memory READ Timing Description tADDRs tADDRh tCS tCSn tRD tDATAs tDATAh tDATAhe Address Setup Time after /CS and /RD low Address Hold Time after /CS and /RD high /CS Low Time /CS Next Assert Time /RD Low Time DATA Setup Time after /RD low DATA Hold Time after /RD and /CS high DATA Hold Extension Time after /CS high (c) Copyright 2008 WIZnet Co., Ltd. All rights reserved Min Max 65ns 28ns 65ns 42ns - 7ns 7ns 2XPLL_CLK WIZ8 10M J Data shee t WIZ830MJ Datasheet 3.3. Register / Memory WRITE Timing 10 TOP WIZ8 10M J Data shee t Description tADDRs tADDRh tCS tCSn tWR tDATAs tDATAf tDATAh Address Setup Time after /CS and /WR low Address Hold Time after /CS or /RD high /CS low Time /CS next Assert Time /WR low Time Data Setup Time after /WR low Data Fetch Time Data Hold Time after /WR high (c) Copyright 2008 WIZnet Co., Ltd. All rights reserved Min Max 50ns 28ns 50ns 7ns 14ns 7ns 7ns - 7ns + 7XPLL_CLK tWR - tDATAs - WIZ830MJ Datasheet 4. Dimensions 11 TOP WIZ8 10M J Data shee t Symbols Dimensions (mm) Symbols Dimensions (mm) A 34.00 H 6.50 B 30.48 I 2.54 C 25.40 J 2.54 D 3.00 K 15.90 E 4.00 L 13.50 F 50.00 M 6.00 G 3.30 - - (c) Copyright 2008 WIZnet Co., Ltd. All rights reserved WIZ830MJ Datasheet 5. Schematic 66 18 /RESET BIT16EN 28 29 30 31 32 33 34 35 38 39 40 41 42 43 44 45 48 49 50 51 52 53 54 55 56 57 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 /INT 67 68 69 70 65 60 61 62 BRDY 0 BRDY 1 BRDY 2 BRDY 3 96 95 /WR /RD /CS XTLP XTLN 91 19 20 21 22 U1 3V3A 1V8A /RESET BIT16EN DATA15 DATA14 DATA13 DATA12 DATA11 DATA10 DATA9 DATA8 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 ADDR9 ADDR8 ADDR7 ADDR6 ADDR5 ADDR4 ADDR3 ADDR2 ADDR1 ADDR0 /WR /RD /CS /INT BRDY 0 BRDY 1 BRDY 2 BRDY 3 XTLP XTLN OSC25I TEST_MODE3 TEST_MODE2 TEST_MODE1 TEST_MODE0 3.3V RSET_BG TXOP TXON RXIP RXIN /FDX LINKLED MII_RXC MII_RXDV MII_RXD0 MII_RXD1 MII_RXD2 MII_RXD3 MII_COL MII_CRS NC NC NC NC OP_MODE0 OP_MODE1 OP_MODE2 LQFP100(14X14) SPDLED/MII_TXD0 FDXLED/MII_TXD1 COLLED/MII_TXD2 RXLED/MII_TXD3 TXLED/MII_TXEN MII_TXC W5300 1V8O 1V8D TOP W5300 3.3V C1 0.1uF 1 TXOP TXON RSET_BG 1V8_OUT 8 9 RXIP RXIN 13 5 6 /LINKLED 80 90 /SPDLED /FDXLED /COLLED /RXLED /TXLED OP_MODE0 OP_MODE1 OP_MODE2 85 86 87 88 89 82 71 74 75 76 77 78 79 81 23 24 25 3 98 99 100 C2 C3 C4 C5 R2 0.1uF 0.1uF 0.1uF 0.1uF R1 300(1%) 15p 15p 25MHz 12K(1%) C19 C21 OP_MODE2 OP_MODE1 0 0 0 3.3V C6 R3 1M 10uF/16V Y1 R10 R11 R13 J1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 XTLP XTLN 3.3V C7 0.1uF A8 A6 A4 A2 A0 D15 D13 D11 D9 D7 D5 D3 D1 FB1 1uH /RXLED /TXLED 3V3A 3 3.3V 1uH 1V8_OUT FB3 D1 3.3V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 1SS181(SC-59) 2 1 C8 10uF/16V GNDA /RESET /CS /WR /LINKLED /RXLED /FDXLED /ACTLED BRDY 3 BRDY 1 J1, J2 : 2.54mm pitch header Not mounted (auto-negotiaton) OP_MODE0 3.3V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 + 1V8D C9 3.3uF GNDA R12 4.7K /ACTLED J2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 FB2 + C10 10uF/16V 1uH C11 1V8A + RXIP RXIN TXOP TXON GNDA 10uF/16V BIT16EN /TXLED /COLLED /SPDLED BRDY 2 BRDY 0 /INT /RD Title Size B C20 C12 0.1uF R7 49.9 R9 49.9 1 2 3 4 5 6 7 8 9 C15 C16 C17 13 14 10 9 12 11 1 2 3 4 5 6 7 8 C18 BS-RB10005 Shield Shield GRN+ GRNY EL+ Y EL- TD+ TDTCT NC NC RCT RD+ RD- U2 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF C14 1V8D C13 0.1uF 3V3A /LINKLED 3V3A /ACTLED R5 200 C22 R4 200 0.1uF FB4 FB_0805 1 2 3 4 5 6 7 8 9 GH4 CON9 Sheet GH6 CON1 1 GH5 CON1 1 of Rev REV.1.1 Recommendatory part is 120R@100MHz GH3 CON9 Monday , January 28, 2013 Document Number WIZ830MJ 0.1uF C23 R8 49.9 R6 49.9 0.1uF Date: (c) Copyright 2008 WIZnet Co., Ltd. All rights reserved WIZ8 10M J Data shee t D14 D12 D10 D8 D6 D4 D2 D0 A9 A7 A5 A3 A1 HEADER 14X2 1 7 17 GNDA HEADER 14X2 1 12 11 36 58 72 92 94 VCC1V8 VCC1V8 VCC1V8 VCC1V8 VCC1V8 VCC1V8 14 26 46 63 83 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 GND GND GND GND GND GND GND GND GND GND GND 12 15 27 37 47 59 64 73 84 93 97 VCC1A8 VCC1A8 2 VCC3A3 GNDA GNDA GNDA 4 10 16 WIZ830MJ Datasheet 6. Partlist Item Q.ty 1 16 2 4 3 Reference C1,C2,C3,C4,C5,C7, C12,C13,C14,C15,C16, C17,C18,C20,C22,C23 Part Tech. Characteristics 0.1uF 50V-20% Ceramic C6,C8,C10,C11 10uF/16V 16Vmin 10% 1 C9 3.3uF/16V 16Vmin 10% 4 5 6 7 2 1 3 1 C19,C21 D1 FB1,FB2,FB3 FB4 50V-20% Ceramic 8 2 J1,J2 9 10 11 12 13 14 15 16 17 1 1 1 2 4 0 1 1 1 R1 R2 R3 R4,R5 R6,R7,R8,R9 R10,R11,R13 R12 U1 U2 15pF 1SS181 1uH Chip Ferrite Inductor 120 Ohm Ferrite BEAD 2X14 2.54mm DIP STRAIGHT Header 12K (1%) 300 (1%) 1M 200 49.9 (1%) not mounted 4.7K W5300 BS-RB10005 18 1 Y1 25MHz(SMD) 19 1 PCB REV1.1 (c) Copyright 2008 WIZnet Co., Ltd. All rights reserved Package CASE 0603 120 Ohm /100MHz EIA/IECQ 3216 EIA/IECQ 3216 CASE 0603 SC-59 CASE 0805 CASE 0805 2 X 14 2.54mm pitch DIP 1/10W-1% SMD 1/10W-1% SMD 1/10W-5% SMD 1/10W-5% SMD 1/10W-1% SMD 1/10W-5% SMD 1/10W-5% SMD WIZnet Hardware TCP/IP Transformer + RJ-45 SMD Type, CL=18pF, Industrial FR4, 1.6T, 4Layer CASE 0603 CASE 0603 CASE 0603 CASE 0603 CASE 0603 CASE 0603 CASE 0603 LQFP100 SX-1 13 TOP WIZ8 10M J Data shee t