
PE42562
SP6T RF Switch
Page 2 DOC-75951-3 – (03/2017)
www.psemi.com
Optional External VSS
For proper operation, the V SS_EXT pin must be grounded or tied to the VSS voltag e specified in Table 2. When the
VSS_EXT pin is grounded, FETs in the switch are biased with an internal negative voltage generator. For applica-
tions that require the lowest possible spur performance, VSS_EXT can be applied externally to bypass the internal
negative voltage generator.
Absolute Maximum Ratings
Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be
restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for
extended periods may reduce reliability.
ESD Precautions
When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices.
Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to
avoid exceeding the rating specified in Table 1.
Latch-up Immunity
Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up.
Table 1 • Absolute Maximum Ratings for PE42562
Parameter/Condition Min Max Unit
Supply voltage, VDD –0.3 5.5 V
Digital input voltage (V1, V2, V3, LS) –0.3 3.6 V
RF input power (RFC–RFX, 50Ω)See Figure 2 dBm
RF input power into terminated ports, CW(1) (RFX, 50Ω)See Figure 2 dBm
Maximum junction temperature +150 °C
Storage temperature range –65 +150 °C
ESD voltage HBM, all pins(2) 1000 V
ESD voltage CDM, all pins(3) 1000 V
Notes:
1) 100% duty cycle, all bands, 50Ω.
2) Human body mo de l (MIL -S TD 8 83 Me th od 30 15).
3) Charged device mo de l (JEDEC JESD22-C101).