1
Single Event and Total Dose Hardened, High-Speed,
Dual Output PWMs
IS-1825ASRH, IS-1825ASEH,
ISL71823ASRH
The single event and total dose hardened IS-1825ASRH,
IS-1825ASEH and ISL71823ASRH pulse width modulators are
designed to be used in high frequency, switching power
supplies in either voltage or current-mode configurations. Both
designs include a precision voltage reference, a low power
start-up circuit, a high frequency oscillator, a wide-band error
amplifier and a fast current-limit comparator.
The IS-1825ASRH, IS-1825ASEH features dual, alternating
outputs operating from zero to less than 50% duty-cycle, while
the ISL71823ASRH features dual, in-phase outputs operating
from zero to less than 100% duty cycle.
Constructed with the Intersil Rad-hard Silicon Gate (RSG)
dielectrically isolated BiCMOS process, these devices are
immune to single event latch-up and have been specifically
designed to provide a high level of immunity to single event
transients. All specified parameters are guaranteed and tested
for 300krad(Si) total dose performance.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-02511. A “hot-link” is provided on our
website for downloading the SMD.
Features
• Electrically Screened to DLA SMD # 5962-02511
• QML Qualified per MIL-PRF-38535 Requirements
• Radiation Environment
- Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . 300krad(SI) (max)
- Latch-up Immune. . . . . . . . . . . . . . . . Dielectrically Isolated
- SEU immune. . . . . . . . . . . . . . LET = 35MeV/mg/cm2(max)
• Oscillator Frequency . . . . . . . . . . . . . . . . . . . . . . . . 1MHz(max)
• High Output Drive Current . . . . . . . . . . . . . . . . . . .1A peak(typ)
• Low Start-up Current . . . . . . . . . . . . . . . . . . . . . . . 300µA(max)
•Undervoltage Lockout
- Start Threshold. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.8V(max)
- Stop Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.6V(min)
- Hysteresis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mV(min)
• Improved Soft-Start Function Compared with Commercial
1825A/1823A Types
• Pulse-by-Pulse Current Limiting
• Latched Overcurrent Comparator with Full Cycle Restart
• Programmable Leading Edge Blanking
Applications
• Voltage or Current-Mode Switching Power Supplies
• Control of High Current MOSFET Drivers
• Motor Speed and Direction Control
Pin Configurations
IS1-1825ASRH, IS1-1825ASEH, ISL71823ASRHQD
(CDIP2-T16 SBDIP)
TOP VIEW
IS9-1825ASRH, IS9-1825ASEH, ISL71823ASRHQF
(CDFP4-F20 FLATPACK)
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
INV
NON-INV
E/A OUT
CLK/LEB
RT
CT
SS
RAMP
VREF
OUT B
VC
PGND
OUT A
GND
ILIM/SD
VCC 2
3
4
5
6
7
8
120
19
18
17
16
15
14
13
NC
INV
NON-INV
E/A OUT
CLK/LEB
RT
CT
RAMP
9
10
12
11
SS
NC
VREF
VCC
OUT B
PGND
VC
VC
PGND
OUT A
GND
ILIM/SD
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2002, 2005, 2008, 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
April 5, 2012
FN9065.4
IS-1825ASRH, IS-1825ASEH, ISL71823ASRH
2FN9065.4
April 5, 2012
Ordering Information
ORDERING NUMBER
INTERNAL
MKT. NUMBER
(Note 1) TEMP. RANGE (°C)
PACKAGE
(RoHS Compliant) PKG DWG. #
IS0-1825ASRH/SAMPLE IS0-1825ASRH/SAMPLE -50 to +125
5962F0251101V9A IS0-1825ASRH-Q -50 to +125
5962F0251102V9A IS0-1825ASEH-Q -50 to +125
5962F0251101QEC IS1-1825ASRH-8 -50 to +125 16 Ld SBDIP D16.3
5962F0251101QXC IS9-1825ASRH-8 -50 to +125 20 Ld Flatpack K20.A
5962F0251101VEC IS1-1825ASRH-Q -50 to +125 16 Ld SBDIP D16.3
5962F0251102VEC IS1-1825ASEH-Q -50 to +125 16 Ld SBDIP D16.3
5962F0251101VXC IS9-1825ASRH-Q -50 to +125 20 Ld Flatpack K20.A
5962F0251102VXC IS9-1825ASEH-Q -50 to +125 20 Ld Flatpack K20.A
IS1-1825ASRH/Proto IS1-1825ASRH/Proto -50 to +125 16 Ld SBDIP D16.3
IS9-1825ASRH/Proto IS9-1825ASRH/Proto -50 to +125 20 Ld Flatpack K20.A
5962F0251102QEC ISL71823ASRHQD -50 to +125 16 Ld SBDIP D16.3
5962F0251102QXC ISL71823ASRHQF -50 to +125 20 Ld Flatpack K20.A
5962F0251102VEC ISL71823ASRHVD -50 to +125 16 Ld SBDIP D16.3
5962F0251102VXC ISL71823ASRHVF -50 to +125 20 Ld Flatpack K20.A
ISL71823ASRHD/Proto ISL71823ASRHD/Proto -50 to +125 16 Ld SBDIP D16.3
ISL71823ASRHF/Proto ISL71823ASRHF/Proto -50 to +125 20 Ld Flatpack K20.A
NOTE:
1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations.
Typical Performance Curves
FIGURE 1. OSCILLATOR FREQUENCY vs Rt and CtFIGURE 2. MAXIMUM DUTY CYCLE vs Rt
1 10 100
Rt TIMING RESISTANCE (kΩ)
FREQUENCY (Hz)
C220pF
C470pF
C1000pF
C2200pF C4700pF
C22nF
C10nF
10
100
1k
10k
110100
50
60
70
80
90
100
DMAX (%)
Rt TIMING RESISTANCE (kΩ)
DMAX
IS-1825ASRH, IS-1825ASEH, ISL71823ASRH
3
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN9065.4
April 5, 2012
For additional products, see www.intersil.com/product_tree
Die Characteristics
DIE DIMENSIONS:
4310µm x 5840µm (170 mils x 230 mils)
Thickness: 483µm ± 25.4µm (19 mils ± 1 mil)
INTERFACE MATERIALS
Glassivation
Type: Phosphorus Silicon Glass (PSG)
Thickness: 8.0kA ± 1.0kA
Top Metallization
Type: AlSiCu
Thickness: 16.0kA ± 2kA
Substrate:
Radiation Hardened Silicon Gate,
Dielectric Isolation
Backside Finish:
Silicon
ASSEMBLY RELATED INFORMATION
Substrate Potential:
Unbiased (DI)
ADDITIONAL INFORMATION
Worst Case Current Density:
<2.0 x 105 A/cm2
Transistor Count:
585
Metallization Mask Layout
IS-1825ASRH, IS-1825ASEH, ISL71823ASRH
VC VC
VREF
INV
NON-INV
E/A OUT
CLK/LEB
CT
RAMP
SS
ILIM/SD
OGND
GND
OUT A
PGND PGND
OUT B
VCC
Notes:
1. Both the OGND (oscillator ground) and the GND (control circuit ground) p ads must be bonded to ground.
These pads are both bonded to the GND pin on the packaged devices.
2. All double-sized bond pads must be double bonded for cur rent sharing purposes.
RT
RT
