Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A http://www.semicon.panasonic.co.jp/en/ 43 Matrix LED Driver LSI with Step-up Charge Pump Control Circuit FEATURES DESCRIPTION 4 x 3 LED Matrix Driver (Total LED that can be driven = 12) AN32155A is a 4 x 3 LED driver equipped with a step-up charge pump circuit. LED maximum current selectable Step-up charge pump DC/DC converter : 200 mA APPLICATIONS Mobile Phone I2C interface (Slave address selectable) 24 pin Wafer Level Chip Size Package (WLCSP) Smart Phone PCs Game Consoles Home Appliances etc. TYPICAL APPLICATION Battery VB 4.7 F CP1 1.0 F CN1 CP2 1.0 F CN2 CPOUT VDD 2.2 F INT SCL CPU I/F Y1~Y4 SDA 4 NRST SLASEL VLDO IREF GND CPGND CLKIO 39 k X1~X3 3 1.0 F Note) The application circuit is an example. The operation of the mass production set is not guaranteed. Sufficient evaluation and verification is required in the design of the mass production set. The Customer is fully responsible for the incorporation of the above illustrated application circuit in the design of the equipment. Page 1 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A ABSOLUTE MAXIMUM RATINGS Parameter Symbol Rating Unit Note VB MAX 6.5 V *1 CPOUT MAX 6.5 V *1 VDD MAX 6.5 V *1 Topr - 30 to + 85 C *2 Tj - 30 to + 125 C *2 Storage temperature Tstg - 55 to + 125 C *2 Input Voltage Range SLASEL, SCL, SDA, CLKIO, NRST - 0.3 to 6.5 V -- Output Voltage Range CLKIO, VLDO, INT, Y1, Y2, Y3, Y4, X1, X2, X3 - 0.3 to 6.5 V -- HBM 2.0 kV -- Supply voltage Operating ambience temperature Operating junction temperature ESD Note) This product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum rating. This rating is the maximum rating and device operating at this range is not guaranteeable as it is higher than our stated recommended operating range. When subjected under the absolute maximum rating for a long time, the reliability of the product may be affected. *1: VBMAX = VB, VDDMAX = VDD , CPOUTMAX = CPOUT The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2: Except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for Ta = 25C. POWER DISSIPATION RATING PACKAGE 24 pin Wafer Level Chip Size Package (WLCSP) JA PD (Ta=25 C) PD (Ta=85 C) 197.29 C /W 0.507 W 0.2028 W Note) For the actual usage, please refer to the PD-Ta characteristics diagram in the package specification, follow the power supply voltage, load and ambient temperature conditions to ensure that there is enough margin and the thermal design does not exceed the allowable value. CAUTION Although this LSI has built-in ESD protection circuit, it may still sustain permanent damage if not handled properly. Therefore, proper ESD precautions are recommended to avoid electrostatic damage to the MOS gates Page 2 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A RECOMMENDED OPERATING CONDITIONS Parameter Supply voltage range Input Voltage Range Output Voltage Range Note) Symbol Min. Typ. Max. Unit Note VB (CPOUT) 3.1 3.6 6.0 V *1 VDD 1.7 1.85 6.0 V *1, 2 SLASEL, SCL, SDA, CLKIO - 0.3 -- VDD + 0.3 V *3 NRST - 0.3 -- VB + 0.3 V *3 CLKIO - 0.3 -- VDD + 0.3 V *3 VLDO, INT, Y1, Y2, Y3, Y4, X1, X2, X3 - 0.3 -- VB + 0.3 V *3 *1: The values under the condition not exceeding the above absolute maximum ratings and the power dissipation. Do not apply external currents and voltages to any pin not specifically mentioned. Voltage values, unless otherwise specified, are with respect to GND. GND is voltage for GND and CPGND. VDD is voltage for VDD. VB is voltage for VB and VBCP. VLED is voltage for VLED. *2: VDD voltage must be applied in the range which does not exceed VB voltage. *3: (VDD + 0.3 ) V must not exceed 6.5 V. (VB + 0.3 ) V must not exceed 6.5 V. Page 3 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A ELECTRICAL CHARACTERISTICS VB = 3.6 V, VDD = 1.85 V Note) Ta = 25 C 2 C unless otherwise specified. Parameter Symbol Condition Limits Min Typ Max Unit Note Current consumption Current consumption (1) at OFF mode ICC1 VB = 3.6 V NRST = 0V -- 0 1 A -- Current consumption (2) at OFF mode ICC2 VB = 3.6 V NRST = High -- 35 60 A -- ICC3 VB = 4.6 V NRST = High VB through mode ICPOUT = 0 mA LED = current 0 mA setting -- 0.26 0.52 mA -- ICC4 VB = 3.1 V NRST = High Charge Pump ON, 1.5, 600 kHz operation mode LED = current 0 mA setting -- 1.3 2.6 mA -- ICC5 VB = 3.1 V NRST = High Charge Pump ON, 1.5, 1.2 MHz operation mode LED = current 0 mA setting -- 2.3 4.6 mA -- FDC1 VB = 3.1 V to 4.6 V 1.92 2.40 2.88 MHz -- RVBS VB = 4.5 V ICPOUT = - 30 mA RVBS = (VVB - VCPOUT) / 30 mA -- 1.0 2.0 -- CPOUT = 4.5 V IY1 to IY4 = 20 mA -- 1.6 3.0 -- Current consumption (3) at VB through mode Current consumption (4) at charge pump 1.5 (600 kHz operation) Current consumption (5) at charge pump 1.5 (1.2 MHz operation) Internal oscillator Oscillation frequency VB through switch Resistance at switch ON SCAN switch Resistance at switch ON RSCAN Page 4 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A ELECTRICAL CHARACTERISTICS (continued) VB = 3.6 V, VDD = 1.85 V Note) Ta = 25 C 2 C unless otherwise specified. Parameter Symbol Condition Limits Min Typ Max Unit Note Current regulator (matrix) Output current (1) Output current (2) Current step IMX1 At 25.50 mA setting VX1 to VX3 = 1 V IMX1 = IX1 to IX3 24.22 25.50 26.78 mA *1 IMX2 At 1 mA setting VX1 to VX3 = 1 V IMX2 = IX1 to IX3 0.95 1.00 1.05 mA *1 0 100 200 A -- -- -- 1 A -- IMXSTEP IMAX[2:0] = 011 setting Off leak current IMXOFF OFF setting VX1 to VX3 = 4.5 V IMXOFF = IX1 to IX3 Error between channels IMXCH At 12.8 mA setting Current error between each channel and the median of X1 to 3 -5 -- 5 % -- Charge pump DC/DC overvoltage detection 5.3 5.5 5.7 V -- X1 to 3 pin voltage at the time when the step-up mode switch of charge pump changes -- 0.35 0.40 V -- -- 0.20 0.35 V -- Overvoltage detection Overvoltage detection voltage VOV Step-up mode switch of charge pump Step-up mode switch voltage of charge pump VLD1 Minimum voltage at which LED driver can keep constant current value Minimum voltage at which LED driver can keep constant current value VLD2 IMAX[2:0] = 011, 95% LED current value at the time when X1 to 3 pin voltage is set to 1V. Minimum value of X1 to 3 pin voltage Note) *1 : The specified values are the values in case that a recommended component (ERJ2RHD393X) is connected to IREF pin. Page 5 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A ELECTRICAL CHARACTERISTICS (continued) VB = 3.6 V, VDD = 1.85 V Note) Ta = 25 C 2 C unless otherwise specified. Parameter Symbol Condition Limits Min Typ Max Unit Note SLASEL High-level input voltage range VIH1 High-level recognition voltage 0.7 VDD -- VDD + 0.3 V -- Low-level input voltage range VIL1 Low-level recognition voltage -0.3 -- 0.3 VDD V -- High-level input current IIH1 VSLASEL = 3.6 V -- 0 1 A -- Low-level input current IIL1 VSLASEL = 0 V -- 0 1 A -- High-level input voltage range VIH2 High-level recognition voltage (at external clock input mode) 0.7 VDD -- VDD + 0.3 V -- Low-level input voltage range VIL2 Low-level recognition voltage (at external clock input mode) -0.3 -- 0.3 VDD V -- 0.4 0.8 1.6 M -- CLKIO Pin pull-down resistance RPD2 -- High-level input voltage VOH2 ICLKIO = -1mA (at external clock output mode) 0.8 VDD -- VDD + 0.3 V -- Low-level input voltage VOL2 ICLKIO = 1mA (at external clock output mode) -0.3 -- 0.2 VDD V -- High-level input voltage range VIH3 High-level recognition voltage 1.5 -- VB + 0.3 V -- Low-level input voltage range VIL3 Low-level recognition voltage -0.3 -- 0.6 V -- High-level input current IIH3 VNRST = 3.6 V -- 0 1 A -- Low-level input current IIL3 VNRST = 0 V -- 0 1 A -- -- -- 50 -- NRST INT ON resistance RINTON IINT = 5 mA Page 6 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A ELECTRICAL CHARACTERISTICS (continued) VB = 3.6 V, VDD = 1.85 V Note) Ta = 25 C 2 C unless otherwise specified. Parameter Symbol Condition Limits Min Typ Max Unit Note I2C bus (Internal I/O stage characteristics) Low-level input voltage VIH4 Voltage which recognized that SDA and SCL are Lowlevel 0.7 VDD -- VDD + 0.5, 6.0 V *2,3 High-level input voltage VIL4 Voltage which recognized that SDA and SCL are Highlevel -- -- 0.3 VDD V *3 Low-level output voltage 1 VOL41 VDD > 2 V ISDA = 3 mA 0 -- 0.4 V -- Low-level output voltage 2 VOL42 VDD < 2 V ISDA = 3 mA 0 -- 0.2 VDD V -- Input current each I/O pin Ii VSCL,VSDA = 0.17 V ~ 2.88 V -10 0 10 A -- fSCL -- -- -- 400 kHz -- SCL clock frequency I2C bus (Internal I/O stage characteristics) Hysteresis of Schmitt trigger input 1 Vhys1 Hysteresis of SDA, SCL VDD > 2 V 0.05 VDD V *4 *5 Hysteresis of Schmitt trigger input 2 Vhys2 Hysteresis of SDA, SCL VDD < 2 V 0.1 VDD V *4 *5 20 + 0.1Cb 250 ns *4 *5 Bus capacitance : 10 pF to 400pF IP 6 mA (VOLmax = 0.6 V) IP : Max. sink current Output fall time from VIHmin to VILmax Tof Pulse width of spikes which must be suppressed by the input filter Tsp -- 0 50 ns *4 *5 Capacitance for each I/O pin Ci -- -- 10 pF *4 *5 Note) *2 : The maximum value of High-level input voltage range is the voltage which is the lower of (VDD + 0.5 V) or 6.0 V. *3 : The input threshold voltage of I2C bus (Vth) is linked to VDD (I2C bus I/O stage supply voltage). In case the pull-up voltage is not VDD, the threshold voltage (Vth) is fixed to ((VDD / 2) (Schmitt width) / 2 ) and High-level, Low-level of input voltage are not specified. In this case, pay attention to Low-level (max.) value (VILMAX). It is recommended that the pull-up voltage of I2C bus is set to the I2C bus I/O stage supply voltage (VDD). *4 : The timing of Fast-mode Plus devices in I2C-bus is specified in Page.19. All values referred to VIHMIN and VILMAX level. *5 : These are values checked by design but not production tested. Page 7 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A ELECTRICAL CHARACTERISTICS (continued) VB = 3.6 V, VDD = 1.85 V Note) Ta = 25 C 2 C unless otherwise specified. Parameter Symbol Condition Limits Unit Note Min Typ Max 0.6 s I2C bus (Bus line specifications) *4 *5 *4 *5 *4 *5 Hold time (repeated) START condition tHD:STA Low period of the SCL clock tLOW 1.3 s High period of the SCL clock tHIGH 0.6 s Set-up time for a repeat START condition tSU:STA 0.6 s Data hold time tHD:DAT 0 s Data set-up time tSU:DAT 100 ns Rise time of both SDA and SCL signals tr 20 + 0.1Cb 300 ns *4 *5 Fall time of both SDA and SCL signals tf 20 + 0.1Cb 300 ns *4 *5 Set-up time of STOP condition tSU:STO 0.6 s Bus free time between STOP and START condition tBUF 1.3 s Capacitive load for each bus line Cb 400 pF Data valid time tVD:DAT -- 0.9 s Data valid acknowledge tVD:ACK -- 0.9 s Noise margin at the Low-level for each connected device VaL 0.1 VDD V Noise margin at the High-level for each connected device VaH 0.2 VDD V Note) The first clock pulse is generated after tHD:STA. *4 *5 *4 *5 *4 *5 *4 *5 *4 *5 *4 *5 *4 *5 *4 *5 *4 *5 *4 *5 *4 : The timing of Fast-mode Plus devices in I2C-bus is specified in Page.19. All values referred to VIHMIN and VILMAX level. *5 : These are values checked by design but not production tested. Page 8 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA 4-E A-0 5 2 7 0 Revis i no. 3 Product Standards AN32155A ELECTRICAL CHARACTERISTICS (continued) VB = 3.6 V, VDD = 1.85 V Note) Ta = 25 C 2 C unless otherwise specified. tf tSU;DAT tr SDA 70 % 30 % 70 % 30 % cont. tHD;DAT tf tVD;DAT tHIGH tr 70 % 30 % 70 % 30 % SCL tHD;STA S 70 % 30 % 70 % 30 % cont. tLOW 9th clock 1 / fSCL 1st clock cycle tBUF SDA tHD;STA tSU;STA SCL Sr tSP tVD;ACK 70 % 30 % 9th clock tSU;STO P S VILMAX = 0.3 VDD VIHMIN = 0.7 VDD S : START condition Sr : Repeat START condition P : STOP condition Page 9 of 24 Establ si hed : 2 0 1-00 8-0 6 Revised : 2 0 1-03 4-0 1 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A PIN CONFIGURATION Top View CP OUT VB CP GND A 5 Y2 B 4 Y1 Y3 Y4 CN1 CN2 C 3 NRST INT CP1 CLK IO CP2 D 2 X3 GND SDA SLA SEL VDD E 1 X2 X1 SCL VLDO IREF Page 10 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A PIN FUNCTIONS Pin No. Pin name Type Description Pin processing at unused I2C interface clock input pin (Must be connected) *1 I2C interface data input / output pin (Must be connected) *1 Input I2C interface slave address selection pin (Must be connected) *1 VDD Input Power supply pin for interface (Must be connected) *1 C1(5) NRST Input Reset input pin (Must be connected) *1 C2(6) INT C4(7) CLKIO D2(8) A5(22) GND CPGND Ground E2(9) X1 Output E1(10) X2 Output D1(11) X3 Output B1(12) Y1 Output A1(13) Y2 Output B2(14) Y3 Output B3(15) Y4 Output A3(16) CPOUT Output A4(17) VB C3(18) CP1 Output Capacitor connection pin for charge pump Open B4(19) CN1 Output Capacitor connection pin for charge pump Open C5(20) CP2 Output Capacitor connection pin for charge pump Open B5(21) CN2 Output Capacitor connection pin for charge pump Open E5(23) IREF Output Resistor connection pin for constant current setup (Must be connected) *1 E4(24) VLDO Output Power supply pin for internal circuits (Must be connected) *1 E3(1) SCL Input D3(2) SDA Input/Output D4(3) SLASEL D5(4) Output Input/Output Interrupt output pin Open Clock input/output and LED lighting external synchronous input pin Open Ground pin Constant current circuit, PWM control output pin Connected to 1st row of matrix LED Constant current circuit, PWM control output pin Connected to 2nd row of matrix LED Constant current circuit, PWM control output pin Connected to 3rd row of matrix LED Control switch pin for matrix driver Connected to A column of matrix LED Control switch pin for matrix driver Connected to B column of matrix LED Control switch pin for matrix driver Connected to C column of matrix LED Control switch pin for matrix driver Connected to D column of matrix LED Charge pump output pin / Power supply pin for matrix driver Power supply Power supply pin (Must be connected) *1 Open Open Open Open Open Open Open (Must be connected) *1 (Must be connected) *1 Note) *1 : This terminal is required pin when using this LSI. This terminal must be connected. Page 11 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A VB A4(17) CP1 C3(18) CN1 B4(19) CP2 C5(20) CN2 B5(21) CPGND A5(22) IREF VLDO Y4 Y3 Y2 Y1 B2(14) A1(13) B1(12) periodical scanning selectors Charge Pump frame and brightness controller E5(23) E4(24) B3(15) A3(16) CPOUT FUNCTIONAL BLOCK DIAGRAM Reference Generator & Voltage regulators Moving pattern generator LED drivers D1(11) X3 E1(10) X2 E2(9) X1 D2(8) GND C4(7) Logic CLKIO C2(6) INT NRST C1(5) VDD D5(4) SLASEL D4(3) SDA D3(2) SCL E3(1) I2C serial interface Note) This block diagram is for explaining functions. Part of the block diagram may be omitted, or it may be simplified. Page 12 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A OPERATION 1. Power-on / Power-off sequence control 1.1 Power ON VB VDD NRST 1 ms or more 3 ms or more Serial input is possible Note) Even if the power-on timing of VDD is the same as the rising timing of VB, there is no problem unless VDD voltage exceeds VB voltage. 1.2 Power OFF VB VDD NRST Serial input is possible 1 ms or more Note) Even if the power-off timing of VDD is the same as the falling timing of VB, there is no problem unless VDD voltage exceeds VB voltage. Page 13 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A OPERATION (continued) 2. Register map Sub R/W Address 00h 01h W Register Name Default SRESET R/W POWERCNT Data D7 D6 D5 D4 D3 D2 D1 D0 00h -- -- -- -- -- -- -- SRESET 00h -- -- -- CPRET MODE CPCLK SEL20 CPCLK SEL15 OSCEN CPSW SEQON -- CP20 CP15 VB CPOFF FCP20 FCP15 FVB FCPOFF -- VDETX3 EN VDETX2 EN MTX DETTM MTX CPMD 02h W LEDMODE 00h INFON 03h R STATE CHANGE 01h -- -- 04h R/W STATE FORCE 00h RETURN VB ERRMSK 05h R/W VDETLED CNT 00h -- -- 06h R/W MTXON 60h 07h W IOCNT 00h 08h W CONST 00h 09h W INTSEL 00h 0Ah R INT1 00h 0Bh R INT2 00h 0Ch W INTCLR1 00h 0Dh W INTCLR2 00h 0Eh W INTMSK1 00h 0Fh R/W INTMSK2 00h INFTIME[2:0] -- ERRCLR ERRSTOP -- IMAX[2:0] -- CPERR CTLGAIN[2:0] -- Y4CONST Y3CONST Y2CONST Y1CONST -- RSTCNT -- -- -- -- SEQNUM[1:0] VDETX1 VDETMTX EN MTXTIME[1:0] IOEN CLKDIR MTXON EXTPWM X3CONST X2CONST X1CONST -- -- INTSEL SLPINTC2 SLPINTC1 SLPINTB3 SLPINTB2 SLPINTB1 SLPINTA3 SLPINTA2 SLPINTA1 SDET VBDET FUNCINT CNTINT SLPINTD3 SLPINTD2 SLPINTD1 SLPINTC3 SLPINTC2 SLPINTC1 SLPINTB3 SLPINTB2 SLPINTB1 SLPINTA3 SLPINTA2 SLPINTA1 CLR CLR CLR CLR CLR CLR CLR CLR -- VBDET CLR FUNCINT CLR CNTINT CLR SLPINTD3 SLPINTD2 SLPINTD1 SLPINTC3 CLR CLR CLR CLR SLPINTC2 SLPINTC1 SLPINTB3 SLPINTB2 SLPINTB1 SLPINTA3 SLPINTA2 SLPINTA1 MSK MSK MSK MSK MSK MSK MSK MSK SDET MSK VBDET MSK FUNCINT MSK CNTINT MSK SLPINTD3 SLPINTD2 SLPINTD1 SLPINTC3 MSK MSK MSK MSK Note) Read value of "--"(the blanks) is [0] in the register map. Page 14 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A OPERATION (continued) 2. Register map (continued) Sub Address R/W Register Default Name Data D7 D6 D5 D4 D3 D2 D1 D0 10h R/W LEDON1 00h -- B3ON B2ON B1ON -- A3ON A2ON A1ON 11h R/W LEDON2 00h -- D3ON D2ON D1ON -- C3ON C2ON C1ON 12h R/W FADE1 00h -- FADEB3 FADEB2 FADEB1 -- FADEA3 FADEA2 FADEA1 13h R/W FADE2 00h -- FADED3 FADED2 FADED1 -- FADEC3 FADEC2 FADEC1 14h R/W FF1 00h -- FFB3 FFB2 FFB1 -- FFA3 FFA2 FFA1 15h R/W FF2 00h -- FFD3 FFD2 FFD1 -- FFC3 FFC2 FFC1 16h R/W ACT1 00h ACTINV ACTB3 ACTB2 ACTB1 -- ACTA3 ACTA2 ACTA1 17h R/W ACT2 00h ACTON ACTD3 ACTD2 ACTD1 -- ACTC3 ACTC2 ACTC1 18h R/W COUNT1 00h COUNTB1[1:0] COUNTA3[1:0] COUNTA2[1:0] COUNTA1[1:0] 19h R/W COUNT2 00h COUNTC2[1:0] COUNTC1[1:0] COUNTB3[1:0] COUNTB2[1:0] 1Ah R/W COUNT3 00h COUNTD3[1:0] COUNTD2[1:0] COUNTD1[1:0] 1Bh R LSIVER 01h -- -- -- -- -- COUNTC3[1:0] LSIVER[2:0] Note) Read value of "--"(the blanks) is [0] in the register map. Page 15 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A OPERATION (continued) 2. Register map (continued) Data Sub Address R/W Register Name Default 20h R/W SEQA1 21h R/W 22h D7 D6 D5 D4 D3 D2 D1 D0 00h -- -- -- -- SEQA14 SEQA13 SEQA12 SEQA11 SEQA2 00h -- -- -- -- SEQA24 SEQA23 SEQA22 SEQA21 R/W SEQA3 00h -- -- -- -- SEQA34 SEQA33 SEQA32 SEQA31 23h R/W SEQB1 00h -- -- -- -- SEQB14 SEQB13 SEQB12 SEQB11 24h R/W SEQB2 00h -- -- -- -- SEQB24 SEQB23 SEQB22 SEQB21 25h R/W SEQB3 00h -- -- -- -- SEQB34 SEQB33 SEQB32 SEQB31 26h R/W SEQC1 00h -- -- -- -- SEQC14 SEQC13 SEQC12 SEQC11 27h R/W SEQC2 00h -- -- -- -- SEQC24 SEQC23 SEQC22 SEQC21 28h R/W SEQC3 00h -- -- -- -- SEQC34 SEQC33 SEQC32 SEQC31 29h R/W SEQD1 00h -- -- -- -- SEQD14 SEQD13 SEQD12 SEQD11 2Ah R/W SEQD2 00h -- -- -- -- SEQD24 SEQD23 SEQD22 SEQD21 2Bh R/W SEQD3 00h -- -- -- -- SEQD34 SEQD33 SEQD32 SEQD31 Note) Read value of "--"(the blanks) is [0] in the register map. Page 16 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A OPERATION (continued) 2. Register map (continued) Data Sub Address R/W Register Name Default 30h R/W A1SET1 00h BLA1[7:0] 31h R/W A1SET2 00h TSA1[7:0] 32h R/W A1SET3 00h 33h R/W A2SET1 00h BLA2[7:0] 34h R/W A2SET2 00h TSA2[7:0] 35h R/W A2SET3 00h 36h R/W A3SET1 00h BLA3[7:0] 37h R/W A3SET2 00h TSA3[7:0] 38h R/W A3SET3 00h 39h R/W B1SET1 00h BLB1[7:0] 3Ah R/W B1SET2 00h TSB1[7:0] 3Bh R/W B1SET3 00h 3Ch R/W B2SET1 00h BLB2[7:0] 3Dh R/W B2SET2 00h TSB2[7:0] 3Eh R/W B2SET3 00h 3Fh R/W B3SET1 00h BLB3[7:0] 40h R/W B3SET2 00h TSB3[7:0] 41h R/W B3SET3 00h D7 DLLCA1 DLLCA2 DLLCA3 DLLCB1 DLLCB2 DLLCB3 D6 -- -- -- -- -- -- D5 D4 -- D2 D1 D0 DLA1[4:0] -- DLA2[4:0] -- DLA3[4:0] -- DLB1[4:0] -- -- D3 DLB2[4:0] DLB3[4:0] Note) Read value of "--"(the blanks) is [0] in the register map. Page 17 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A OPERATION (continued) 2. Register map (continued) Data Sub Address R/W Register Name Default 42h R/W C1SET1 00h BLC1[7:0] 43h R/W C1SET2 00h TSC1[7:0] 44h R/W C1SET3 00h 45h R/W C2SET1 00h BLC2[7:0] 46h R/W C2SET2 00h TSC2[7:0] 47h R/W C2SET3 00h 48h R/W C3SET1 00h BLC3[7:0] 49h R/W C3SET2 00h TSC3[7:0] 4Ah R/W C3SET3 00h 4Bh R/W D1SET1 00h BLD1[7:0] 4Ch R/W D1SET2 00h TSD1[7:0] 4Dh R/W D1SET3 00h 4Eh R/W D2SET1 00h BLD2[7:0] 4Fh R/W D2SET2 00h TSD2[7:0] 50h R/W D2SET3 00h 51h R/W D3SET1 00h BLD3[7:0] 52h R/W D3SET2 00h TSD3[7:0] 53h R/W D3SET3 00h D7 DLLCC1 DLLCC2 DLLCC3 DLLCD1 DLLCD2 DLLCD3 D6 -- -- -- -- -- -- D5 D4 D3 -- D1 D0 DLC1[4:0] -- DLC2[4:0] -- DLC3[4:0] -- DLD1[4:0] -- -- D2 DLD2[4:0] DLD3[4:0] Note) Read value of "--"(the blanks) is [0] in the register map. Page 18 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A OPERATION (continued) 3. I2C-bus interface 3.1 Basic Rules * This LSI, I2C-bus, is designed to correspond to the Standard-mode (100 kbps) and Fast-mode(400 kbps) devices in the version 03 of NXP's specification. However, it does not correspond to the HS-mode (to 3.4 Mbps). * This LSI will operate as a slave device in the I2C-bus system. This LSI will not operate as a master device. * The program operation check of this LSI has not been conducted on the multi-master bus system and the mixspeed bus system, yet. The connected confirmation of this LSI to the CBUS receiver also has not been checked. Please confirm with our company if it will be used in these mode systems. * The I2C is the brand of NXP. 3.2. START and STOP conditions A High to Low transition on the SDA line while SCL is High is one such unique case. This situation indicates START condition. A Low to High transition on the SDA line while SCL is High defines STOP condition. START and STOP conditions are always generated by the master. After START condition occur, the bus will be busy. The bus is considered to be free again a certain time after the STOP condition. START condition STOP condition SDA SCL 3.3. Transferring Data Every byte put on the SDA line must be 8-bits long. The number of bytes that can be transmitted per transfer is unrestricted. Each byte has to be followed by an acknowledge bit. Data is transferred with the most significant bit (MSB) first. P SDA acknowledgement signal from slave MSB acknowledgement signal from receiver Sr Byte transfer completion, Receive interrupt SCL S or Sr 1 START or repeated START condition 2 7 8 9 ACK 1 2 3-8 9 ACK Sr or P STOP or repeated START condition Page 19 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A OPERATION (continued) 3. I2C-bus interface (continued) 3.4 Data format It is possible to select slave address by switching SLASEL pin from Low-level to High-level. The slave address of this LSI is as follows. SLASEL Slave address Low 0110100X High 0110101X Write mode When MSB of sub address (8-bit) is "0", the sub address is not incremented automatically. By transmitting data bytes continuously, the next data bytes are written into the same sub address. by transmitting data byte continuously 7-bit S 8-bit Slave address START condition W A 0 8-bit Sub address ACK : 0 Write mode : 0 A Data byte ACK : 0 A P ACK : 0 STOP condition Write mode (Auto increment mode) When MSB of sub address (8-bit) is "1", auto increment mode is defined. By transmitting data bytes continuously, the data bytes are written into continuous sub address. The sub address is incremented automatically. 7-bit S Slave address START condition Data of Sub address X 8-bit 8-bit W A 1 ACK : 0 Write mode : 0 Sub address (X) A Data byte A ACK : 0 Data byte ACK : 0 Data of Sub address X+m-1 8-bit Data byte Data of Sub address X+1 8-bit A ACK : 0 Data of Sub address X+m 8-bit A ACK : 0 Data byte A P ACK : 0 : Data transmission from Master : Data transmission from Slave Page 20 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A OPERATION (continued) 3. I2C-bus interface (continued) 3.4 Data format (continued) Read mode (In case sub address is not specified) When the data is read without specifying sub address 8-bit, it is possible to read the value of sub address specified at adjacent write mode. 7-bit S 8-bit Slave address R A ACK : 0 Read mode : 1 START condition A P Data byte NACK : 1 STOP condition Read mode (In case sub address is specified) When MSB of sub address (8-bit) is "0", sub address is incremented automatically. Data byte of specified sub address is read repeatedly continuously until STOP condition is received. 7-bit S 8-bit Slave address W A 0 7-bit Sub address ACK : 0 START condition Write mode : 0 A Sr Slave address 8-bit R A A P Data byte ACK : 0 ACK : 0 Repeated START condition Read mode : 1 NACK : 1 STOP condition Read mode (Auto increment mode in case sub address is specified) When MSB of sub address (8-bit) is "1", auto increment mode is specified. Until STOP condition is received, data byte of sub address incremented automatically by specified sub address can be read continuously The sub address is incremented automatically. Data of Sub address X 7-bit 8-bit 7-bit 8-bit S Slave address START condition W A 1 Sub address (X) ACK : 0 Write mode : 0 A Sr Slave address R A Data byte ACK : 0 ACK : 0 Repeated START condition Read mode : 1 Data of Sub address X+m-1 8-bit Data byte A ACK : 0 Data of Sub address X+m 8-bit A ACK : 0 Data byte A P NACK : 1 STOP condition : Data transmission from Master : Data transmission from Slave Page 21 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A OPERATION (continued) 4. Signal distribution diagram Distribution diagram of power supply system VB CPOUT VDD VLDO BGR TSD Charge pump LOGIC MTX SCAN I2C GND CPGND Distribution diagram of control / clock system (PAD) CLKIO Oscillator 1 2.4 MHz 0 Logic block (MTX) *Matrix operation, PWM control (Register) IOCNT 1 4 600kHz 1 2 1.2MHz 1 0 Charge pump CPCLKSEL15 (at 1.5 mode) (Register) CPCLKSEL20 (at 2 mode) Page 22 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A PACKAGE INFORMATION ( Reference Data ) Page 23 of 24 Established : 2010-08-06 Revised : 2013-04-01 Doc No. TA4-EA-05270 Revision. 3 Product Standards AN32155A IMPORTANT NOTICE 1. When using the LSI for new models, verify the safety including the long-term reliability for each product. 2. When the application system is designed by using this LSI, please confirm the notes in this book. Please read the notes to descriptions and the usage notes in the book. 3. This LSI is intended to be used for general electronic equipment. Consult our sales staff in advance for information on the following applications: Special applications in which exceptional quality and reliability are required, or if the failure or malfunction of this LSI may directly jeopardize life or harm the human body. Any applications other than the standard applications intended. (1) Space appliance (such as artificial satellite, and rocket) (2) Traffic control equipment (such as for automobile, airplane, train, and ship) (3) Medical equipment for life support (4) Submarine transponder (5) Control equipment for power plant (6) Disaster prevention and security device (7) Weapon (8) Others : Applications of which reliability equivalent to (1) to (7) is required Our company shall not be held responsible for any damage incurred as a result of or in connection with the LSI being used for any special application, unless our company agrees to the use of such special application. 4. This LSI is neither designed nor intended for use in automotive applications or environments unless the specific product is designated by our company as compliant with the ISO/TS 16949 requirements. Our company shall not be held responsible for any damage incurred by customers or any third party as a result of or in connection with the LSI being used in automotive application, unless our company agrees to such application in this book. 5. Please use this product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Our company shall not be held responsible for any damage incurred as a result of our LSI being used by our customers, not complying with the applicable laws and regulations. 6. Pay attention to the direction of LSI. When mounting it in the wrong direction onto the PCB (printed-circuit-board), it might emit smoke or ignite. 7. Pay attention in the PCB (printed-circuit-board) pattern layout in order to prevent damage due to short circuit between pins. In addition, refer to the Pin Description for the pin configuration. 8. Perform visual inspection on the PCB before applying power, otherwise damage might happen due to problems such as solder-bridge between the pins of the semiconductor device. Also, perform full technical verification on the assembly quality, because the same damage possibly can happen due to conductive substances, such as solder ball, that adhere to the LSI during transportation. 9. Take notice in the use of this product that it might be damaged or occasionally emit smoke when an abnormal state occurs such as output pin-VCC short (Power supply fault), output pin-GND short (Ground fault), or output-to-output-pin short (load short). Safety measures such as installation of fuses are recommended because the extent of the above-mentioned damage and smoke emission will depend on the current capability of the power supply.. 10. The protection circuit is for maintaining safety against abnormal operation. Therefore, the protection circuit should not work during normal operation. Especially for the thermal protection circuit, if the area of safe operation or the absolute maximum rating is momentarily exceeded due to output pin to VCC short (Power supply fault), or output pin to GND short (Ground fault), the LSI might be damaged before the thermal protection circuit could operate. 11. Unless specified in the product specifications, make sure that negative voltage or excessive voltage are not applied to the pins because the device might be damaged, which could happen due to negative voltage or excessive voltage generated during the ON and OFF timing when the inductive load of a motor coil or actuator coils of optical pick-up is being driven. 12. Verify the risks which might be caused by the malfunctions of external components. 13. Due to the unshielded structure of this LSI, functions and characteristics of the product cannot be guaranteed under the exposure of light. During normal operation or even under testing condition, please ensure that the LSI is not exposed to light. 14. Please ensure that your design does not have metal shield parts touching the chip surface as the surface potential is GND voltage. Page 24 of 24 Established : 2010-08-06 Revised : 2013-04-01 Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) The technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) The products described in this book are intended to be used for general applications (such as office equipment, communications equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book. Consult our sales staff in advance for information on the following applications: - Special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. It is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the products described in this book for any special application, unless our company agrees to your using the products in this book for any special application. (4) The products and product specifications described in this book are subject to change without notice for modification and/or improvement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifications satisfy your requirements. (5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20100202 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Panasonic: AN32155A-PB