54AC280
54AC280 9-Bit Parity Generator/Checker
Literature Number: SNOS144
54AC280
9-Bit Parity Generator/Checker
General Description
The ’AC280 is a high-speed parity generator/checker that
accepts nine bits of input data and detects whether an even
or an odd number of these inputs is HIGH. If an even number
of inputs is HIGH, the Sum Even output is HIGH. If an odd
number is HIGH, the Sum Even output is LOW. The Sum
Odd output is the complement of the Sum Even output.
Features
nI
CC
reduced by 50%
n9-bit width for memory applications
nStandard Microcircuit Drawing (SMD) 5962-92201
Logic Symbols
Pin
Names Description
I
0
–I
8
Data Inputs
∑
O
Odd Parity Output
∑
E
Even Parity Output
Connection Diagrams
Truth Table
Number of Outputs
HIGH Inputs ∑Even ∑Odd
I
0
–I
8
0, 2, 4, 6, 8 H L
1, 3, 5, 7, 9 L H
H=HIGH Voltage Level
L=LOW Voltage Level
FACT™is a trademark of Fairchild Semiconductor Corporation.
DS100359-1
IEEE/IEC
DS100359-4
Pin Assignment for
DIP and Flatpak
DS100359-2
Pin Assignment for LCC
DS100359-3
September 1998
54AC280 9-Bit Parity Generator/Checker
© 1998 National Semiconductor Corporation DS100359 www.national.com
Logic Diagram
DS100359-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
) −0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
=−0.5V −20 mA
V
I
=V
CC
+ 0.5V +20 mA
DC Input Voltage (V
I
) −0.5V to V
CC
+ 0.5V
DC Output Diode Current (I
OK
)
V
O
=−0.5V −20 mA
V
O
=V
CC
+ 0.5V +20 mA
DC Output Voltage (V
O
) −0.5V to V
CC
+ 0.5V
DC Output Source
or Sink Current (I
O
)±50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)±50 mA
Storage Temperature (T
STG
) −65˚C to +150˚C
Junction Temperature (T
J
)
CDIP 175˚C
Recommended Operating
Conditions
Supply Voltage (V
CC
)
’AC 2.0V to 6.0V
Input Voltage (V
I
) 0VtoV
CC
Output Voltage (V
O
) 0VtoV
CC
Operating Temperature (T
A
)
54AC −55˚C to +125˚C
Minimum Input Edge Rate (∆V/∆t)
’AC Devices
V
IN
from 30%to 70%of V
CC
V
CC
@3.3V, 4.5V, 5.5V 125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, without
exception, to ensure that the system design is reliable over its power supply,
temperature, output/input loading variables. National does not recommend
operation of FACT circuits outside databook specifications.
DC Characteristics for ’AC Family Devices
54AC
Symbol Parameter V
CC
T
A
=Units Conditions
(V) −55˚C to
+125˚C
Guaranteed Limits
V
IH
Minimum High Level 3.0 2.1 V
OUT
=0.1V
Input Voltage 4.5 3.15 V or V
CC
− 0.1V
5.5 3.85
V
IL
Maximum Low Level 3.0 0.9 V
OUT
=0.1V
Input Voltage 4.5 1.35 V or V
CC
− 0.1V
5.5 1.65
V
OH
Minimum High Level 3.0 2.9 I
OUT
=−50 µA
Output Voltage 4.5 4.4 V
5.5 5.4 (Note 2)
V
IN
=V
IL
or V
IH
3.0 2.4 I
OH
= −12 mA
4.5 3.7 V I
OH
= −24 mA
5.5 4.7 I
OH
= −24 mA
V
OL
Maximum Low Level 3.0 0.1 I
OUT
=50 µA
Output Voltage 4.5 0.1 V
5.5 0.1 (Note 2)
V
IN
=V
IL
or V
IH
3.0 0.50 I
OL
=12mA
4.5 0.50 V I
OL
=24mA
5.5 0.50 I
OL
=24mA
I
IN
Maximum Input 5.5 ±1.0 µA V
I
=V
CC
, GND
Leakage Current
I
OLD
Minimum Dynamic
Output Current
(Note 3)
5.5 50 mA V
OLD
=1.65V Max
I
OHD
5.5 −50 mA V
OHD
=3.85V Min
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DC Characteristics for ’AC Family Devices (Continued)
54AC
Symbol Parameter V
CC
T
A
=Units Conditions
(V) −55˚C to
+125˚C
Guaranteed Limits
I
CC
Maximum Quiescent 5.5 80.0 µA V
IN
=V
CC
Supply Current or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: IIN and ICC @3.0V are guaranteed to be less than or equal to the respective limit @5.5V VCC.
AC Electrical Characteristics
54AC
V
CC
T
A
=−55˚C
Symbol Parameter (V)
(Note 5) to +125˚C Units
C
L
=50 pF
Min Max
t
PLH
Propagation Delay 3.3 1.0 20.0 ns
t
PHL
I
n
to ∑
E
5.0 1.0 14.5
t
PLH
Propagation Delay 3.3 1.0 20.0 ns
t
PHL
I
n
to ∑
O
5.0 1.0 14.5
Note 5: Voltage range 3.3 is 3.3V ±0.3V.
Voltage range 5.0 is 5.0V ±0.5V.
Capacitance
Symbol Parameter Typ Units Conditions
C
IN
Input Capacitance 4.5 pF V
CC
=OPEN
C
PD
Power Dissipation Capacitance 75.0 pF V
CC
=5.0V
www.national.com 4
Physical Dimensions inches (millimeters) unless otherwise noted
20 Terminal Ceramic Leadless Chip Carrier
NS Package Number E20A
14 Lead Ceramic Dual-In-Line Package
NS Package Number J14A
www.national.com5
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
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14 Lead Ceramic Flatpak (F)
NS Package Number W14B
54AC280 9-Bit Parity Generator/Checker
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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