EVAL-ADFS5758SDZ User Guide UG-1688 One Technology Way * P.O. Box 9106 * Norwood, MA 02062-9106, U.S.A. * Tel: 781.329.4700 * Fax: 781.461.3113 * www.analog.com Evaluating the ADFS5758 Single-Channel, 16-Bit Current/Voltage Output DAC, Functional Safety Approved for Unipolar Current Output FEATURES GENERAL DESCRIPTION Full featured evaluation board for the ADFS5758 On-board 2.5 V ADR4525 reference On-board ADP1031-1 isolated PMU with integrated SPI signal isolation channels ACE software for control This user guide describes the evaluation board for the ADFS5758. The ADFS5758 is a functional safety approved, single-channel, voltage and current output, digital-to-analog converter (DAC) with on-chip dynamic power control (DPC) to minimize package power dissipation. EVALUATION KIT CONTENTS For full details, refer to the ADFS5758 data sheet. Consult the data sheet when using the EVAL-ADFS5758SDZ. The configuration of the various link options is explained in the Evaluation Board Hardware section. The installation of the companion software is described in the Installing the ACE Software and ADFS5758 Plugins section. EVAL-ADFS5758SDZ evaluation board EQUIPMENT NEEDED EVAL-SDP-CS1Z board Bench top power supply and connector cables The EVAL-ADFS5758SDZ, as shown in Figure 1, requires the EVAL-SDP-CS1Z board. The EVAL-ADFS5758SDZ interfaces to the USB port of the PC via the EVAL-SDP-CS1Z board. The analysis, control, evaluation (ACE) software allows simplified programming of the ADFS5758, and is available with the EVAL-ADFS5758SDZ evaluation board. DOCUMENTS NEEDED ADFS5758 data sheet ACE User Manual SOFTWARE NEEDED ACE software for control 22209-001 EVAL-ADFS5758SDZ EVALUATION BOARD PHOTOGRAPH Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 20 UG-1688 EVAL-ADFS5758SDZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Initial Setup ....................................................................................5 Evaluation Kit Contents ................................................................... 1 ADFS5758 Block Diagram and Functions .....................................7 Equipment Needed ........................................................................... 1 Initial Configuration .....................................................................9 Documents Needed .......................................................................... 1 DC-to-DC Converter Settings .....................................................9 Software Needed ............................................................................... 1 Setting the DAC Output ............................................................ 10 General Description ......................................................................... 1 Writing to the ADC Configuration Register .......................... 10 EVAL-ADFS5758SDZ Evaluation Board Photograph................. 1 Updating Diagnostic Results .................................................... 10 Revision History ............................................................................... 2 Example Configuration Sequences .......................................... 11 Evaluation Board Hardware ............................................................ 3 ACE Tool Views .............................................................................. 12 Power Supplies .............................................................................. 3 Macro Tool .................................................................................. 12 Serial Communication ................................................................. 3 Register Debugger Tool ............................................................. 12 ADFS5758 Reference ................................................................... 3 Events Tool .................................................................................. 12 ADFS5758 Address Pins .............................................................. 3 Evaluation Board Schematics and Artwork ................................ 13 ADP1031-1 Power Good ............................................................. 3 Ordering Information .................................................................... 18 Software Quick Start Procedures .................................................... 5 Bill of Materials ........................................................................... 18 Installing the ACE Software and ADFS5758 Plugins .............. 5 REVISION HISTORY 6/2020--Revision 0: Initial Version Rev. 0 | Page 2 of 20 EVAL-ADFS5758SDZ User Guide UG-1688 EVALUATION BOARD HARDWARE POWER SUPPLIES The EVAL-ADFS5758SDZ evaluation board contains the ADP1031-1 power management unit (PMU), which generates three of four power supply inputs required by the ADFS5758: AVDD1 (+26.7 V), AVDD2 (+5.15 V), and AVSS (-15.4 V) device. VLOGIC is the fourth power supply required by the ADFS5758. The JP11 link provides the 3.3 V supply to the VLOGIC input via the VLDO output of the ADFS5758. The AVDD2 input can be connected to the AVDD1 input via the JP12 link if the VOUT2 supply from the ADP1031-1 is not in use. See Table 1 for link options and the default link positions. The EVAL-ADFS5758SDZ evaluation board operates with a power supply range from -33 V on AVSS to +33 V on AVDD1, with a maximum voltage of 60 V between the two rails. AVDD2 requires a voltage between 5 V and 33 V. The VDPC+ pin of the ADFS5758 can be driven by AVDD1 via the JP6 link. The JP6 link bypasses the dc-to-dc circuitry. SERIAL COMMUNICATION The SDP-S system demonstration platform handles communication to the EVAL-ADFS5758SDZ via the PC. By default, the SDP-S board handles the serial port interface (SPI) communication, controls the RESET and LDAC pins, and monitors the FAULT pin of the ADFS5758. The EVAL-ADFS5758SDZ evaluation board can disconnect from the SDP-S board and drive the digital signals from an external source by removing the appropriate links on the P10 link. The option to tie the RESET and LDAC pins to high or low levels can be accessed through the S2 switch and JP4 link. ADFS5758 REFERENCE The ADFS5758 can use its internal reference or an external reference. The external reference on board is the ADR4525 and is powered by either the AVDD2 generated from ADP1031-1 or the VLDO generated by the ADFS5758. JP5 selects which voltage reference is to be used by the ADFS5758. ADFS5758 ADDRESS PINS The ADFS5758 address pins (AD0 and AD1) are used in conjunction with the ADFS5758 address bits within the SPI frame to determine which ADFS5758 device is being addressed by the system controller. AD0 and AD1 can be configured through JP7 and JP8. ADP1031-1 POWER GOOD PWRGD is an active high signal that indicates when the ADP1031-1 outputs have reached the desired output voltage. The DS1 light emitting diode (LED) lights up when the powergood signal is low, indicating an error on the ADP1031-1 voltage outputs. Table 1. EVAL-ADFS5758SDZ Link Option Functions Link JP1 Default Link Position B JP2 JP3 Inserted A JP4 JP5 A A JP6 JP7 JP8 JP9 JP10 Not inserted A A Not inserted B JP11 JP12 Inserted A JP13 P10 Inserted Inserted S2 Left Middle (default) Right Function Position A connects the AVSS pin to ground for the unipolar supply option (current output only). Position B selects the VOUT3 voltage of the ADP1031-1. Connects the VLOGIC pin of the ADFS5758 to the SVDD1 pin of the ADP1031-1. Position A selects the 3.3 V output from the SDP-S to the MVDD pin of the ADP1031-1. Position B selects the 3.3 V input via the EXT+3.3V_ header to the MVDD pin of the ADP1031-1. Position A connects the LDAC pin to GND. Position B connects the LDAC pin to the VLOGIC pin. Position A selects VOUT2 of the ADP1031-1 as the input voltage to the ADR4525. Position B selects the VLDO pin as the input voltage to the ADR4525. Shorts the VDPC+ pin to the AVDD1 pin, bypassing the positive dc-to-dc circuitry. Position A connects the AD0 pin to ground. Position B connects the AD0 pin to the VLOGIC pin. Position A connects the AD1 pin to ground. Position B connects the AD1 pin to the VLOGIC pin. Connects the return signal to ground. Position A selects the REFOUT pin of the ADFS5758 as the input to the REFIN pin of the ADFS5758. Position B selects the ADR4525 output as the input to the REFIN pin. Connects the 3.3 V output of the VLDO pin to the VLOGIC pin. Position A selects VOUT2 of the ADP1031-1 as the input voltage to the AVDD2 pin. Position B selects the AVDD1 pin as the input voltage to the AVDD2 pin. Connects VOUT1 of the ADP1031-1 to the AVDD1 pin. Provides options to disconnect from the SDP-S board and to drive digital signals from an external source. See Table 2 for the specific link options. In the left position, this link connects the RESET pin to the VLOGIC pin. In the middle position (default), this link controls the RESET pin via the SDP-S board. In the right position, this link connects the RESET pin to ground. Rev. 0 | Page 3 of 20 UG-1688 EVAL-ADFS5758SDZ User Guide Table 2. Link Options for the P2_ Header (All Links are Inserted by Default) Pin No. 1, 2 3, 4 5, 6 7, 8 9, 10 11, 12 13, 14 15, 16 Position Inserted Not inserted Inserted Not inserted Inserted Not inserted Inserted Not inserted Inserted Not inserted Inserted Not inserted Inserted Not inserted Inserted Not inserted Function Connects the FAULT signal from the SDP-S to the MGPO3 pin on the ADP1031-1. Disconnects the FAULT signal from the SDP-S to the MGPO3 pin on the ADP1031-1. Connects the RESET signal from the SDP-S to the MGPI2 pin on the ADP1031-1. Disconnects the RESET signal from the SDP-S to the MGPI2 pin on the ADP1031-1. Connects the LDAC signal from the SDP-S to the MGPI1 pin on the ADP1031-1. Disconnects the LDAC signal from the SDP-S to the MGPI1 pin on the ADP1031-1. Connects the SCLK signal from the SDP-S to the MCK pin on the ADP1031-1. Disconnects the SCLK signal from the SDP-S to the MCK pin on the ADP1031-1. Connects the SDO signal from the SDP-S to the MI pin on the ADP1031-1. Disconnects the SDO signal from the SDP-S to the MI pin on the ADP1031-1. Connects the SDI signal from the SDP-S to the MO pin on the ADP1031-1. Disconnects the SDI signal from the SDP-S to the MO pin on the ADP1031-1. Connects the SYNC signal from the SDP-S to the MSS pin on the ADP1031-1. Disconnects the SYNC signal from the SDP-S to the MSS pin on the ADP1031-1. Connects the PWRGD signal from the SDP-S to the PWRGD pin on the ADP1031-1. Disconnects the PWRGD signal from the SDP-S to the PWRGD pin on the ADP1031-1. Rev. 0 | Page 4 of 20 EVAL-ADFS5758SDZ User Guide UG-1688 SOFTWARE QUICK START PROCEDURES INSTALLING THE ACE SOFTWARE AND ADFS5758 PLUGINS 5. The EVAL-ADFS5758SDZ software uses the Analog Devices, Inc., ACE software. For instructions on the use of the ACE software, see the www.analog.com/ACE product page. 22209-004 When the installation completes, the EVAL-ADFS5758SDZ evaluation board plugin window appears when the ACE software opens (see Figure 2). When setting up the evaluation board for the first time, the EVAL-ADFS5758SDZ plugin may need to be installed. If the plugin appears as shown in Figure 6, go to Step 7. If the plugin appears as shown in Figure 3, click the button that is marked in red in Figure 3. After clicking this button, the popup window shown in Figure 4 appears. Click Yes. Figure 4. Installing Plugin Popup Window 22209-002 6. A new window appears, as shown in Figure 5. Navigate to the Board.ADFS5758 plugin and click Install Selected. The EVAL-ADFS5758SDZ plugin installs and displays, as shown in Figure 6. Figure 2. EVAL-ADFS5758SDZ Evaluation Board Plugin Window After Opening the ACE Software INITIAL SETUP To set up the EVAL-ADFS5758SDZ, take the following steps: 4. 22209-005 3. Figure 5. Manage Plug-ins Window 22209-006 2. Connect a USB cable to the PC and then to the SDP-S board. Connect the SDP-S board to the EVAL-ADFS5758SDZ. The PC recognizes the EVAL-ADFS5758SDZ. Power up the EVAL-ADFS5758SDZ with the relevant power supplies. If not opened already, open the ACE software. The EVAL-ADFS5758SDZ appears in the Attached Hardware pane. 22209-003 1. Figure 3. EVAL-ADFS5758SDZ Plugin Not Installed Figure 6. Attached Hardware Pane with EVAL-ADFS5758SDZ Connection Rev. 0 | Page 5 of 20 UG-1688 Double-click EVAL-ADFS5758SDZ to open the ADFS5758 block diagram. The INITIAL CONFIGURATION pane appears on the left side of the window. Several register settings can be configured in this pane and are written to the device in the appropriate order. The DIG_DIAG_STATUS, RESET_OCCURRED, and CAL_MEM_UNREFRESHED LED indicators in the window illuminate red by default. Writing the initial configuration values clears these error flags. If the device is power cycled, or if the USB cable is disconnected and reconnected while the ACE software is open, contact with the EVAL-ADFS5758SDZ can be lost. If contact is lost, click the System tab, click the USB symbol on the SDP-S Controller, and then click Acquire to communicate with the EVAL-ADFS5758SDZ. 22209-007 7. EVAL-ADFS5758SDZ User Guide Figure 7. ADFS5758 Block Diagram in the ACE Software Rev. 0 | Page 6 of 20 EVAL-ADFS5758SDZ User Guide UG-1688 ADFS5758 BLOCK DIAGRAM AND FUNCTIONS A full description of each block and register setting is available in the ADFS5758 data sheet. The full window ADFS5758 block diagram, with labels, is shown in Figure 8. Table 3 describes the functionality of each block. 22209-008 The ADFS5758 ACE block diagram, as shown in Figure 8, appears similar to the block diagram shown in the ADFS5758 data sheet for simplified correlation of the functions on the EVAL-ADFS5758SDZ evaluation board with the descriptions given in the ADFS5758 data sheet. Figure 8. ADFS5758 ACE Block Diagram with Labels Table 3. ADFS5758 Block Diagram Label Functions (See Figure 8) Label A B C D E F G H I J K L1 to L15 M N O P Function Description To apply any changes made to the block diagram or to register values in the memory map to the device, click Apply Changes. To read back all of the registers of the device, click Read All. Click Reset Chip to reset the ADFS5758. The Reset Chip button has the same functionality as the software reset of the ADFS5758. Click Diff to show the registers that are different from the data stored on the device. This function shows what has changed since the last time the registers were read. Click Software Defaults to load the software defaults of the device. These values are not written to the hardware. Click Apply Changes (Label A in Figure 8) to write the software default values to the hardware. Click to view the memory map side by side with the block diagram. The AD0 and AD1 check boxes set the device under test (DUT) address of the device and must correspond to the JP12 and JP14 links on the hardware. A selected box represents a high state. A cleared box represents a low state. If the /RESET box is selected, the SDP-S sets the RESET pin high. Otherwise, the SDP-S pulls RESET low. If the /LDAC box is selected, the SDP-S sets the LDAC pin high. Otherwise, the SDP-S pulls LDAC low. The ACE plugin monitors the FAULT pin. If the FAULT pin is low, the /FAULT indicator LED illuminates red. The VI_OUT field displays the calculated output at the VIOUT pin and displays if the output is in volts, milliamperes, or is high impedance (high-Z). The graphical user interface (GUI) access for several registers. Popup menus, dropdown menus, and hexadecimal text fields are available in the GUI to configure several registers of the ADFS5758. To write the changes to the device, click Apply Changes (Label A). The functions within the GUI that control various registers (Label L1 through Label L15 in Figure 8) are described in Table 4. The Calibration Memory Refresh button initiates a write to the key register to perform a calibration memory refresh. The SW LDAC button initiates a write to the key register to perform a software LDAC command. The NOP Command button initiates a write to Address 0x00 for a no operation (NOP) command. The Configure ADC button writes the data selected in the ADC Config pane (Label L15) to the ADC configuration register. Rev. 0 | Page 7 of 20 UG-1688 Label Q R S T U V EVAL-ADFS5758SDZ User Guide Function Description The Two Stage Readback Select pane initiates two-stage readback through the two-stage readback select register. Click Readback to initiate a write to the two-stage readback select register and issue a NOP command. In the DIGITAL DIAGNOSTIC RESULTS pane, click Update and Readback Digital Diagnostic Result button to trigger a write 1 to clear operation and initiate a readback from the digital diagnostic results register. In the ANALOG DIAGNOSTIC RESULTS pane, click Update and Readback Analog Diagnostic Result button to trigger a write 1 to clear operation and initiate a readback from the analog diagnostic results register. If the HART_EN box is checked, the HART_EN bit = 1 in the General-Purpose Configuration 1 register. Click Proceed to Memory Map to open the ADFS5758 memory map (see Figure 9). Click Example Sequences to open the example sequences window (see Figure 15). Table 4. Register Controls Accessible via the GUI (See Label L1 to L15 in Table 3 and in Figure 8) Label L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 Function Description The Diagnostic Configuration button opens the associated popup menu. When the GP Config button clicked, a popup menu appears. When the Key register menu is clicked, a dropdown list appears. When the Fault Pin Config button is clicked, a popup menu appears. When the WDT Config button is clicked, a popup menu appears. The Frequency Monitor text field displays the value in the frequency monitor when read. The Clear Code text field inserts a clear code value in hexadecimal format. The User Gain text field inserts a user gain value in hexadecimal format. The User Offset text field inserts a user offset value in hexadecimal format. The DAC Input Reg text field inserts the DAC value in hexadecimal format. The 16 Bit DAC block opens a popup menu when clicked. The DAC Output Reg control displays the hexadecimal value currently set in the DAC output register. The DC-DC Converter block opens the dc-to-dc configuration popup menu. The Status Register pane displays the contents of the status register including any ADC conversion result. The ADC Config pane contains a combination of dropdown menus and a text field to enter the ADC input data. Rev. 0 | Page 8 of 20 UG-1688 22209-009 EVAL-ADFS5758SDZ User Guide Figure 9. ADFS5758 Memory Map in the ACE Software INITIAL CONFIGURATION An initial configuration wizard is available when opening the ADFS5758 plugin. The initial configuration wizard allows quick configuration of the ADFS5758 and provides configuration of the clock output in the general-purpose configuration register, the dc-to-dc settings, the DAC configuration, and the DAC input register. Clicking the Apply Changes button initiates the configured settings in the order of the recommended power-up sequence described in the ADFS5758 data sheet. If the VDPC+ pin is not tied directly to AVDD1, enable the dc-to-dc converter for proper operation. This step must be completed before configuring the DAC output. The DC-DC Configuration popup menu, as shown in Figure 10, contains the dc-to-dc settings required to configure the ADFS5758 output properly. After the desired settings are selected, click the Close button and then click Apply Changes. Rev. 0 | Page 9 of 20 22209-010 DC-TO-DC CONVERTER SETTINGS Figure 10. DC-DC Configuration Popup Menu UG-1688 EVAL-ADFS5758SDZ User Guide SETTING THE DAC OUTPUT To change the DAC voltage or current output level, write the appropriate hexadecimal code to the DAC input register, and then click Apply Changes. Click SW LDAC to issue a software LDAC command, or pull the LDAC pin low to update the DAC output register with the values in the DAC input register. Enable the DAC output by checking the OUT_EN (Enable VI_OUT) checkbox, and then click Apply Changes. The programmed voltage or current is then reflected at the VIOUT pin. 22209-012 To configure the DAC output, use the DAC Config Register popup menu (see Figure 11). Click the 16 Bit DAC block in the block diagram to display the DAC configuration register. Select the appropriate settings, and then click Apply Changes. It is recommended to disable the output until the correct value in the DAC input register is written to the device. Figure 12. ADFS5758 ADC Configuration Register UPDATING DIAGNOSTIC RESULTS The ADFS5758 has a digital diagnostic results register and an analog diagnostic results register, which contain error flags for the on-chip digital and analog diagnostic features. Writing 1 to the respective error flags updates the error flag status. To update the digital and analog diagnostic results registers, click Update and Readback Digital Diagnostic Result for digital diagnostic results registers or Update and Readback Analog Diagnostic Result for analog diagnostic results registers. These buttons initiate the writing of a 1 to the selected error flag and then read back the updated diagnostic result. 22209-014 22209-011 Figure 13 shows the digital diagnostic results register. Figure 14 shows the analog diagnostic results register. Figure 11. ADFS5758 DAC Config Register Popup Menu Figure 13. ADFS5758 DIGITAL DIAGNOSTIC RESULTS Register The procedure to set up and configure the ADC input node is discussed in the ADFS5758 data sheet. For this reason, writing to the ADC configuration register through the Apply Changes function is disabled. The dropdown list in the SEQUENCE_COMMAND pane contains the list of available commands. The hexadecimal text field in the SEQUENCE_DATA section is used in conjuction with the SEQUENCE_COMMAND bits. The dropdown list in the ADC IP SELECT section is used to select the desired input node for the ADC to convert. Click Configure ADC to initiate a write to the ADC configuration register. A register read must be performed to see the ADC result in the status register. Rev. 0 | Page 10 of 20 22209-013 WRITING TO THE ADC CONFIGURATION REGISTER Figure 14. ADFS5758 ANALOG DIAGNOSTIC RESULTS Register EVAL-ADFS5758SDZ User Guide UG-1688 EXAMPLE CONFIGURATION SEQUENCES 22209-015 Several example configuration sequences are available. Click Example Sequences to open the Sample ADFS5758 Sequences window shown in Figure 15. To enable any of the sequences, click the relevant sequence button, as shown in Figure 16. The sequence runs immediately and the output changes accordingly. To return to the main window, click Back to ADFS5758. 22209-016 Figure 15. Example Sequences Window Figure 16. Selecting an Example Sequence Rev. 0 | Page 11 of 20 UG-1688 EVAL-ADFS5758SDZ User Guide ACE TOOL VIEWS The ACE software provides additional functionality to the main view described in this user guide. Open these views from the View menu on the application toolbar. The ACE software features a macro tool, a register debugger tool, and an events tool. MACRO TOOL The macro tool records and saves commands as an ACE macro file. This feature is useful when sharing macros with other users to perform the same task multiple times. The user can import and run an ACE macro file. REGISTER DEBUGGER TOOL Use the register debugger tool to perform raw writes to and reads from the device. The register debugger affects only the hardware and does not write to the memory map of the ACE software. EVENTS TOOL The events tool view contains a list of errors, warnings, and information messages generated within the application software. Rev. 0 | Page 12 of 20 2 AGND 1 FAULT AD0 AD1 RESET LDAC SCLK SDI SYNC SDO CLKOUT CLKOUT_ JP2 LDAC LDAC RESET REFGND SDI SDI SCLK 0 R42 AGND SCLK C27 2.2F DNI C13 0.1F RESET REFOUT OPTIONAL RC FILTER ON REFOUT VLOGIC AGND JP11 JP12 SYNC SYNC V LDO AGND AGND AGND SDO SDO FAULT GRN FAULT 27 26 29 28 11 8 7 2 1 47H L2 JP6 AGND 0.1F 50V C14 AVSS 13 V LOGIC 15 DGND 18 CLKOUT U5 23 AD0 ADFS5758BCPZ-RL7 22 AD1 16 RESET RB 17 LDAC RA 19 SCLK 20 SDI 21 CHART SYNC 14 SDO +VSENSE 24 FAULT VIOUT 9 REFIN -VSENSE 10 REFOUT C COMP 6 REFGND 12 REFGND REFIN B A C15 0.1F 50V 3 AVDD2 5 AGND EPAD PAD AVDD2_ISO ADC1 C12 0.1F C16 0.1F 50V 4 ADC1 30 ADC2 ADC2 VLDO 2 AVDD1 1 SW+ 31 VDPC+ AVDD2 PGND1 32 AVSS 25 VLDO_ PGND_ISO C21 2.2F VDPC+ AGND P4 P5 R9 13.7k AGND AGND AVSS_ISO THROUGH-HOLE C_COMP IN GOLD PINS -VSENSE VIOUT +VSENSE CHART SMD 13.7k RSET = 0.1% TOL, 10PPM/C D4 AVDD1 JP1 JP13 A C B 3 2 Rev. 0 | Page 13 of 20 1 A Figure 17. ADFS5758 Device 1 1 AVDD1_ISO FAULT IF = 2MA VLOGIC 0 R43 A C DS4 R44 1k PGND_ISO EVAL-ADFS5758SDZ User Guide UG-1688 EVALUATION BOARD SCHEMATICS AND ARTWORK 22209-017 C20 1F JP3 DGND RED +3.3V_ +3.3V EXT +3.3V BLK AGND1 BLK AGND BLK AGND2 AGND3 BLK AGND4 BLK AGND5 AGND AGND REFGND "ISLAND" PINNED TO OTHER GND PLAIN AT 1 POINT GROUND PLANE APPROACH = SHORT AGND, PGND_ISO -> TO PRODUCE "GND" 3.3V_SDP EXT +3.3V B FARNELL CODE 3705353 NEEDS TO BE ADDED TO BOM EXT+3.3V_ PRIMARY SIDE 0 R41 REFGND VLDO AVDD2_ISO JP5 REFGND C22 1F REFOUT ADR-REF RED C23 1F VIN REFGND 2 VIN = 3V TO 15V REFOUT_ LDAC LDAC AGND AD0 VLOGIC AGND AD1 VLOGIC TP VOUT 8 6 U4 JP10 ADR4525BRZ AGND OPTION TO TIE LDAC LOW AND AD PINS PERMANENTLY HIGH/LOW JP4 DGND = PRIMARY SIDE B A A B A ADFS5758 REFIN OPTIONS JP7 AGND = SECONDARY SIDE JP8 TESTPOINTS: RED = POWER/VOLTAGE BLACK = GROUND GREEN = SIGNAL B B A GND NC NC NC NC 4 1 3 5 7 B Rev. 0 | Page 14 of 20 A Figure 18. ADFS5758 Power Supplies and Reference Options A TL39P0050 RESET ADR-REF REFGND C24 1F RED REFIN AGND S2 RESET TOGGLE SWITCH REFIN_ VLOGIC RED UG-1688 EVAL-ADFS5758SDZ User Guide 22209-018 Rev. 0 | Page 15 of 20 1 2 Figure 19. ADP1031-1 Device PGND PGND SLEW DGND PWRGD #LDAC #RESET #FAULT #SCLK #SDI #SDO #SYNC +3.3V PGND R3 210k R2 1M PWRGD IF = 2MA +3.3V C A DS1 R1 1k LOCATE BESIDE THE PWRGD TESTPOINT PGND 1 BLK PGND1 PGND C1 4.7F PVIN 1 BLK DGND3 C2 0.1F 35 36 37 38 40 41 1 2 39 PWRGD MGPI1 MGPI2 MGPO3 MCK MO MI MSS_N MVDD 31 32 EN 33 SLEW 28 GNDP PGNDP PAD2 PAD PGND C3 4.7F 1 BLK DGND2 LED ON INDICATES AN ISSUE ON ADP1031 SECONDARY SUPPLIES 1 BLK PGND2 MINIMUM SUPPLY = 7V PVIN_ 1 DGND 1 BLK DGND1 DGND AGND A SYNC SGPO1 SGPO2 SGPI3 SCK SI SO SSS_N SVDD1 SVDD2 14 23 22 21 9 8 7 6 10 20 12 VOUT3 11 FB3 13 SW3 15 VOUT2 17 SW2 18 VOUT1 19 FB1 AGND 750316743 5 4 U1 ADP1031ACPZ-1 8 T1 24 DNC PAD1 PAD 4 SGND2 5 SGND1 30 VINP 29 SWP 3 MGND 34 MGND PAD3 PAD 27 SGND2 26 DNC 25 DNC 16 SGND2 1 C AGND R15 100k AGND AGND R6 18.2k 100H AGND R8 715k ~-15.4V R7 39k 100H L3 AGND C7 4.7F 50V SDI AGND R16 100k PLACE BETWEEN PIN 10 AND PIN 5 PLACE BETWEEN PIN 20 AND PIN 16 C6 0.1F R4 100k L1 ~26.7V R5 590k CLKOUT C5 4.7F 50V AGND AGND C4 0.1F LDAC RESET FAULT SCLK SDI SDO SYNC SDO D1 C10 22pF VLOGIC C9 4.7F 50V AGND C8 4.7F 16V AGND R20 100k R19 100k VLOGIC SCLK IN AVSS_ISO AVDD2_ISO AVDD1_ISO EVAL-ADFS5758SDZ User Guide UG-1688 22209-019 DS2 RESET_SDP FAULT_SDP DGND 1k R30 SDP DEBUG LED DGND 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Figure 20. EVAL-SDP-CS1Z Board Connections Rev. 0 | Page 16 of 20 FX8-120S-SV(21) 61 RESET_IN_N BMODE1 62 UART_RX UART_TX 63 GND GND 64 RESET_OUT_N SLEEP_N 65 EEPROM_A0 WAKE_N 66 NC NC 67 NC NC 68 NC NC 69 GND GND 70 NC NC 71 NC CLKOUT 72 TMR_C TMR_D 73 TMR_B TMR_A 74 GPIO7 GPIO6 75 GND GND 76 GPIO5 GPIO4 77 GPIO3 GPIO2 78 GPIO1 GPIO0 79 SCL_0 SCL_1 80 SDA_0 SDA_1 81 GND GND 82 SPI_CLK SPI_SEL1/SPI_SS_N 83 SPI_MISO SPI_SEL_C_N 84 SPI_SEL_B_N SPI_MOSI 85 GND SPI_SEL_A_N 86 GND SERIAL_INT 87 SPORT_TSCLK SPI_D3 88 SPORT_DT0 SPI_D2 89 SPORT_TFS SPORT_DT1 90 SPORT_RFS SPORT_DR1 91 SPORT_DR0 SPORT_TDV1 92 SPORT_RSCLK SPORT_TDV0 93 GND GND 94 PAR_CLK PAR_FS1 95 PAR_FS2 PAR_FS3 96 PAR_A0 PAR_A1 97 PAR_A2 PAR_A3 98 GND GND 99 PAR_INT PAR_CS_N 100 PAR_WR_N PAR_RD_N 101 PAR_D0 PAR_D1 102 PAR_D2 PAR_D3 103 PAR_D4 PAR_D5 104 GND GND 105 PAR_D6 PAR_D7 106 PAR_D8 PAR_D9 107 PAR_D10 PAR_D11 108 PAR_D12 PAR_D13 109 GND PAR_D14 110 PAR_D15 GND 111 PAR_D16 PAR_D17 112 PAR_D18 PAR_D19 113 PAR_D20 PAR_D21 114 PAR_D22 PAR_D23 115 GND GND 116 VIO(+3.3V) USB_VBUS 117 GND GND 118 GND GND 119 NC NC 120 NC VIN P10 DGND DGND R31 100k OUT 3.3V_SDP DGND R35 100k DNI R34 100k 3.3V_SDP SYNC_SDP SCLK_SDP SDO_SDP SDI_SDP SDP_PWRGD LDAC_SDP DGND R33 100k R32 DNI DGND 1 2 3 6 7 A0 A1 A2 SCL WP U2 24LC32A/SN 3.3V_SDP SDA 2 PIN 8 ROW HEADER GRN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 P2_ #FAULT_ #RESET_ #LDAC_ #SCLK_ #SDO_ #SDI_ #SYNC_ PWRGD_ 5 DGND FAULT_SDP #FAULT RESET_SDP #RESET LDAC_SDP #LDAC SCLK_SDP #SCLK SDO_SDP #SDO SDI_SDP #SDI SYNC_SDP #SYNC SDP_PWRGD PWRGD VSS 4 8 VCC C11 0.1UF UG-1688 EVAL-ADFS5758SDZ User Guide 22209-020 Rev. 0 | Page 17 of 20 CHART -VSENSE ADC1 VIOUT ADC2 +VSENSE 1 AGND GRN CHART GRN 1 1k R10 C17 1.0F GRN -VSENSE 1 GRN TP1 1 VIOUT 1 GRN GRN TP2 1 2.0k R12 AGND C18 0.01F DNI R36 200 DNI AGND C25 0.15F 1k R13 10 R11 P9 DNI P8 DNI R39 2.0jk C26 0.047F AGND R37 20 AGND GRN R38 2.0K 1 RETURN THROUGH-HOLE LOAD RESISOR OPTION 1 1 GOLD PINS FOR RESISTOR 2 JP9 Figure 21. ADFS5758 Output Stage 1 +VSENSE 1 1 1 P7 P6 VIOUT_TERMINAL GRN AGND C19 0.01F SMAJ33CA-TR D2 AGND 2 1 1 2 3 4 5 P3 +VSENSE VI_OUT RETURN -VSENSE C_HART EVAL-ADFS5758SDZ User Guide UG-1688 22209-021 UG-1688 EVAL-ADFS5758SDZ User Guide ORDERING INFORMATION BILL OF MATERIALS Table 5. Bill of Materials Reference Designator #FAULT_, #LDAC_, #RESET_, #SCLK_, #SDI_, #SDO_, #SYNC_, +VSENSE, -VSENSE, FAULT_, LDAC_, RESET_, SYNC_, CHART, CLKOUT_, PWRGD_, RETURN, SCLK_, SDI_, SDO_, VIOUT, VIOUT_TERMINAL +3.3V_, ADR_REF_, AVDD1, AVDD2, AVSS, PVIN, REFIN_, REFOUT_, VDPC+, VLDO_ AGND1 to AGND5, DGND1, DGND2, DGND3, PGND1, PGND2 C1, C3 C10 C2, C4, C6, C11, C12, C13 C14, C15, C16 C17 C19 C20, C22, C23, C24 C21 C25 C26 C5, C7, C9 C8 D1 D2 D4 DS1, DS4 DS2 EXT+3.3V_, PVIN_ JP1, JP3, JP4, JP5, JP7, JP8, JP10, JP12 JP2, JP6, JP9, JP11, JP13 L1, L3 L2 P10 P2_ P3 P4 to P9 R1, R10, R13, R30, R44 R11 R15, R16, R20, R31, R33, R34 R2 R3 R38, R39 Description Test point, green Manufacturer Vero Technologies Part Number 20-313138 Test point, red Vero Technologies 20-313137 Test point, black Vero Technologies 20-2137 Multilayer ceramic capacitor (MLCC), X7S Capacitor, ceramic, NP0 Capacitor, ceramic, X5R Capacitor, ceramic, X7R Capacitor, ceramic, X7R, general-purpose Capacitor, ceramic, X7R Capacitor, ceramic, X7R Capacitor, ceramic, 2.2 F, 50 V, 10% X7R, 1206 Capacitor, ceramic, X7R, 1206 Capacitor, ceramic, X7R, 1206 Capacitor, ceramic, X7R, general-purpose Capacitor, ceramic, X6S, general-purpose Diode, Schottky, rectifier, surface-mount device (SMD) Diode, TVS, bidirectional Diode, Schottky, small signal LED, SMD, 0603, red LED, SMD, 0603, green Connector, printed circuit board (PCB), two position terminal block header, single-row, 5.08 mm pitch Connector, PCB, three position, male, header, unshrouded, single-row, 2.54 mm pitch Connector, PCB, BERG, male, two position, single-row, M000385 Inductor, shielded power, 12.25 dc resistance, 0.135 A Inductor, shielded power Vertical type receptacle for SDP breakout board Connector, PCB, header, square post, straight, dual-row Terminal block, five position, green Connector, PCB, pin socket Resistor, thick film, chip Resistor, metal film, industrial precision Resistor, thick film, chip Resistor, precision, thick film, chip, R1206 Resistor, precision, thick film, chip Resistor, thin film, chip, high reliability TDK Yageo Taiyo Yuden TDK Yageo Yageo AVX Murata CGA6M3X7S2A475K200AB CC0402JRNPO9BN220 LMK105BJ104KV-F CGA2B3X7R1H104K050BB CC1206KKX7R9BB105 CC0603KRX7R9BB103 0603YC105KAT2A GCM31CR71H225KA55K AVX AVX Murata Murata Diodes Incorporated 12065C154KAT2A 12065C473JAT2A GRM21BZ71H475KE15L GRM188C81C475KE11D BAT46W-7-F STMicroelectronics STMicroelectronics Vishay Lumex Phoenix Contact SMAJ33CA-TR BAT54KFILM TLMS1000-GS08 SML-LX0603GW-TR 1757242 Harwin M20-9990345 Amphenol 69157-102 Coilcraft Inc. XFL2006-104MEB Coilcraft Inc. Hirose LPS4018-473MRB FX8-120S-SV(21) Samtec TSW-108-14-T-D Phoenix Contact Vero Technologies Multicomp Vishay Multicomp Panasonic Panasonic Panasonic 1727049 66-3472 MC0063W060311K CMF5510R000FHEB MC0063W06031100K ERJ-8ENF1004V ERJ-6ENF2103V ERA-6AEB202V Rev. 0 | Page 18 of 20 EVAL-ADFS5758SDZ User Guide Reference Designator R4 R41, R42, R43 R5 R6 R7 R8 R9 R12 R37 S2 T1 TP1, TP2 U1 U2 U4 U5 UG-1688 Description Resistor, precision, thick film, chip Resistor, chip, SMD Resistor, precision, thick film, 0603 Resistor, precision, thick film, R0603 Resistor, film, SMD, 0603 Resistor, thick film, chip Resistor, thin film, precision Resistor, thin film, chip, high reliability Resistor, precision, thin film, chip Switch, tiny, washable, toggle switches Flyback transformer, EPX6, surfacemount transformer (SMT) Connector, PCB test point, green 3-channel, isolated micropower management unit, seven digital isolators IC, 32 kb serial electrically erasable programmable read only memory (EEPROM) Ultralow noise, high accuracy voltage reference 16-bit, current and voltage output DAC, dynamic power control, HART(R) connectivity Manufacturer Panasonic Vishay Panasonic Panasonic Multicomp Vishay TE Connectivity Panasonic TE Connectivity Apem Components Wurth Elektronik Part Number ERJ-1GNF1003C CRCW06030000Z0EA ERJ-3EKF5903V ERJ-3EKF1822V MC0063W0603139K CRCW0603715KFKEA RN73C1J13K7BTG ERA-6AEB202V CPF0603B20RE1 TL39P0050 750316743 Vero Technologies Analog Devices 20-313138 ADP1031ACPZ-1-R7 Microchip Technology 24LC32A/SN Analog Devices ADR4525BRZ Analog Devices ADFS5758BCPZ-RL7 Table 6. Bill of Materials (Uninserted Components) Reference Designator C18 C27 R19, R32, R35 R36 Description Capacitor, ceramic, X7R Capacitor, ceramic, X7R, general-purpose Resistor, thick film, chip Resistor, precision, thick film, chip Rev. 0 | Page 19 of 20 Manufacturer Yageo Murata Multicomp Panasonic Part Number CC0603KRX7R9BB103 GRM188R71A225KE15D MC0063W06031100K ERJ-6ENF2000V UG-1688 EVAL-ADFS5758SDZ User Guide NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. 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