TL/F/10265
100364 Low Power 16-Input Multiplexer
July 1992
100364
Low Power 16-Input Multiplexer
General Description
The 100364 is a 16-input multiplexer. Data paths are con-
trolled by four Select lines (S0–S3). Their decoding is shown
in the truth table. Output data polarity is the same as the
seleted input data. All inputs have 50 kXpulldown resistors.
Features
Y35% power reduction of the 100164
Y2000V ESD protection
YPin/function compatible with 100164
YVoltage compensated operating range
eb
4.2V to b5.7V
YAvailable to industrial grade temperature range
YAvailable to MIL-STD-883
Logic Symbol
TL/F/10265–1
Pin Names Description
I0–I15 Data Inputs
S0–S3Select Inputs
Z Data Output
Connection Diagrams
24-Pin DIP
TL/F/10265–2
28-Pin PCC
TL/F/10265–4
24-Pin Quad Cerpak
TL/F/10265–3
C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
Logic Diagram
TL/F/10265–5
Truth Table
Select Inputs Output
S0S1S2S3Z
LLLL I
0
HLLL I
1
LHLL I
2
HHL L I
3
LLHL I
4
HLHL I
5
LHHL I
6
HHHL I
7
LLLH I
8
HLLH I
9
LHLH I
10
HHLH I
11
LLHH I
12
HLHH I
13
LHHH I
14
HHHH I
15
HeHIGH Voltage Level
LeLOW Voltage Level
2
Absolute Maximum Ratings
Above which the useful life may be impaired (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature (TSTG)b65§Ctoa
150§C
Maximum Junction Temperature (TJ)
Ceramic a175§C
Plastic a150§C
Pin Potential to
Ground Pin (VEE)b7.0V to a0.5V
Input Voltage (DC) VEE to a0.5V
Output Current
(DC Output HIGH) b50 mA
ESD (Note 2) t2000V
Note 1: Absolute maximum ratings are those values beyond which the de-
vice may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Recommended Operating
Conditions
Case Temperature (TC)
Commercial 0§Ctoa
85§C
Industrial b40§Ctoa
85§C
Military b55§Ctoa
125§C
Supply Voltage (VEE)b5.7V to b4.2V
Commercial Version
DC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, TCe0§Ctoa
85§C (Note 3)
Symbol Parameter Min Typ Max Units Conditions
VOH Output HIGH Voltage b1025 b955 b870 mV VIN eVIH (Max) Loading with
VOL Output LOW Voltage b1830 b1705 b1620 mV or VIL (Min) 50Xto b2.0V
VOHC Output HIGH Voltage b1035 mV VIN eVIH (Min) Loading with
VOLC Output LOW Voltage b1610 mV or VIL (Max) 50Xto b2.0V
VIH Input HIGH Voltage b1165 b870 mV Guaranteed HIGH Signal
for All Inputs
VIL Input LOW Voltage b1830 b1475 mV Guaranteed LOW Signal
for All Inputs
IIL Input LOW Current 0.5 mAV
IN eVIL (Min)
IIH Input HIGH Current 300 mAV
IN eVIH (Max)
IEE Power Supply Current b89 b45 mA Inputs Open
Note 3: The specified limits represent the ‘‘worst case’’ value for the parameter. Since these values normally occur at the temperature extremes, additional noise
immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to
guarantee operate under ‘‘worst case’’ conditions.
DIP AC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND
Symbol Parameter TCe0§CT
C
ea
25§CT
C
ea
85§CUnits Conditions
Min Max Min Max Min Max
tPLH Propagation Delay 0.90 2.00 0.90 2.00 0.90 2.10 ns
tPHL I0–I15 to Output
tPLH Propagation Delay 1.40 2.80 1.40 2.80 1.50 2.90 ns
tPHL S0,S
1to Output
Figures 1, 2
tPLH Propagation Delay 1.00 2.20 1.00 2.20 1.10 2.40 ns
tPHL S2,S
3to Output
tTLH Transition Time 0.35 1.20 0.35 1.20 0.35 1.20 ns
tTHL 20% to 80%, 80% to 20%
3
Commercial Version (Continued)
PCC and Cerpak AC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND
Symbol Parameter TCe0§CT
C
ea
25§CT
C
ea
85§CUnits Conditions
Min Max Min Max Min Max
tPLH Propagation Delay 0.90 1.80 0.90 1.80 0.90 1.90 ns
tPHL I0–I15 to Output
tPLH Propagation Delay 1.40 2.60 1.40 2.60 1.50 2.70 ns
tPHL S0,S
1to Output
Figures 1, 2
tPLH Propagation Delay 1.00 2.00 1.00 2.00 1.10 2.20 ns
tPHL S2,S
3to Output
tTLH Transition Time 0.35 1.10 0.35 1.10 0.35 1.10 ns
tTHL 20% to 80%, 80% to 20%
Industrial Version
PCC DC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, TCeb
40§Ctoa
85§C (Note 3)
Symbol Parameter TCeb
40§CT
C
e
0
§
Ctoa
85§CUnits Conditions
Min Max Min Max
VOH Output HIGH Voltage b1085 b870 b1025 b870 mV VIN eVIH (Max) Loading with
VOL Output LOW Voltage b1830 b1575 b1830 b1620 mV or VIL (Min) 50Xto b2.0V
VOHC Output HIGH Voltage b1095 b1035 mV VIN eVIH (Min) Loading with
VOLC Output LOW Voltage b1565 b1610 mV or VIL (Max) 50Xto b2.0V
VIH Input HIGH Voltage b1170 b870 b1165 b870 mV Guaranteed HIGH Signal for All Inputs
VIL Input LOW Voltage b1830 b1480 b1830 b1475 mV Guaranteed LOW Signal for All Inputs
IIL Input LOW Current 0.5 0.5 mAV
IN eVIL (Min)
IIH Input HIGH Current 325 325 mAV
IN eVIH (Max)
IEE Power Supply Current b89 b45 b89 b45 mA Inputs Open
Note 1: Absolute maximum ratings are those values beyond which the device may be damaged or have its useful life imparied. Functional operation under these
conditions is not implied.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Note 3: The specified limits represent the ‘‘worst case’’ value for the parameter. Since these values normally occur at the temperature extremes, additional noise
immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to
guarantee operation under ‘‘worst case’’ conditions.
4
Industrial Version (Continued)
PCC AC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND
Symbol Parameter TCeb
40§CT
C
ea
25§CT
C
ea
85§CUnits Conditions
Min Max Min Max Min Max
tPLH Propagation Delay 0.90 1.80 0.90 1.80 0.90 1.90 ns
Figures 1, 2
tPHL I0–I15 to Output
tPLH Propagation Delay 1.20 2.60 1.40 2.60 1.50 2.70 ns
tPHL S0,S
1to Output
tPLH Propagation Delay 0.80 2.10 1.00 2.00 1.10 2.20 ns
tPHL S2,S
3to Output
tTLH Transition Time 0.20 1.20 0.35 1.10 0.35 1.10 ns
tTHL 20% to 80%, 80% to 20%
Military Version
DC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND, TCeb
55§Ctoa
125§C
Symbol Parameter Min Max Units TCConditions Notes
VOH Output HIGH Voltage b1025 b870 mV 0§Cto V
IN eVIH (Max) Loading with 1, 2, 3
a125§CorV
IL (Min) 50Xto b2.0V
b1085 b870 mV b55§C
VOL Output LOW Voltage b1830 b1620 mV 0§Cto
a
125§C
b1830 b1555 mV b55§C
VOHC Output HIGH Voltage b1035 mV 0§Cto V
IN eVIH (Min) Loading with 1, 2, 3
a125§CorV
IL (Max) 50Xto b2.0V
b1085 mV b55§C
VOLC Output LOW Voltage b1610 mV 0§Cto
a
125§C
b1555 mV b55§C
VIH Input HIGH Voltage b1165 b870 mV b55§C to Guaranteed HIGH Signal 1, 2, 3, 4
a125§C for All Inputs
VIL Input LOW Voltage b1830 b1475 mV b55§C to Guaranteed LOW Signal 1, 2, 3, 4
a125§C for All Inputs
IIL Input LOW Current 0.50 mAb55§Cto V
EE eb
4.2V 1, 2, 3
a125§CV
IN eVIL (Min)
IIH Input HIGH Current 300 mA0§Cto V
EE eb
5.7V 1, 2, 3
a125§CV
IN eVIH (Max)
450 mAb55§C
IEE Power Supply Current b95 b35 mA b55§C to Inputs Open 1, 2, 3
a125§C
Note 1: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals b55§C), then testing
immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides ‘‘cold start’’ specs which can be
considered a worst case condition at cold temperatures.
Note 2: Screen tested 100% on each device at b55§C, a25§C, and a125§C, Subgroups, 1, 2, 3, 7 and 8.
Note 3: Sampled tested (Method 5005, Table I) on each manufactured lot at b55§C, a25§C, and a125§C, Subgroups A1, 2, 3, 7 and 8.
Note 4: Guaranteed by applying specified input condition and testing VOH/VOL.
5
Military Version (Continued)
AC Electrical Characteristics
VEE eb
4.2V to b5.7V, VCC eVCCA eGND
Symbol Parameter TCeb
55§CT
C
e
25§CT
C
ea
125§CUnits Conditions Notes
Min Max Min Max Min Max
tPLH Propagation Delay 0.50 2.60 0.60 2.40 0.60 2.80 ns
Figures 1, 2
1, 2, 3
tPHL I0–I15 to Output
tPLH Propagation Delay 0.70 3.30 0.90 3.10 1.00 3.50 ns
tPHL S0,S
1to Output
tPLH Propagation Delay 0.50 2.90 0.70 2.60 0.60 3.00 ns
tPHL S2,S
3to Output
tTLH Transition Time 0.20 1.20 0.20 1.20 0.20 1.20 ns 4
tTHL 20% to 80%, 80% to 20%
Note 1: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals b55§C), then testing
immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides ‘‘cold start’’ specs which can be
considered a worst case condition at cold temperatures.
Note 2: Screen tested 100% on each device at a25§C, temperature only, Subgroup A9.
Note 3: Sample tested (Method 5005, Table I) on each Mfg. lot at a25§C, Subgroup A9, and at a125§C, and b55§C temp., Subgroups A10 and A11.
Note 4: Not tested at a25§C, a125§C and b55§C temperature (design characterization data).
Test Circuit
TL/F/10265–6
FIGURE 1. AC Test Circuit
6
Switching Waveforms
TL/F/10265–7
FIGURE 2. Propagation Delay and Transition Times
Notes:
VCC,V
CCA ea
2V, VEE eb
2.5V
L1 and L2 eEqual length 50Ximpedance lines
RTe50Xterminator internal to scope
Decoupling 0.1 mF from GND to VCC and VEE
All unused outputs are loaded with 50Xto GND
CLeFixture and stray capacitance s3pF
Pin numbers shown are for flatpak; for DIP see logic symbol
Ordering Information
The device number is used to form part of a simplified purchasing code where a package type and temperature range are
defined as follows:
100364 D C QB
Device Type Special Variation
(Basic) QB eMilitary grade device with environmental
and burn-in processing
Package Code
DeCeramic DIP Temperature Range
FeQuad Cerpak C eCommercial (0§Ctoa
85§C)
PePlastic DIP I eIndustrial (b40§Ctoa
85§C) (PCC only)
QePlastic Leaded Chip Carrier (PCC) M eMilitary (b55§Ctoa
125§C)
7
Physical Dimensions inches (millimeters)
24-Lead Ceramic Dual-In-Line Package (0.400×Wide) (D)
NS Package Number J24E
8
Physical Dimensions inches (millimeters) (Continued)
24-Lead Plastic Dual-In-Line Package (P)
NS Package Number N24E
28-Lead Plastic Chip Carrier (Q)
NS Package Number V28A
9
100364 Low Power 16-Input Multiplexer
Physical Dimensions inches (millimeters) (Continued) Lit.Ý114925
24-Lead Quad Cerpak (F)
NS Package Number W24B
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SEMICONDUCTOR CORPORATION. As used herein:
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systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.
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