PD - 95148 Advanced Process Technology Ultra Low On-Resistance l Dynamic dv/dt Rating l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated l Lead-Free Description IRL1404SPbF IRL1404LPbF l HEXFET(R) Power MOSFET l D VDSS = 40V RDS(on) = 0.004 G Seventh Generation HEXFET(R) power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. ID = 160A S The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible onresistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRL1404L) is available for low- D2Pak IRL1404S TO-262 IRL1404L Absolute Maximum Ratings Parameter ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Max. Units 160 110 640 3.8 200 1.3 20 520 95 20 5.0 -55 to + 175 A W W W/C V mJ A mJ V/ns C 300 (1.6mm from case) Thermal Resistance RJC RCS RJA www.irf.com Parameter Typ. Max. Units Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient (PCB Mounted) --- 0.50 --- 0.75 --- 40 C/W 1 04/19/04 IRL1404S/LPbF Electrical Characteristics @ TJ = 25C (unless otherwise specified) RDS(on) Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance VGS(th) gfs Gate Threshold Voltage Forward Transconductance IDSS Drain-to-Source Leakage Current V(BR)DSS V(BR)DSS/TJ Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time LD Internal Drain Inductance LS Internal Source Inductance Ciss Coss Crss Coss Coss Coss eff. Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance IGSS Min. Typ. Max. Units Conditions 40 --- --- V VGS = 0V, ID = 250A --- 0.038 --- V/C Reference to 25C, D = 1mA --- --- 0.004 VGS = 10V, ID = 95A 0.0059 VGS = 4.3V, ID = 40A 1.0 --- 3.0 V VDS = VGS, ID = 250A 93 --- --- S VDS = 25V, ID = 95A --- --- 20 VDS = 40V, VGS = 0V A --- --- 250 VDS = 32V, VGS = 0V, TJ = 150C --- --- 200 VGS = 20V nA --- --- -200 VGS = -20V --- --- 140 ID = 95A --- --- 48 nC VDS = 32V --- --- 60 VGS = 5.0V, See Fig. 6 --- 18 --- VDD = 20V ns --- 270 --- ID = 95A --- 38 --- RG = 2.5 VGS = 4.5V --- 130 --- RD = 0.25 D Between lead, 4.5 --- nH --- 6mm (0.25in.) G from package 7.5 --- --- and center of die contact S --- 6600 --- VGS = 0V --- 1700 --- pF VDS = 25V --- 350 --- = 1.0MHz, See Fig. 5 --- 6700 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- 1500 --- VGS = 0V, VDS = 32V, = 1.0MHz --- 1500 --- VGS = 0V, VDS = 0V to 32V Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton 2 Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol --- --- 160 showing the A G integral reverse --- --- 640 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 95A, VGS = 0V --- 63 94 ns TJ = 25C, IF = 95A --- 170 250 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRL1404S/LPbF 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.3V I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) 4.3V 100 20s PULSE WIDTH T = 25 C J 10 0.1 1 10 2.5 TJ = 175 C V DS = 15V 20s PULSE WIDTH VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 8.0 R DS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) TJ = 25 C 7.0 10 100 Fig 2. Typical Output Characteristics 1000 6.0 J 1 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 5.0 20s PULSE WIDTH T = 175 C 10 0.1 100 4.3V 100 VDS , Drain-to-Source Voltage (V) 100 4.0 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.3V TOP TOP ID = 160A 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRL1404S/LPbF VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd 8000 C, Capacitance (pF) Ciss 6000 4000 Coss 2000 20 VGS , Gate-to-Source Voltage (V) 10000 1 10 VDS = 32V VDS = 20V 16 12 8 4 C rss 0 ID = 95A 0 100 FOR TEST CIRCUIT SEE FIGURE 13 0 100 VDS , Drain-to-Source Voltage (V) 200 300 400 500 QG , Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 1000 10000 OPERATION IN THIS AREA LIMITED BY R 100 I D , Drain Current (A) ISD , Reverse Drain Current (A) DS(on) 1000 TJ = 175 C 10 V GS = 0 V 0.5 1.0 1.5 2.0 2.5 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 100us 100 TJ = 25 C 1 0.0 10us 3.0 1ms 10 TC = 25 C TJ = 175 C Single Pulse 1 10ms 10 100 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRL1404S/LPbF 160 VGS 120 I D , Drain Current (A) RD VDS LIMITED BY PACKAGE RG D.U.T. + -VDD 10V 80 Pulse Width 1 s Duty Factor 0.1 % 40 VDS 90% 0 25 50 75 100 125 TC , Case Temperature 150 175 ( C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf 1 Thermal Response (Z thJC ) D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 0.001 0.00001 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRL1404S/LPbF 20V + V - DD IA S tp 0 .0 1 Fig 12a. Unclamped Inductive Test Circuit V (B R )D SS tp IAS Fig 12b. Unclamped Inductive Waveforms EAS , Single Pulse Avalanche Energy (mJ) D .U .T RG A BOTTOM 800 600 400 200 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature( C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current Current Regulator Same Type as D.U.T. QG 10 V ID 39A 67A 95A TOP 1000 D R IV E R L VDS 1200 1 5V 50K QGS QGD 12V .2F .3F D.U.T. VG + V - DS VGS 3mA Charge IG ID Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform 6 Fig 13b. Gate Charge Test Circuit www.irf.com IRL1404S/LPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T* Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + - - + RG * dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test VGS * + - VDD Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode [VDD] Forward Drop Inductor Curent Ripple 5% [ ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For N-channel HEXFET(R) power MOSFETs www.irf.com 7 IRL1404S/LPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information (Lead-Free) T H I S IS AN IR F 5 30 S WIT H L OT COD E 80 24 AS S E MB L E D ON WW 0 2, 20 00 IN T H E AS S E MB L Y L IN E "L " IN T E R N AT ION AL R E CT IF IE R L OGO N ote: "P " in as s embly line pos ition indicates "L ead-F ree" P AR T N U MB E R F 53 0S AS S E MB L Y L OT COD E D AT E COD E YE AR 0 = 2 00 0 WE E K 02 L IN E L OR INT E R N AT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE 8 P AR T NU MB E R F 530S DAT E CODE P = DE S IGN AT E S L E AD -F R E E P R ODU CT (OPT IONAL ) YE AR 0 = 2 000 WE E K 0 2 A = AS S E MB L Y S IT E CODE www.irf.com IRL1404S/LPbF TO-262 Package Outline TO-262 Part Marking Information E XAMP L E : T H IS IS AN IR L 3103L L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" Note: "P " in as s embly line pos ition indicates "L ead-F ree" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C OR INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE www.irf.com P AR T NU MB E R DAT E CODE P = DE S IGNAT E S L E AD-F R E E P R ODU CT (OP T IONAL ) YE AR 7 = 1997 WE E K 19 A = AS S E MB L Y S IT E CODE 9 IRL1404S/LPbF D2Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TR R 1 .6 0 (.0 63 ) 1 .5 0 (.0 59 ) 4 .10 (.16 1 ) 3 .90 (.15 3 ) F E E D D IR E C TIO N 1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 ) 1 .8 5 (.0 7 3 ) 1 .6 5 (.0 6 5 ) 0 .3 6 8 (.0 1 4 5 ) 0 .3 4 2 (.0 1 3 5 ) 1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 ) 2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 ) TRL 1 0 .9 0 (.4 2 9 ) 1 0 .7 0 (.4 2 1 ) 1 .7 5 (.0 6 9 ) 1 .2 5 (.0 4 9 ) 4 .7 2 (.1 3 6 ) 4 .5 2 (.1 7 8 ) 1 6 .1 0 ( .6 3 4 ) 1 5 .9 0 ( .6 2 6 ) F E E D D IR E C T IO N 1 3 .5 0 (.5 3 2 ) 1 2 .8 0 (.5 0 4 ) 2 7 .4 0 ( 1.0 7 9 ) 2 3 .9 0 ( .9 4 1 ) 4 33 0.00 (14.173) M A X. 60 .0 0 (2 .3 6 2) M IN . N O TES : 1 . C O M F O R M S T O E IA - 41 8 . 2 . C O N T R O LL IN G D IM E N S IO N : M IL L IM E T E R . 3 . D IM E N S IO N M E A S U R E D @ H U B . 4 . IN C L U D E S F L A N G E D IS T O R T IO N @ O U T E R E D G E . Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting TJ = 25C, L = 0.35mH RG = 25, IAS = 95A. (See Figure 12) ISD 95A, di/dt 160A/s, VDD V(BR)DSS, TJ 175C Pulse width 300s; duty cycle 2%. 26.40 (1.039) 24.40 (.961) 3 3 0 .40 ( 1.1 9 7 ) M A X. 4 Calculated continuous current based on maximum allowable junction temperature; for recommended current-handing of the package refer to Design Tip # 93-4. This is applied to D2Pak, When mounted on 1" square PCB (FR-4 or G-10 Material) . For recommended footprint and soldering techniques refer to application note #AN-994. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.04/04 10 www.irf.com Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/