EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 1 of 14 EVB Description
Rev. 005 Feb./03
Features
! Double superhet architecture for high degree of image rejection
! FSK for digital data and FM reception for analog signal transmission
! FSK/FM demodulation with phase-coincidence demodulator
! Low current consumption in active mode and very low standby current
! Switchable LNA gain for improved dynamic range
! RSSI allows signal strength indication and ASK detection
! Surface mount package LQFP32
Ordering Information
Part No.
EVB71102-433-FSK EVB71102-315-FSK
EVB71102-433-ASK EVB71102-315-ASK
Application Examples
! General digital and analog 315 MHz or
433 MHz ISM band usage
! Low-power telemetry
! Alarm and security systems
! Remote Keyless Entry (RKE)
! Tire Pressure Monitoring System (TPMS)
! Garage door openers
! Home automation
! Pagers
Evaluation Board
General Description
The TH71102 FSK/FM/ASK double-conversion superheterodyne receiver IC is designed for applications in
the European 433 MHz industrial-scientific-medical (ISM) band, according to the EN 300 220 telecommuni-
cations standar d. It can also be used for any other system with carrier frequenc ies ranging from 300 MHz to
450 MHz (e.g. for applications in the US 315 MHz ISM band).
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 2 of 14 EVB Description
Rev. 005 Feb./03
Document Content
1 Theory of Operation...................................................................................................3
1.1 General..............................................................................................................................3
1.2 Technical Data Overview...................................................................................................3
1.3 Block Diagram....................................................................................................................4
1.4 Mode Configurations..........................................................................................................4
1.5 LNA GAIN Control..............................................................................................................4
1.6 Frequency Planning...........................................................................................................5
1.6.1 Selected Frequency Plans............................................................................................................5
2 FSK Application Circuits...........................................................................................6
2.1 PCB Top View for FSK Reception......................................................................................7
2.2 Board Component Values for FSK (Fig. 2).........................................................................8
3 ASK Application Circuits...........................................................................................9
3.1 PCB Top View for ASK Reception ...................................................................................10
3.2 Board Component Values for ASK (Fig. 3).......................................................................11
4 Package Dimensions...............................................................................................12
5 Reliability Information .............................................................................................13
6 ESD Precautions......................................................................................................13
7 Disclaimer.................................................................................................................14
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 3 of 14 EVB Description
Rev. 005 Feb./03
1 Theory of Operation
1.1 General
W ith the TH71102 receiver chip, various circuit con-
figurations c an be arranged in order to m eet a num -
ber of dif ferent custom er requirem ents. F or FM/FSK
reception the IF tank used in the phase coincidence
demodulator can be constituted either by a ceramic
resonator or an LC tank (optionally with a varactor
diode to create an AFC circuit). In ASK configura-
tion, the RSSI signal is feed to an ASK detector,
which is constituted by the operational amplifier.
Demodulation Type of receiver
FM / FSK narrow-band RX with
ceramic demodulation tank
FM / FSK wide-band RX with
LC demodulation tank
ASK RX with RSSI-based demodulation
The superheterodyne configuration is double conversion where MIX1 and MIX2 are driven by the internal
local oscillator signals LO1 and LO2, respectively. This allows a high degree of im age rejection, achieved in
conjunc tion with an RF front- end filter. Eff icient RF front-end f iltering is r ealized by using a SAW , ceram ic or
helix filter in front of the LNA and by adding an LC filter at the LNA output.
A single-conversion variant, called TH71101, is also available. Both Receiver ICs have the same die. At the
TH71101 the second mixer MIX2 operates as an amplifier.
The TH71102 receiver IC consists of the following building blocks:
" PLL synthesizer (PLL SYNTH) for generation of the first and second local oscillator signals LO1 and LO2
" Parts of the PLL SYNTH are the high-frequency VCO1, the feedback dividers DIV_8 and DIV_2,
a phase-frequency detector (PFD) with charge pump (CP) and a crystal-based reference oscillator (RO)
" Low-noise amplifier (LNA) for high-sensitivity RF signal reception
" First mixer (MIX1) for down-conversion of the RF signal to the first IF (IF1)
" Second mixer (MIX2) for down-conversion of the IF1 to the second IF (IF2)
" IF amplifier (IFA) to amplify and limit the IF2 signal and for RSSI generation
" Phase coincidence demodulator (DEMOD) with third mixer (MIX3) to demodulate the IF signal
" Operational amplifier (OA) for data slicing, filtering and ASK detection
" Bias circuitry for bandgap biasing and circuit shutdown
1.2 Technical Data Overview
! Input frequency range: 300 MHz to 450 MHz
! Power supply range: 2.3 V to 5.5 V @ ASK
! Temperature range: -40 °C to +85 °C
! Standby current: 50 nA
! Operating current: 6.5 mA at low gain mode
8.2 mA at high gain mode
! Sensitivity: -111 dBm 1) with 40 kHz IF filter BW
! Sensitivity: -104 dBm 2) with 150 kHz IF filter BW
! Range of first IF1: 10 MHz to 80 MHz
! Range of second IF2: 400 kHz to 22 MHz
! Maximum data rate: 80 kbit/s NRZ
! Maximum input level: -10 dBm at ASK
0 dBm at FSK
! Image rejection: > 65 dB (e.g. with SAW
front-end filter and at 10.7 MHz IF2)
! Spurious emission: < -70 dBm
! Input frequency acceptance: ±50 kHz
(with AFC option)
! RSSI range: 70 dB
! Frequency deviation range: ±4 kHz to ±120 kHz
! Maximum analog modulation frequency: 15 kHz
1) at ± 8 kHz FSK deviation, BER = 310-3, phase-coincidence demodulation and SAW front-end filter loss
2) at ± 50 kHz FSK deviation, BER = 310-3, phase-coincidence demodulation and SAW front-end filter loss
For more detailed information, please refer to the latest TH71102 data sheet revision.
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 4 of 14 EVB Description
Rev. 005 Feb./03
1.3 Block Diagram
Fig. 1: TH71102 block diagram
1.4 Mode Configurations
ENRX Mode Description
0 RX standby RX disabled
1 RX active RX enable
Note: ENRX are pulled down internally
1.5 LNA GAIN Control
VGAIN_LNA Mode Description
< 0.8 V HIGH GAIN LNA set to high gain
> 1.4 V LOW GAIN LNA set to low gain
Note: hysteresis between gain modes to ensure stability
IN_LNA
LNA MIX1 IFA
GAIN_LNA
OUT_LNA
FPC2
RSSI
OUT_IFA
IN_DEM
OUTP
OUTN
MIX3
21932
31
1
VEE_LNAC
5
VEE_MIX
32
VCC_LNA
30
VEE_LNA
IN_MIX1
4
VCC_MIX
813 15 16
ROLF
26
VCO1 RO
PFD
29
24
23
VCC_PLL
27
BIAS
28
ENRX
17
VCC_BIAS
22
VEE_BIAS
25
VEE_RO
14
OUT_MIX2
IN_IFA
11
VEE_IF
10
FBC1
12
OAP
OAN
19
20
18
OUT_OA
OA
IF1P
IF1N
76
MIX2
IF1 IF2
DIV_8 DIV_2
LO1 LO2
CP
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 5 of 14 EVB Description
Rev. 005 Feb./03
1.6 Frequency Planning
Frequency planning is straightforward for single-conversion applications because there is only one IF that
might be c hosen, and then the only possible choic e is low-side or high- side injection of the LO signal (which
is now the one and only LO signal in the receiver).
The receiver’s double-conversion architecture requires careful frequency planning. Besides the desired RF
input signal, there are a number of spurious signals that may cause an undesired response at the output.
Among them are the image of the RF signal (that must be suppressed by the RF front-end filter), spurious
signals injec ted to the firs t IF (IF 1) and their im ages which could be m ixed down to the sam e second IF (IF2)
as the desired RF signal (they must be suppressed by the LC filter at IF1 and/or by low-crosstalk design).
By configuring the TH71102 for double conversion and using its internal PLL s ynthesizer with fixed f eedback
divider ratios of N1 = 8 (DIV_8) and N2 = 2 (DIV_2), four types of down-conversion are possible: low-side
injection of LO1 and LO2 (low-low), LO1 low-side and LO2 high-side (low-high), LO1 high-side and LO2
low-side (high-low) or LO1 and LO2 high-side (high-high). T he following table sum m arizes some equations
that are useful to calculate the crystal reference f requency (REF), the first IF (IF1) and the VCO1 or f irst LO
frequency (LO1), respectively, for a given RF and second IF (IF2).
Injection type high-high low-low high-low low-high
REF (RF – IF2)/14 (RF – IF2)/18 (RF + IF2)/14 (RF + IF2)/18
LO1 16REF 16REF 16REF 16REF
IF1 LO1 – RF RF – LO1 LO1 – RF RF – LO1
LO2 2REF 2REF 2REF 2REF
IF2 LO2 – IF1 IF1 – LO2 IF1 – LO2 LO2 – IF1
1.6.1 Selected Frequency Plans
The following table depicts crystal, LO and image signals considering the examples of 315 MHz and
433.92 MHz RF reception at IF2 = 10.7 MHz.
Signal type RF =
315
MHz
RF =
315
MHz
RF =
315
MHz
RF =
315.92
MHz
RF =
433.92
MHz
RF =
433.92
MHz
RF =
433.92
MHz
RF =
433.92
MHz
Injection type high-high low-low high-low low-high high-high low-low high-low low-high
REF / MHz 21.73571 16.90556 23.26429 18.09444 30.23000 23.51222 31.75857 24.70111
LO1 / MHz 347.77143 270.48889 372.22857 289.51111 483.68000 376.19556 508.13714 395.21778
IF1 / MHz 32.77143 44.51111 57.22857 25.48889 49.76000 57.72444 74.21714 38.70222
LO2 / MHz 43.47143 33.81111 46.52857 36.18889 60.46000 47.02444 63.51714 49.40222
RF image/MHz 380.54286 225.97778 429.45714 264.02222 533.44000 318.47112 582.35428 356.51556
IF1 image/MHz 54.17143 23.11111 35.82857 46.88889 71.16000 36.32444 52.81717 60.10222
The selection of the reference crystal frequency is based on som e assumptions. As for exam ple: the first IF
and the image frequencies should not be in a radio band where strong interfering signals might occur
(because they could represent par asitic r eceiving signals ), the LO1 s ignal should be in the range of 300 MHz
to 450 MHz (because this is the optimum frequency range of the VCO1). Furthermore the first IF should be
as high as possible to achieve highest RF im age rej ec tion. The columns in bold depic t the s elect ed f requenc y
plans to receive at 315 MHz and 433.92 MHz, respectively.
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 6 of 14 EVB Description
Rev. 005 Feb./03
2 FSK Application Circuits
Fig. 2: Circuit diagram for FSK reception
C13
C12
CP
C9 C11
C10
R2
CERFIL
CB2
L3
CB8 CB7
C7 C8
C6
CERRES
CB3
OUTP
VEE
OUT_LNA
IN_MIX1
VEE
IF1P
IF1N
VCC
GAIN_LNA
VEE
OUT_MIX2
IN_IFA
FBC1
FBC2
VCC
OUT_IFA
LF
VEE
IN_LNA
VCC
VEE
ENRX
VCC
VCC
VEE
OAP
OAN
OUT_OA
RSSI
32
31
30
29
28
27
26
25
17
18
19
20
21
22
23
24
9
10
11
12
13
14
15
16
81234567
RO
TH71102
VCC
VCC
VCC
VCC
R_Q
L_OPT
C_OPT
C2
C3
R1
CB5
XTAL C1
C15 C16C14
C_RO
12
RO
GND
12
VCC
GND
ENRX
VCC
12
OUTN
GND
12
OUTP
GND
12
RSSI
GND
12
OUT_OA
GND
12
C5
L2
L1
C4
IN_LNA
SAWFIL
FSK output
CB1
L4 L5
CB4
CB6
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 7 of 14 EVB Description
Rev. 005 Feb./03
2.1 PCB Top View for FSK Reception
Board layout data in Gerber format is available
C1
C_RO
R_Q
XTAL
Melexis
TH7111xx
Evaluation Board
TH711xx_ev03_EB_11/00_B
OUTN
RO
ENRX
IN_LNA
VCC
VCC
OUTP
RSSI
OUT_OA
CB7
C10
R2
CP
C14
C15
C11
CERFIL
CB5
C16
CB4
CB3
CB2
CB1
C12
C13
CERRES
C2
C3
R1
L1
C4
L2
C5
C7 C8
L3
C6
L5
L4
CB8
0
0
0
0
RF_input
TH71102
81
16
1724
25
32 9
CB6
L_OPT
C_OPT
SAWFIL
23
56 7
1
C9
Board size is 44mm x 54mm
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 8 of 14 EVB Description
Rev. 005 Feb./03
2.2 Board Component Values for FSK (Fig. 2)
Part Size Value
@ 315 MHz
Value
@ 433.92 MHz Tolerance Description
C1 0805 15 pF 15 pF ±10% cryst al series capacitor
C2 0805 NIP NIP ±10% optional loop f i l ter capaci t or
C3 0805 1 nF 1 nF ±10% loop filter capaci t or
C4 0603 NIP 3.3 pF ±5% capacitor to m atch to S A W filter i nput
C5 0603 NIP 3.3 pF ±5% capacitor to m atch to S A W filter output
C6 0603 5.6 pF 4.7 pF ±5% LNA output t ank capaci t or
C7 0603 4.7 pF 2.2 pF ±5% MIX1 input matc hi ng capacitor
C8 0603 27 pF 27 pF ±5% IF1 tank capacitor
C9 0805 33 nF 33 nF ±10% IFA f eedback capacitor
C10 0603 1 nF 1 nF ±10% IFA f eedback capacitor
C11 0603 1 nF 1 nF ±10% IFA f eedback capacitor
C12 0603 1.5 pF 1.5 pF ±5% DEMOD phase-shift capacitor
C13 0603 680 pF 680 pF ±10% DE MOD c oupl i ng capacit or
CP 0805 10 – 12 pF 10 – 12 pF ±5% CERRES tuning capac i t or
C14 0805 10 – 47 pF 10 – 47 pF ±5% demodulator output low-pass capacitor,
depending on data rate
C15 0805 10 – 47 pF 10 – 47 pF ±5% demodulator output low-pass capacitor,
depending on data rate
C16 0603 1.5 nF 1.5 nF ±10% RSSI output low-pass c apacitor
CB1 to CB 5
CB7 to CB 8 0603 330 pF 330 pF ±10% blocking c apacitor for VCC
CB6 0805 33 nF 33 nF ±10% blocki ng capacit or f or VCC
R1 0805 10 k10 kΩ±10% loop filter resistor
R2 0805 390 390 Ω±5% CERFIL output mat ching resistor
L1 0603 56 nH 33 nH ±5% inductor to match S A W filter
L2 0603 56 nH 33 nH ±5% inductor to match S A W filter
L3 0603 22 nH 15 nH ±5% LNA output tank i nductor
L4 0805 100 nH 100 nH ±5% IF1 tank i nductor
L5 0805 100 nH 100 nH ±5% IF1 tank i nductor
L_OPT 1006 NIP NIP ±5% demodulator phas e shift i nductor, only
required at FSK/FM with LC resonator
C_OPT 3mm NIP NIP ±5% demodul ator phase shi f t capaci t or, only
required at FSK/FM with LC resonator
R_Q 0805 NIP NIP ±5% optional l ower-Q resistor, only
required at FSK/FM with LC resonator
C_RO 0805 330 pF 330 pF ±5% optional capaci tor
to couple external RO signal
XTAL HC49
SMD 23.26429 MHz @
RF = 315 MHz 23.51222 MHz @
RF = 433.92 MHz ±25ppm c al i br.
±30ppm t emp. fundament al -mode crystal, C load = 10 pF
to 15pF, C0, max = 7 pF, Rm, max = 50
B3555
(f0 = 433.92 MHz) B3dB = 860 kHz
±100 kHz
SAWFIL QCC8C
B3551
(f0 = 315.00 MHz) B3dB = 900 kHz
±175 kHz
low-loss SAW filter from EPCOS
Leaded
type SFE10.7MFP
@ BIF2 = 40 kHz SFE10.7MFP
@ BIF2 = 40 kHz TBD
CERFIL
SMD
type SFECV10.7MJS-A
@ BIF2 = 150 kHz SFECV10.7MJS-A
@ BIF2 = 150 kHz ±40 k Hz
ceramic filter from Murata
CERRES SMD type CDACV10.7MG18-A
Murata CDACV10.7MG18-A
Murata ceramic demodulator t ank, not required
at FSK/FM with LC resonator
NIP – not in place, may be used optionally
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 9 of 14 EVB Description
Rev. 005 Feb./03
3 ASK Application Circuits
Fig. 3: Circuit diagram for ASK reception
C9 C11
C10
R2
CERFIL
CB2
L3
CB8 CB6
C7 C8
C6
CB4
OUTP
VEE
OUT_LNA
IN_MIX1
VEE
IF1P
IF1N
VCC
GAIN_LNA
VEE
OUT_MIX2
IN_IFA
FBC1
FBC2
VCC
OUT_IFA
LF
VEE
IN_LNA
VCC
VEE
ENRX
VCC
VCC
VEE
OAP
OAN
OUT_OA
RSSI
32
31
30
29
28
27
26
25
17
18
19
20
21
22
23
24
9
10
11
12
13
14
15
16
81234567
RO
TH71102
VCC
VCC
VCC
VCC
C2
C3
R1
CB1
XTAL C1
C12
R3
ASK output
C13
C_RO
12
RO
GND
12
VCC
GND
ENRX
VCC
12
OUTN
GND
12
OUTP
GND
12
RSSI
GND
12
OUT_OA
GND
12
C5
L2
L1
C4
IN_LNA
SAWFIL
L4 L5
CB3
CB5
CB7
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 10 of 14 EVB Description
Rev. 005 Feb./03
3.1 PCB Top View for ASK Reception
Board layout data in Gerber format is available
C1
C_RO
XTAL
Melexis
TH7111xx
Evaluation Board
TH711xx_ev03_EB_11/00_B
OUTN
RO
ENRX
VCC
VCC
OUTP
RSSI
OUT_OA
CB7
C10
R2
C12
C11
CERFIL
C9
CB5
CB4
CB3
CB2
CB1
C2
C3
R1
L1
C4
L2
C5
C7
L3
C6
CB8
RF_input
81
16
1724
25
32 9
CB6
R3
0
IN_LNA
SAWFIL
23
56 7
1
0
C13
Board size is 44mm x 54mm
L5
L4
C8
TH71102
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 11 of 14 EVB Description
Rev. 005 Feb./03
3.2 Board Component Values for ASK (Fig. 3)
Part Size Value
@ 315 MHz
Value
@ 433.92 MHz Tolerance Description
C1 0805 15 pF 15 pF ±10% cryst al series capacitor
C2 0805 NIP NIP ±10% optional loop f i l ter capaci t or
C3 0805 1 nF 1 nF ±10% loop filter capaci t or
C4 0603 NIP 3.3 pF ±5% capacitor to m atch to S A W filter i nput
C5 0603 NIP 3.3 pF ±5% capacitor to m atch to S A W filter output
C6 0603 5,6 pF 4.7 pF ±5% LNA output t ank capaci t or
C7 0603 4.7 pF 2.2 pF ±5% MIX1 input matc hi ng capacitor
C8 0603 27 pF 27 pF ±5% IF1 tank capacitor
C9 0805 33 nF 33 nF ±10% IFA f eedback capacitor
C10 0603 1 nF 1 nF ±10% IFA f eedback capacitor
C11 0603 1 nF 1 nF ±10% IFA f eedback capacitor
C12 0805 1 nF to 100 nF 1 nF to 100 nF ±10% ASK dat a slicer capacitor, depending on
data rate
C13 0603 1.5 nF 1.5 nF ±10% RSSI output low-pass c apacitor
CB1 to CB 5
CB7 to CB 8 0603 330 pF 330 pF ±10% blocking c apacitor for VCC
CB6 0805 33 nF 33 nF ±10% blocki ng capacit or f or VCC
R1 0805 10 k10 kΩ±10% loop filter resistor
R2 0805 390 390 Ω±5% CERFIL output mat ching resistor
R3 0603 100 k100 kΩ±5% ASK data slicer resis t or, depending on
data rate
L1 0603 56 nH 33 nH ±5% inductor to match S A W filter
L2 0603 56 nH 33 nH ±5% inductor to match S A W filter
L3 0603 22 nH 15 nH ±5% LNA output tank i nductor
L4 0805 100 nH 100 nH ±5% IF1 tank i nductor
L5 0805 100 nH 100 nH ±5% IF1 tank i nductor
C_RO 0805 330 pF 330 pF ±5% optional capaci tor
to couple external RO signal
XTAL HC49
SMD 23.26429 MHz
@ RF = 315 MHz 23.51222 MHz @
RF = 433.92 MHz ±25ppm c al i br.
±30ppm t emp. fundament al -mode crystal, C load = 10 pF
to 15pF, C0, max = 7 pF, Rm, max = 50
B3555
(f0 = 433.92 MHz) B3dB = 860 kHz
±100 kHz
SAWFIL QCC8C
B3551
(f0 = 315.00 MHz) B3dB = 900 kHz
±175 kHz
low-loss SAW filters from EPCOS
Leaded
type SFE10.7MFP
@ BIF2 = 40 kHz SFE10.7MFP
@ BIF2 = 40 kHz TBD
CERFIL
SMD
type SFECV10.7MJS-A
@ BIF2 = 150 kHz SFECV10.7MJS-A
@ BIF2 = 150 kHz ±40 k Hz
ceramic filters from Murata
NIP – not in place, may be used optionally
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 12 of 14 EVB Description
Rev. 005 Feb./03
4 Package Dimensions
Fig. 4: LQFP32 (Low profile Quad Flat Package)
All Dimension in mm, coplanaríty < 0.1mm
E1, D1 E, D AA1 A2 e b c L α
αα
α
min 1.40 0.05 1.35 0.30 0.09 0.45
max 7.00 9.00 1.60 0.15 1.45 0.8 0.45 0.20 0.75
All Dimension in inch, coplanaríty < 0.004”
min 0.055 0.002 0.053 0.012 0.0035 0.018
max 0.276 0.354 0.063 0.006 0.057 0.031 0.018 0.0079 0.030
1
32
25
17
24
8
9
16
D
D1
E1 e
b
E
A2
A
A1
L
c0.25
(0.0098)
12°
+
12°
+
.10 (.004)
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 13 of 14 EVB Description
Rev. 005 Feb./03
5 Reliability Information
Melexis devices are clas sif ied and qualified regar ding suitability for infr ared, vapor phas e and wave solder ing
with usual (63/37 SnPb-) solder (melting point at 183degC).
The following test methods are applied:
IPC/JEDEC J-STD-020A (issue April 1999)
Moisture/Reflow Sensitivity Classification For Nonhermetic Solid State Surface Mount Devices
CECC00802 (issue 1994)
Standard Method For The Specification of Surface Mounting Components (SMDs) of Assessed Quality
MIL 883 Method 2003 / JEDEC-STD-22 Test Method B102
Solderability
For all soldering technologies deviating from above mentioned standard conditions (regarding peak tem-
perature, temperature gradient, temperature profile etc) additional classification and qualification tests have to
be agreed upon with Melexis.
The application of Wave Soldering fo r SMD’s is allowed only after consulting Melexis regarding ass urance of
adhesive strength between device and board.
For more information on manufacturability/solderability see quality page at our website:
http://www.melexis.com/
6 ESD Precautions
Electronic semiconductor products are sensitive to Electro Static Discharge (ESD).
Always observe Electro Static Discharge control procedures whenever handling semiconductor products.
EVB71102
315/433MHz Receiver
Evaluation Board Description
390107110201 Page 14 of 14 EVB Description
Rev. 005 Feb./03
7 Disclaimer
Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its
Term of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the infor-
mation set forth herein or regarding the f reedom of the described devices from patent infringement. Melexis
reserves the right to change specifications and prices at any time and without notice. T herefore, prior to de-
signing this produc t into a sys tem, it is nec essary to check with Melexis f or current inform ation. This product
is intended for use in normal commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or
life-s us taining equipment are s pec if ic ally not recom mended without additional proc es s ing by Melexis for eac h
application.
The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not be
liable to recipient or any third party for any damages, including but not limited to personal injury, property
damage, los s of prof its, loss of us e, interrupt of busines s or indir ect, spec ial incidental or c onsequential dam -
ages, of any kind, in connection with or arising out of the f urnishing, per form anc e or use of the technic al data
herein. No obligation or liability to recipient or any third party shall arise or flow out of Melexis’ rendering of
technical or other services.
© 2002 Melexis NV. All rights reserved.
For the latest version of this document. Go to our website at
www.melexis.com
Or for additional information contact Melexis Direct:
Europe and Japan: All other locations:
Phone: +32 1367 0495 Phone: +1 603 223 2362
E-mail: sales_europe@melexis.com E-mail: sales_usa@melexis.com
QS9000, VDA6.1 and ISO14001 Certified