VN750PEP-E High side driver Features Type RDS(on) IOUT VCC VN750PEP-E 60 m 6A 36 V PowerSSO-12 ECOPACK(R) : lead free and RoHS compliant Automotive Grade: compliance with AEC guidelines CMOS compatible input On-state open-load detection Off-state open-load detection Shorted load protection Undervoltage and overvoltage shutdown Protection against loss of ground Very low standby current Reverse battery protection (see Application schematic on page 13 ) In compliance with the 2002/95/EC european directive Description The VN750PEP-E is a monolithic device designed in STMicroelectronics VIPowerTM M0-3 Technology, intended for driving any kind of load with one side connected to ground. ) s ( ct u d o c u d ) s t( e t le o r P Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart help protect the device against overload. o s b O - The device detects open load condition in on and off-state. Output shorted to VCC is detected in the off-state. Device automatically turns off in case of ground pin disconnection. r P e t e l o s b O Table 1. Device summary Order codes Package PowerSSO-12 November 2009 Tube Tape and reel VN750PEP-E VN750PEPTR-E Doc ID 10869 Rev 4 1/22 www.st.com 1 Contents VN750PEP-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 13 2.4.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 13 2.4.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 14 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.6 Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.7 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 c u d o r P Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 e t le 3.1 4 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 o s b O - Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 4.1 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.2 PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 ) s ( ct Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 u d o r P e t e l o s b O 2/22 ) s t( 2.5 Doc ID 10869 Rev 4 VN750PEP-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Switching (VCC=13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Electrical transient requirements on VCC pin (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Electrical transient requirements on VCC pin (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical transient requirements on VCC pin (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 PowerSSO-12 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O Doc ID 10869 Rev 4 3/22 List of figures VN750PEP-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 16 P2PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 17 PowerSSO-12 thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . 17 PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 c u d e t le ) s ( ct o s b O - u d o r P e t e l o s b O 4/22 Doc ID 10869 Rev 4 o r P ) s t( VN750PEP-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram VCC OVERVOLTAGE DETECTION VCC CLAMP UNDERVOLTAGE DETECTION GND Power CLAMP DRIVER INPUT OUTPUT LOGIC CURRENT LIMITER ON STATE OPENLOAD DETECTION STATUS OVERTEMPERATURE DETECTION Figure 2. u d o r P e t e l o Table 2. e t le o s b O - 1 Configuration diagram (top view) Vcc GND INPUT N.C. CS_DIS Vcc ) s ( ct s b O OFF STATE OPENLOAD AND OUTPUT SHORTED TO VCC DETECTION c u d ) s t( o r P TAB = Vcc 12 11 10 9 8 7 2 3 4 5 6 OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT Suggested connections for unused and not connected pins Connection/pin Status N.C. Output Input Floating X X X X To ground X Doc ID 10869 Rev 4 Through 10 K resistor 5/22 Electrical specifications 2 VN750PEP-E Electrical specifications Figure 3. Current and voltage conventions IS VF IIN VCC INPUT ISTAT IOUT STATUS VCC OUTPUT GND VIN VSTAT 2.1 VOUT IGND c u d Absolute maximum ratings ) s t( o r P Stress values that exceed those listed in the "Absolute maximum ratings" table can cause permanent damage to the device. These are stress ratings only, and operation of the device at these, or any other conditions greater than those, indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics sure program and other relevant quality documents. e t le Table 3. Absolute maximum ratings (s) Symbol VCC - VCC Parameter ct DC supply voltage s b O - Ignd DC reverse ground pin current IOUT DC output current - IOUT Reverse DC output current Value Unit 41 V - 0.3 V - 200 mA Internally limited A -6 A IIN DC input current +/- 10 mA ISTAT DC status current +/- 10 mA VESD Electrostatic discharge (human body model: R=1.5 K; C=100pF) - Input - Status - Output - VCC 4000 4000 5000 5000 V V V V 74 W Ptot 6/22 du Reverse DC supply voltage o r P e t e l o o s b O - Power dissipation TC=25C Doc ID 10869 Rev 4 VN750PEP-E Electrical specifications Table 3. Absolute maximum ratings (continued) Symbol Unit Internally limited C Tj Junction operating temperature Tc Case operating temperature - 40 to 150 C Storage temperature - 55 to 150 C Tstg 2.2 Value Parameter Thermal data Table 4. Thermal data Symbol Rthj-case Parameter Max. value Thermal resistance junction-case 1.7 C/W 61(1) Thermal resistance junction-ambient Rthj-amb Unit 50(2) C/W 2 ) s t( 1. When mounted on a standard single-sided FR-4 board with 1cm of Cu (at least 35m thick) connected to all VCC pins. 2. When mounted on a standard single-sided FR-4 board with 8cm2 of Cu (at least 35m thick) connected to all VCC pins. 2.3 c u d Electrical characteristics e t le o r P Values specified in this section are for 8 V<VCC<36 V; -40 C< Tj <150 C, unless otherwise stated. Table 5. Symbol Parameter VCC Operating supply voltage VUSD Undervoltage shutdown VUSDhyst Undervoltage shutdown hysteresis VOV Overvoltage shutdown RON On-state resistance IS (s) t c u od r P e o s b O Test conditions t e l o bs O Power Supply current Min. Typ. Max. Unit 5.5 13 36 V 3 4 5.5 V 0.5 V 36 V IOUT=2 A; Tj=25 C; VCC> 8 V IOUT=2 A; VCC>8 V 60 120 m m 10 10 25 20 A A 2 3.5 mA 0 50 A -75 0 A Off-state; VCC=13 V; VIN=VOUT=0 V Off-state; VCC=13 V; VIN=VOUT=0 V; Tj=25 C On-state; VCC=13 V; VIN=5 V; IOUT=0 A IL(off1) Off-state output current VIN=VOUT=0 V IL(off2) Off-state output current VIN=0V; VOUT=3.5 V IL(off3) Off-state output current VIN=VOUT=0 V; Vcc=13 V; Tj =125 C 5 A IL(off4) Off-state output current VIN=VOUT=0 V; Vcc=13 V; Tj =25 C 3 A Doc ID 10869 Rev 4 7/22 Electrical specifications Table 6. VN750PEP-E Switching (VCC=13 V) Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL=6.5 from VIN rising edge to VOUT=1.3 V - 40 - s td(off) Turn-off delay time RL=6.5 from VIN falling edge to VOUT=11.7 V - 30 - s dVOUT/dt(on) Turn-on voltage slope RL=6.5 from VOUT=1.3 V to VOUT=10.4 V - 0.5 - V/s dVOUT/dt(off) Turn-off voltage slope RL=6.5 from VOUT=11.7 V to VOUT=1.3 V - 0.2 - V/s Min. Typ. Max. Unit 1.25 V Table 7. Input pin Symbol Parameter VIL Input low level IIL Low level input current VIH Input high level IIH High level input current Vhyst Input hysteresis voltage VICL Input clamp voltage Table 8. VCC output diode Symbol VF Test conditions VIN=1.25 V VIN=3.25 V IIN=1 mA IIN=-1 mA Parameter Status pin Symbol r P e e t le 6 o s b O - Min. Test conditions Min. Test conditions uc od ) s ( ct V 10 A V 6.8 -0.7 8 V V Typ. Max. Unit 0.6 V Max. Unit -IOUT=1.3 A; Tj=150 C u d o Parameter Pr 0.5 ) s t( A 3.25 Forward on voltage Table 9. 1 Typ. VSTAT Status low output voltage ISTAT=1.6 mA 0.5 V ILSTAT Status leakage current Normal operation; VSTAT=5 V 10 A CSTAT Status pin input capacitance Normal operation; VSTAT=5 V 100 pF Status clamp voltage ISTAT=1mA ISTAT=-1mA t e l o bs VSCL O Table 10. Symbol TTSD TR 8/22 6 6.8 -0.7 8 V V Min. Typ. Max. Unit Shutdown temperature 150 175 200 C Reset temperature 135 Protections(1) Parameter Test conditions Doc ID 10869 Rev 4 C VN750PEP-E Table 10. Electrical specifications Protections(1) (continued) Symbol Parameter Test conditions Thyst Thermal hysteresis tSDL Status delay in overload condition Tj>Tjsh Ilim Current limitation 9 V<VCC<36 V 5 V<VCC<36 V Turn-off output clamp voltage IOUT=2 A; VIN=0 V; L=6 mH Vdemag Min. Typ. 7 15 6 Max. Unit C 9 20 ms 15 15 A A VCC-41 VCC-48 VCC-55 V 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device operates under abnormal conditions this software must limit the duration and number of activation cycles. Table 11. Open-load detection Symbol Parameter Test conditions IOL Open-load on-state detection threshold VIN= 5 V tDOL(on) Open-load on-state detection delay IOUT= 0 A VOL Open-load off-state voltage detection threshold VIN= 0 V tDOL(off) Open-load detection delay at turn-off Figure 4. e t le ) s ( ct b O - OPEN LOAD STATUS TIMING (with external pull-up) IOUT< IOL VOUT > VOL s b O t e l o Unit 50 100 200 mA 200 s 3.5 V 1000 s c u d o r P 1.5 2.5 ) s t( OVERTEMP STATUS TIMING Tj > Tjsh u d o tDOL(off) Max. VIN r P e VSTAT Typ. so Status timings VIN Min. VSTAT tDOL(on) Doc ID 10869 Rev 4 tSDL tSDL 9/22 Electrical specifications Figure 5. VN750PEP-E Switching time waveforms VOUT 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% t VIN td(on) td(off) t Table 12. Conditions Input Output Normal operation L H L H Current limitation L H H Overtemperature L H L L H L L H L L X X L H L L H H L H H H L H L H L H H L ) s ( ct Undervoltage Overvoltage u d o r P e Output voltage > VOL t e l o Output current < IOL s b O 10/22 c u d Truth table ) s t( Table 13. e t le L X X o s b O - Status o r P H H H (Tj < TTSD) H (Tj > TTSD) L Electrical transient requirements on VCC pin (part 1/3) Test levels ISO T/R 7637/1 test pulse I II III IV Delays and impedance 1 -25 V -50 V -75 V -100 V 2 ms 10 2 +25 V +50 V +75 V +100 V 0.2 ms 10 3a -25 V -50 V -100 V -150 V 0.1 s 50 Doc ID 10869 Rev 4 VN750PEP-E Electrical specifications Table 13. Electrical transient requirements on VCC pin (part 1/3) (continued) Test levels ISO T/R 7637/1 test pulse I II III IV Delays and impedance 3b +25 V +50 V +75 V +100 V 0.1 s 50 4 -4 V -5 V -6 V -7 V 100 ms, 0.01 5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2 Table 14. Electrical transient requirements on VCC pin (part 2/3) Test levels results ISO T/R 7637/1 test pulse I II III IV 1 C C C C 2 C C C 3a C C C 3b C C C 4 C C C 5 C E E Table 15. e t le ) s t( C o r P c u d C C C E Electrical transient requirements on VCC pin (part 3/3) Class o s b O - Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. ) s ( ct u d o r P e t e l o s b O Doc ID 10869 Rev 4 11/22 Electrical specifications Figure 6. VN750PEP-E Waveforms NORMAL OPERATION INPUT LOAD VOLTAGE STATUS UNDERVOLTAGE VUSDhyst VCC VUSD INPUT LOAD VOLTAGE STATUS undefined OVERVOLTAGE VCC<VOV VCC>VOV c u d VCC INPUT LOAD VOLTAGE STATUS e t le OPEN LOAD with external pull-up INPUT o s b O - VOUT>VOL LOAD VOLTAGE STATUS VOL ) s ( ct OPEN LOAD without external pull-up u d o INPUT LOAD VOLTAGE r P e STATUS t e l o s b O 12/22 Tj TTSD TR OVERTEMPERATURE INPUT LOAD CURRENT STATUS Doc ID 10869 Rev 4 o r P ) s t( VN750PEP-E Electrical specifications Figure 7. Application schematic +5V +5V VCC Rprot STATUS Dld Rprot C INPUT OUTPUT GND VGND RGND DGND c u d o r P 2.4 GND protection network against reverse battery 2.4.1 Solution 1: resistor in the ground line (RGND only) e t le ) s t( o s b O - This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1. RGND 600mV / (IS(on)max). 2. RGND (-VCC) / (-IGND) ) s ( ct where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. u d o Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: r P e PD= (-VCC)2/RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. t e l o O bs Please note that if the microprocessor ground is not shared by the device ground then the RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift varies depending on how many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then ST suggests to utilize Solution 2 (see below). Doc ID 10869 Rev 4 13/22 Electrical specifications 2.4.2 VN750PEP-E Solution 2: diode (DGND) in the ground line A resistor (RGND=1 k) should be inserted in parallel to DGND if the device drives an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network produces a shift (600mV) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. This shift not varies if more than one HSD shares the same diode/resistor network. Series resistor in input and status lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. Safest configuration for unused input and status pin is to leave them unconnected. 2.5 Load dump protection Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC max DC rating. The same applies if the device is subject to transients on the VCC line that are greater than the ones shown in the ISO 7637-2: 2004(E) table. 2.6 c u d Microcontroller I/Os protection ) s t( o r P If a ground protection network is used and negative transient are present on the VCC line, the control pins is pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. e t le The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. o s b O - -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax ) s ( ct Calculation example: For VCCpeak= - 100 V and Ilatchup 20 mA; VOHC 4.5 V u d o 5 k Rprot 65 k. Recommended values: Rprot =10 k. 2.7 r P Open-load detection in off-state e t e l o s b O 14/22 Off-state open-load detection requires an external pull-up resistor (RPU) connected between output pin and a positive supply voltage (VPU) like the +5 V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1. no false open-load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition VOUT=(VPU/(RL+RPU))RL<VOlmin. 2. no misdetection when load is disconnected: in this case the VOUT has to be higher than VOLmax; this results in the following condition RPU<(VPU-VOLmax)/IL(off2). Doc ID 10869 Rev 4 VN750PEP-E Electrical specifications Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched off when the module is in standby. The values of VOLmin, VOLmax and IL(off2) are available in the electrical characteristics section. Figure 8. Open-load detection in off-state V batt. VPU VCC RPU DRIVER + LOGIC INPUT IL(off2) OUT + c u d R - STATUS VOL e t le GROUND ) s ( ct o r P ) s t( RL o s b O - u d o r P e t e l o s b O Doc ID 10869 Rev 4 15/22 Package and PCB thermal data VN750PEP-E 3 Package and PCB thermal data 3.1 PowerSSO-12 thermal data Figure 9. PowerSSO-12 PC board c u d o r P Figure 10. Rthj-amb vs PCB copper area in open box free air condition e t le ) s ( ct o s b O - u d o r P e t e l o s b O 16/22 ) s t( Layout condition of Rth and Zth measurements (PCB FR4 area = 78 mm x 78 mm, PCB thickness = 2 mm, Cu thickness=35 m, Copper areas: from minimum pad lay-out to 8 cm2). Note: Doc ID 10869 Rev 4 VN750PEP-E Package and PCB thermal data Figure 11. P2PAK thermal impedance junction ambient single pulse c u d e t le Equation 1: pulse calculation formula Z TH = R TH +Z THtp (1 - ) where = tP/T ) s t( o r P o s b O - Figure 12. PowerSSO-12 thermal fitting model of a single channel ) s ( ct u d o r P e s b O t e l o Table 16. PowerSSO-12 thermal parameter Area/island (cm2) Footprint R1 (C/W) 0.1 R2 (C/W) 0.6 Doc ID 10869 Rev 4 8 17/22 Package and PCB thermal data Table 16. VN750PEP-E PowerSSO-12 thermal parameter (continued) Area/island (cm2) Footprint R3 (C/W) 1.5 R4 (C/W) 8 R5 (C/W) 28 18 R6 (C/W) 30 22 C1 (W*s/C) 0.001 C2 (W*s/C) 0.0035 C3 (W*s/C) 0.015 C4 (W*s/C) 0.1 C5 (W*s/C) 0.15 0.017 C6 (W*s/C) 3 5 8 c u d e t le ) s ( ct o s b O - u d o r P e t e l o s b O 18/22 Doc ID 10869 Rev 4 o r P ) s t( VN750PEP-E Package and packing information 4 Package and packing information 4.1 ECOPACK(R) packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 4.2 PowerSSO-12 mechanical data Figure 13. PowerSSO-12 package dimensions c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O Doc ID 10869 Rev 4 19/22 Package and packing information Table 17. VN750PEP-E PowerSSO-12 mechanical data Millimeters Symbol Min. Typ. A 1.25 1.62 A1 0 0.1 A2 1.10 1.65 B 0.23 0.41 C 0.19 0.25 D 4.8 5.0 E 3.8 4.0 e 0.8 H 5.8 h 0.25 L 0.4 k 0 X 1.9 Y 3.6 ddd ) s ( ct r P e t e l o s b O Doc ID 10869 Rev 4 ) s t( 6.2 uc 0.5 e t le o s b O - u d o 20/22 Max. Pr od 1.27 8 2.5 4.2 0.1 VN750PEP-E 5 Revision history Revision history Table 18. Document revision history Date Revision Changes 07-Oct-2004 1 Initial release. 24-Nov-2004 2 PowerSSO-12 thermal characteristics insertion. 12-Dec-2004 3 Thermal data correction. 23-Nov-2009 4 Updated feature list. c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O Doc ID 10869 Rev 4 21/22 VN750PEP-E Please Read Carefully: Information in this document is provided solely in connection with ST products. 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