November 2009 Doc ID 10869 Rev 4 1/22
1
VN750PEP-E
High side driver
Features
■ECOPACK® : lead free and RoHS compliant
■Automotive Grade: compliance with AEC
guidelines
■CMOS compatible input
■On-state open-load detection
■Off-state open-load detection
■Shorted load protection
■Undervoltage and overvoltage shutdown
■Protection against loss of ground
■Very low standby current
■Reverse battery protection (see Application
schematic on page 13 )
■In compliance with the 2002/95/EC european
directive
Description
The VN750PEP-E is a monolithic device designed
in STMicroelectronics VIPower™ M0-3
Technology, intended for driving any kind of load
with one side connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table). Active current limitation
combined with thermal shutdown and automatic
restart help protect the device against overload.
The device detects open load condition in on and
off-state. Output shorted to VCC is detected in the
off-state. Device automatically turns off in case of
ground pin disconnection.
Type RDS(on) IOUT VCC
VN750PEP-E 60 mΩ6 A 36 V
PowerSSO-12
Table 1. Device summary
Package
Order codes
Tube Tape and reel
PowerSSO-12 VN750PEP-E VN750PEPTR-E
www.st.com
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Contents VN750PEP-E
2/22 Doc ID 10869 Rev 4
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 13
2.4.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 13
2.4.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 14
2.5 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.6 Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.7 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2 PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
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VN750PEP-E List of tables
Doc ID 10869 Rev 4 3/22
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 6. Switching (VCC=13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 13. Electrical transient requirements on VCC pin (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 14. Electrical transient requirements on VCC pin (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 15. Electrical transient requirements on VCC pin (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 16. PowerSSO-12 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 17. PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
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List of figures VN750PEP-E
4/22 Doc ID 10869 Rev 4
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 9. PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. P2PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 12. PowerSSO-12 thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 13. PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
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VN750PEP-E Block diagram and pin description
Doc ID 10869 Rev 4 5/22
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection/pin Status N.C. Output Input
Floating X X X X
To ground X Through 10 KΩ resistor
UNDERVOLTAGE
OVERTEMPERATURE
VCC
GND
INPUT
OUTPUT
OVERVOLTAGE
CURRENT LIMITER
LOGIC
DRIVER
Power CLAMP
STATUS
VCC
CLAMP
ON STATE OPENLOAD
OFF STATE OPENLOAD
AND OUTPUT SHORTED TO VCC
DETECTION
DETECTION
DETECTION
DETECTION
DETECTION
TA B =
Vcc
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
12
11
10
9
8
7
1
2
3
4
5
6
Vcc
Vcc
INPUT
N.C.
GND
CS_DIS
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Electrical specifications VN750PEP-E
6/22 Doc ID 10869 Rev 4
2 Electrical specifications
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
Stress values that exceed those listed in the “Absolute maximum ratings” table can cause
permanent damage to the device. These are stress ratings only, and operation of the device
at these, or any other conditions greater than those, indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics sure
program and other relevant quality documents.
INPUT
IS
IIN
VIN
VCC
STATUS
ISTAT
VSTAT
GND
VCC
IOUT
VOUT
IGND
OUTPUT
V
F
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
VCC DC supply voltage 41 V
- VCC Reverse DC supply voltage - 0.3 V
- Ignd DC reverse ground pin current - 200 mA
IOUT DC output current Internally limited A
- IOUT Reverse DC output current - 6 A
IIN DC input current +/- 10 mA
ISTAT DC status current +/- 10 mA
VESD
Electrostatic discharge
(human body model: R=1.5 KΩ; C=100pF)
- Input
- Status
- Output
- VCC
4000
4000
5000
5000
V
V
V
V
Ptot Power dissipation TC=25°C 74 W
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VN750PEP-E Electrical specifications
Doc ID 10869 Rev 4 7/22
2.2 Thermal data
2.3 Electrical characteristics
Values specified in this section are for 8 V<VCC<36 V; -40 °C< Tj <150 °C, unless otherwise
stated.
TjJunction operating temperature Internally limited °C
TcCase operating temperature - 40 to 150 °C
Tstg Storage temperature - 55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Table 4. Thermal data
Symbol Parameter Max. value Unit
Rthj-case Thermal resistance junction-case 1.7 °C/W
Rthj-amb Thermal resistance junction-ambient 61(1)
1. When mounted on a standard single-sided FR-4 board with 1cm2 of Cu (at least 35µm thick) connected to
all VCC pins.
50(2)
2. When mounted on a standard single-sided FR-4 board with 8cm2 of Cu (at least 35µm thick) connected to
all VCC pins.
°C/W
Table 5. Power
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCC Operating supply voltage 5.5 13 36 V
VUSD Undervoltage shutdown 3 4 5.5 V
VUSDhyst
Undervoltage shutdown
hysteresis 0.5 V
VOV Overvoltage shutdown 36 V
RON On-state resistance IOUT=2 A; Tj=25 °C; VCC> 8 V
IOUT=2 A; VCC>8 V
60
120
mΩ
mΩ
ISSupply current
Off-state; VCC=13 V; VIN=VOUT=0 V
Off-state; VCC=13 V; VIN=VOUT=0 V;
Tj=25 °C
On-state; VCC=13 V; VIN=5 V;
IOUT=0 A
10
10
2
25
20
3.5
µA
µA
mA
IL(off1) Off-state output current VIN=VOUT=0 V 0 50 µA
IL(off2) Off-state output current VIN=0V; VOUT=3.5 V -75 0 µA
IL(off3) Off-state output current VIN=VOUT=0 V; Vcc=13 V; Tj =125 °C 5 µA
IL(off4) Off-state output current VIN=VOUT=0 V; Vcc=13 V; Tj =25 °C 3 µA
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Electrical specifications VN750PEP-E
8/22 Doc ID 10869 Rev 4
Table 6. Switching (VCC=13 V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time RL=6.5 Ω from VIN rising edge to
VOUT=1.3 V -40-µs
td(off) Turn-off delay time RL=6.5 Ω from VIN falling edge to
VOUT=11.7 V -30-µs
dVOUT/dt(on) Turn-on voltage slope RL=6.5 Ω from VOUT=1.3 V to
VOUT=10.4 V - 0.5 - V/µs
dVOUT/dt(off) Turn-off voltage slope RL=6.5 Ω from VOUT=11.7 V to
VOUT=1.3 V - 0.2 - V/µs
Table 7. Input pin
Symbol Parameter Test conditions Min. Typ. Max. Unit
VIL Input low level 1.25 V
IIL Low level input current VIN=1.25 V 1 µA
VIH Input high level 3.25 V
IIH High level input current VIN=3.25 V 10 µA
Vhyst Input hysteresis voltage 0.5 V
VICL Input clamp voltage IIN=1 mA
IIN=-1 mA
66.8
-0.7
8V
V
Table 8. VCC output diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
VFForward on voltage -IOUT=1.3 A; Tj=150 °C 0.6 V
Table 9. Status pin
Symbol Parameter Test conditions Min. Typ. Max. Unit
VSTAT Status low output voltage ISTAT=1.6 mA 0.5 V
ILSTAT Status leakage current Normal operation; VSTAT=5 V 10 µA
CSTAT
Status pin input
capacitance Normal operation; VSTAT=5 V 100 pF
VSCL Status clamp voltage ISTAT=1mA
ISTAT=-1mA
66.8
-0.7
8V
V
Table 10. Protections(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
TTSD Shutdown temperature 150 175 200 °C
TRReset temperature 135 °C
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VN750PEP-E Electrical specifications
Doc ID 10869 Rev 4 9/22
Figure 4. Status timings
Thyst Thermal hysteresis 7 15 °C
tSDL
Status delay in overload
condition Tj>Tjsh 20 ms
Ilim Current limitation 9V<V
CC<36 V
5V<V
CC<36 V
6915
15
A
A
Vdemag
Turn-off output clamp
voltage IOUT=2 A; VIN=0 V; L=6 mH VCC-41 VCC-48 VCC-55 V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals
must be used together with a proper software strategy. If the device operates under abnormal conditions this software must
limit the duration and number of activation cycles.
Table 11. Open-load detection
Symbol Parameter Test conditions Min. Typ. Max. Unit
IOL
Open-load on-state
detection threshold VIN= 5 V 50 100 200 mA
tDOL(on)
Open-load on-state
detection delay IOUT= 0 A 200 µs
VOL
Open-load off-state
voltage detection
threshold
VIN= 0 V 1.5 2.5 3.5 V
tDOL(off)
Open-load detection
delay at turn-off 1000 µs
Table 10. Protections(1) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IN
V
STAT
t
DOL(off)
OPEN LOAD STATUS TIMING
(with external pull-up) OVERTEMP STATUS TIMING
I
OUT
< I
OL
V
OUT
> V
OL
t
DOL(on)
T
j
> T
jsh
V
IN
V
STAT
t
SDL
t
SDL
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Electrical specifications VN750PEP-E
10/22 Doc ID 10869 Rev 4
Figure 5. Switching time waveforms
Table 12. Truth table
Conditions Input Output Status
Normal operation L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature L
H
L
L
H
L
Undervoltage L
H
L
L
X
X
Overvoltage L
H
L
L
H
H
Output voltage > VOL
L
H
H
H
L
H
Output current < IOL
L
H
L
H
H
L
Table 13. Electrical transient requirements on VCC pin (part 1/3)
ISO T/R 7637/1
test pulse
Test levels
I II III IV Delays and
impedance
1 -25 V -50 V -75 V -100 V 2 ms 10 Ω
2 +25 V +50 V +75 V +100 V 0.2 ms 10 Ω
3a -25 V -50 V -100 V -150 V 0.1 µs 50 Ω
t
t
VOUT
VIN
80%
10%
dVOUT/dt(on)
td(off)
90%
dVOUT/dt(off)
td(on)
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VN750PEP-E Electrical specifications
Doc ID 10869 Rev 4 11/22
3b +25 V +50 V +75 V +100 V 0.1 µs 50 Ω
4 -4 V -5 V -6 V -7 V 100 ms, 0.01 Ω
5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2 Ω
Table 14. Electrical transient requirements on VCC pin (part 2/3)
ISO T/R 7637/1
test pulse
Test levels results
I II III IV
1CCCC
2CCCC
3aCCCC
3bCCCC
4CCCC
5C E E E
Table 15. Electrical transient requirements on VCC pin (part 3/3)
Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
EOne or more functions of the device is not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
Table 13. Electrical transient requirements on VCC pin (part 1/3) (continued)
ISO T/R 7637/1
test pulse
Test levels
I II III IV Delays and
impedance
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Electrical specifications VN750PEP-E
12/22 Doc ID 10869 Rev 4
Figure 6. Waveforms
OPEN LOAD without external pull-up
STATUS
INPUT
NORMAL OPERATION
UNDERVOLTAGE
V
CC
V
USD
V
USDhyst
INPUT
OVERVOLTAGE
V
CC
V
CC
>V
OV
STATUS
INPUT
STATUS
STATUS
INPUT
STATUS
INPUT
OPEN LOAD with external pull-up
undefined
LOAD VOLTAGE
V
CC
<V
OV
LOAD VOLTAGE
LOAD VOLTAGE
LOAD VOLTAGE
LOAD VOLTAGE
OVERTEMPERATURE
INPUT
STATUS
T
TSD
T
R
T
j
LOAD CURRENT
V
OUT
>V
OL
V
OL
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VN750PEP-E Electrical specifications
Doc ID 10869 Rev 4 13/22
Figure 7. Application schematic
2.4 GND protection network against reverse battery
2.4.1 Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1. RGND ≤ 600mV / (IS(on)max).
2. RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power Dissipation in RGND (when VCC<0: during reverse battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift varies depending on how many devices are ON in the case of several high
side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
V
CC
GND
OUTPUT
D
GND
R
GND
D
ld
μ
C
+5V
R
prot
V
GND
STATUS
INPUT
+5V
R
prot
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Electrical specifications VN750PEP-E
14/22 Doc ID 10869 Rev 4
2.4.2 Solution 2: diode (DGND) in the ground line
A resistor (RGND=1 kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.
Series resistor in input and status lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.
Safest configuration for unused input and status pin is to leave them unconnected.
2.5 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
2.6 Microcontroller I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins is pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100 V and Ilatchup ≥ 20 mA; VOHµC ≥ 4.5 V
5kΩ ≤ Rprot ≤ 65 kΩ.
Recommended values: Rprot =10 kΩ.
2.7 Open-load detection in off-state
Off-state open-load detection requires an external pull-up resistor (RPU) connected between
output pin and a positive supply voltage (VPU) like the +5 V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
1. no false open-load indication when load is connected: in this case we have to avoid
VOUT to be higher than VOlmin; this results in the following condition
VOUT=(VPU/(RL+RPU))RL<VOlmin.
2. no misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU<(VPU–VOLmax)/IL(off2).
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VN750PEP-E Electrical specifications
Doc ID 10869 Rev 4 15/22
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pull-
up resistor RPU should be connected to a supply that is switched off when the module is in
standby.
The values of VOLmin, VOLmax and IL(off2) are available in the electrical characteristics
section.
Figure 8. Open-load detection in off-state
VOL
V batt. VPU
RPU
RL
R
DRIVER
+
LOGIC
+
-
INPUT
STATUS
VCC
OUT
GROUND
IL(off2)
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Package and PCB thermal data VN750PEP-E
16/22 Doc ID 10869 Rev 4
3 Package and PCB thermal data
3.1 PowerSSO-12 thermal data
Figure 9. PowerSSO-12 PC board
Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 78 mm x 78 mm, PCB
thickness = 2 mm, Cu thickness=35 µm, Copper areas: from minimum pad lay-out to 8 cm2).
Figure 10. Rthj-amb vs PCB copper area in open box free air condition
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Figure 11. P2PAK thermal impedance junction ambient single pulse
Equation 1: pulse calculation formula
where δ = tP/T
Figure 12. PowerSSO-12 thermal fitting model of a single channel
Table 16. PowerSSO-12 thermal parameter
Area/island (cm2)Footprint8
R1 (°C/W) 0.1
R2 (°C/W) 0.6
ZTHδRTH δZTHtp 1δ–()+⋅=
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R3 (°C/W) 1.5
R4 (°C/W) 8
R5 (°C/W) 28 18
R6 (°C/W) 30 22
C1 (W·s/°C) 0.001
C2 (W·s/°C) 0.0035
C3 (W·s/°C) 0.015
C4 (W·s/°C) 0.1
C5 (W·s/°C) 0.15 0.017
C6 (W·s/°C) 3 5
Table 16. PowerSSO-12 thermal parameter (continued)
Area/island (cm2)Footprint8
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4 Package and packing information
4.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.2 PowerSSO-12 mechanical data
Figure 13. PowerSSO-12 package dimensions
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Table 17. PowerSSO-12 mechanical data
Symbol
Millimeters
Min. Typ. Max.
A 1.25 1.62
A1 0 0.1
A2 1.10 1.65
B 0.23 0.41
C 0.19 0.25
D4.8 5.0
E3.8 4.0
e0.8
H5.8 6.2
h 0.25 0.5
L 0.4 1.27
k0° 8°
X1.9 2.5
Y3.6 4.2
ddd 0.1
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5 Revision history
Table 18. Document revision history
Date Revision Changes
07-Oct-2004 1 Initial release.
24-Nov-2004 2 PowerSSO-12 thermal characteristics insertion.
12-Dec-2004 3 Thermal data correction.
23-Nov-2009 4 Updated feature list.
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