08/2010
AWT6221R
HELP3TM Dual-band Cellular/PCS UMTS
3.4 V HSPA Linear Power Amplier Module
DATA SHEET - Rev 2.4
M28 Package
14 Pin 3 mm x 5 mm x 1 mm
Surface Mount Module
FEATURES
• InGaP HBT Technology
• High Efciency:
19 % @ +16 dBm POUT
40 % @ maximum POUT
• Low Quiescent Current: 8 mA
• Internal Voltage Regulation
• Common VMODE Control Line
• Simplied VCC Bus PCB routing
• Reduced External Component Count
• Low Prole Surface Mount Package: 1 mm
• HSDPA Compliant
• RoHS Compliant Package, 250 oC MSL-3
APPLICATIONS
• WCDMA/HSPA Dual-Band Cell/PCS Wireless
Handsets and Data Devices
PRODUCT DESCRIPTION
The AWT6221R addresses the demand for increased
integration in dual-band handsets for North American
UMTS network deployments. The small footprint 3
mm x 5 mm x 1 mm surface mount RoHS compliant
package contains independent RF PA paths to ensure
optimal performance in both frequency bands, while
achieving a 25% PCB space savings compared with
solutions requiring two single-band PAs. The package
pinout was chosen to enable handset manufacturers
to easily route VCC to both power amplifiers and
simplify control with a common VMODE pin. The
device is manufactured on an advanced InGaP HBT
MMIC technology offering state-of-the-art reliability,
temperature stability, and ruggedness. The AWT6221R
incorporates ANADIGICS’ HELP3™ technology to
provide low power consumption without the need for
an external voltage regulator. Two operating modes
provide optimum efciency at high and medium/low
power output levels, thereby dramatically increasing
handset talk-time and standby-time. Its built-in voltage
regulator eliminates the need for external voltage
regulation and load switches. The 3 mm x 5 mm x 1
mm surface mount package incorporates matching
networks optimized for output power, efciency and
linearity in a 50 Ω system.
Figure 1: Block Diagram
AWT6221R
2Data Sheet - Rev 2.4
08/2010
AWT6221R
Table 1: Pin Description
Figure 2: Pinout
PIN NAME DESCRIPTION
1 V
EN_CELL
Enable Voltage for Cell Band
2RF
IN_CELL
RF Input for Cell Band
3 V
MODE1
Mode Control Voltage 1
4 V
BATT
Battery Voltage
5V
MODE2
(N/C) No Connection
6RF
IN_P C S
RF Input for PCS Band
7 V
EN_PCS
Enable Voltage for PCS Band
8RF
OUT_PCS
RF Output for PCS Band
9GND Ground
10 GND Ground
11 V
CC
ASupply Voltage A
12 V
CC
Supply Voltage
13 RF
OUT_CELL
RF Output for Cell Band
14 GND Ground
Data Sheet - Rev 2.4
08/2010
AWT6221R
3
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Minimum and Maximum Ratings
Stresses in excess of the absolute ratings may cause permanent damage.
Functional operation is not implied under these conditions. Exposure
to absolute ratings for extended periods of time may adversely affect
reliability.
Table 3: Operating Ranges
The device may be operated safely over these conditions; however, parametric performance is guaranteed only
over the conditions dened in the electrical specications.
Notes:
(1) For operations at VCC = +3.2 V, POUT is derated by 0.5 dB (all operating modes).
PARAMETER MIN MAX UNIT
Supply Voltage (VBATT, VCC, VCCA) 0+5 V
Mode Control Voltage (VMODE1)0+3.5 V
Enable Voltage (VEN_CELL, VEN_PCS)0+3.5 V
RF Input Power (PIN)-+10 dBm
Storage Temperature (TSTG)-40 +150 °C
PARAMETER MIN TYP MAX UNIT COMMENTS
Operating Frequency (f) 824
1850 -849
1910 MHz Cellular
PCS
Supply Voltage (V
CC
and V
BATT
)+3.2 +3.4 +4.2 V
Enable Voltage (V
EN
)+2.2
0
+2.4
-
+3.1
+0.5 VPA "on"
PA "shut down"
Mode Control Voltage (V
MODE1
)+2.2
0
+2.4
-
+3.1
+0.5 VLow Bias Mode
High Bias Mode
Cellular RF Output Power (P
OUT
)
R99 WCDMA, HPM
HSPA (MPR=0), HPM
R99 WCDMA, LPM
HSPA (MPR=0), LPM
28.5
(1)
27.5
(1)
15.5
(1)
14.5
(1)
29
28
16
15
29
28
16
15
dBm 3GPP TS 34.121-1, Rel
7 Table C.11.1.3
PCS RF Output Power (P
OUT
)
R99 WCDMA, HPM
HSPA (MPR=0), HPM
R99 WCDMA, LPM
HSPA (MPR=0), LPM
29
(1)
28
(1)
15.5
(1)
14.5
(1)
29.5
28.5
16
15
29.5
28.5
16
15
dBm 3GPP TS 34.121-1, Rel
7 Table C.11.1.3
Case Temperature (T
C
)-20 -+90 °C
4Data Sheet - Rev 2.4
08/2010
AWT6221R
Table 4: Electrical Specications - Cellular Band
(TC = +25 °C, VBATT = VCC = +3.4 V, VENABLE = +2.4 V, 50 Ω system)
Notes:
(1) ACLR and Efciency measured at 836.5 MHz.
(2) 869 MHz to 894 MHz.
(3) POUT < +29 dBm, In-band load VSWR < 5:1, Out-of-band load VSWR < 10:1. Applies over all operating conditions.
PARAMETER MIN TYP MAX UNIT
COMMENTS
P
OUT
V
MODE1
Gain 24.5
13.5
27
15.5
29.0
18.0 dB +29 dBm
+16 dBm
0 V
2.4 V
ACLR1 at 5 MHz offset
(1)
-
-
-41
-44
-37.5
-38 dBc +29 dBm
+16 dBm
0 V
2.4 V
ACLR2 at 10 MHz offset -
-
-60
-57
-48
-48 dBc +29 dBm
+16 dBm
0 V
2.4 V
Power-Added Efficiency
(1)
38
18
42
22
-
-%+29 dBm
+16 dBm
0 V
2.4 V
Quiescent Current (Icq) 5 8 13 mA V
MODE1
= +2.4 V
Mode Control Current -0.35 0.8 mA through V
MODE1
pin, V
MODE
= +2.4 V
Enable Current -0.5 0.8 mA through V
ENABLE
pin
BATT Current -2.5 5mA through V
BATT
pin, V
MODE1
= +2.4 V
Leakage Current -<1 5µA V
BATT
= +4.2 V, V
CC
= +4.2 V,
V
ENABLE
= 0 V, V
MODE1
= 0 V
Noise in Receive Band
(2)
-
-
-135
-141
-133
-138 dBm/Hz P
OUT
= +29 dBm, V
MODE1
= 0 V, V
P
OUT
= +16 dBm, V
MODE1
= +2.4 V
Harmonics
2fo
3fo, 4fo
-
-
-44
-50
-35
-35 dBc P
OUT
< +29 dBm
Input Impedance - - 2:1 VSWR
Spurious Output Level
(all spurious outputs) - - -70 dBc See Note 3
Load mismatch stress with no
permanent degradation or failure 8:1 - - VSWR Applies over full operating range
Data Sheet - Rev 2.4
08/2010
AWT6221R
5
Table 5: Electrical Specications - PCS Band
(TC = +25 °C, VBATT = VCC = +3.4 V, VENABLE = +2.4 V, 50 Ω system)
Notes:
(1) ACLR and Efciency measured at 1880 MHz.
(2) 1930 MHz to 1990 MHz.
PARAMETER MIN TYP MAX UNIT
COMMENTS
POUT VMODE1
Gain 24.5
12
26.5
14.0
29.0
17.0 dB +29.5 dBm
+16 dBm
0 V
2.4 V
ACLR1 at 5 MHz offset
(1)
-
-
-41
-42
-37.5
-38 dBc +29.5 dBm
+16 dBm
0 V
2.4 V
ACLR2 at 10 MHz offset -
-
-55
-54
-48
-48 dBc +29.5 dBm
+16 dBm
0 V
2.4 V
Power-Added Efficiency
(1)
35
15
38.5
17.5
-
-%+29.5 dBm
+16 dBm
0 V
2.4 V
Quiescent Current (Icq)
Low Bias Mode 5 8 13 mA VMODE1 = +2.4 V
Mode Control Current -0.35 0.8 mA through VMODE pins, VMODE = +2.4 V
Enable Current -0.35 0.8 mA through VENABLE pin
BATT Current -2.5 5mA through VBATT pin, VMODE1 = 2.4 V
Leakage Current -<1 5µA VBATT = +4.2 V, VCC = +4.2 V,
VENABLE = 0 V, VMODE1 = 0 V
Noise in Receive Band
(2)
-
-
-137
140
-135
-138 dBm/Hz P
OUT
= +29.5 dBm, V
MODE1
= 0 V
P
OUT
= +16 dBm, V
MODE1
= 2.4 V
Harmonics
2fo
3fo, 4fo
-
-
-42
-46
-35
-35 dBc
Input Impedance - - 2:1 VSWR
Spurious Output Level
(all spurious outputs) - - -70 dBc
POUT < +29.5 dBm
In-band load VSWR < 5:1
Out-of-band load VSWR < 10:1
Applies over all operating
conditions
Load mismatch stress with no
permanent degradation or failure 8:1 - - VSWR Applies over full operating range
6Data Sheet - Rev 2.4
08/2010
AWT6221R
APPLICATION INFORMATION
To ensure proper performance, refer to all related
Application Notes on the ANADIGICS web site:
http://www.anadigics.com
Shutdown Mode
The power amplier may be placed in a shutdown
mode by applying logic low levels (see Operating
Ranges table) to the VENABLE and VMODE1 voltages.
Bias Modes
The power amplier may be placed in either a Low Bias
mode or a High Bias mode by applying the appropriate
logic level (see Operating Ranges table) to VMODE1.
Table 6: Bias Control
The Bias Control table lists the recommended modes
of operation for various applications. VMODE2 is not
necessary for this PA.
Two operating modes are available to optimize
current consumption. High Bias/High Power operating
mode is for POUT levels > 16 dBm. At around 16 dBm
output power, the PA should be “Mode Switched” to
Medium/Low power mode for lowest quiescent current
consumption.
Figure 3: Application Circuit
APPLICATION P
OUT
LEVELS
BIAS
MODE V
ENABLE
V
MODE1
V
CC
V
B AT T
UMTS - low power < +16 dBm Low +2.4 V +2.4 V 3.2 - 4.2 V > 3.2 V
UMTS - high power > +16 dBm High +2.4 V 0 V 3.2 - 4.2 V > 3.2 V
Optional lower V
CC
in
low power mode < +7 dBm Low +2.4 V +2.4 V 1.5 V > 3.2 V
Shutdown -Shutdown 0 V 0 V 3.2 - 4.2 V > 3.2 V
Data Sheet - Rev 2.4
08/2010
AWT6221R
7
PACKAGE OUTLINE
Figure 4: Package Outline - 14 Pin 3 mm x 5 mm x 1 mm Surface Mount Module
Figure 5: Branding Specication
6221R
LLLLNN
087CC
YYWW
LLLL
087
7. YEAR AND WORK WEEK YY = Year, WW = Work Week
8
WARNING
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product
in any such application without written consent is prohibited.
IMPORTANT NOTICE
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
E-mail: Mktg@anadigics.com
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.
The product specications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed
to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers
to verify that the information they are using is current before placing orders.
Data Sheet - Rev 2.4
08/2010
8
AWT6221R
ORDERING INFORMATION