©
1999 IMP, Inc. 408-432-9100/www.impweb.com 1
Key Features
◆
Lower power, pin-compatible replacements for
the Dallas DS1834
— 40% lower maximum supply current:
30µA vs 50µA
◆
Monitor 5V and 3.3V supplies simultaneously
◆
5V and 3.3V power-on reset
◆
350ms reset time
◆
Debounced pushbutton reset input
◆
Push-Pull CMOS output
— IMP1834, IMP1834D
— Eliminates external pull-up resistors
— Active LOW (IMP1834), HIGH (IMP1834D)
◆
Open drain output
— IMP1834A
— Active LOW
◆
Selectable 5V and 3.3V trip point tolerance
◆
Internal power drawn from highest input
voltage, 5V or 3.3V
◆
Precision temperature-compensated voltage
reference and comparator
◆
Low-cost surface mount SO, compact
MicroSO and DIP packages
◆
Wide operating temperature, –40°C to +85°C
Block Diagram
3.3VIN 8
1834_01.eps
40kΩ
5VIN
5VTOL 5V Tolerance
Bias
IMP1834
PBRST
1
3
–
+
Low TC
Reference
3.3VTOL
5
6
GND 4
5VRESET
5VRESET (IMP1834D)
For IMP1834D
350 ms
Delay
For IMP1834D
3.3V Tolerance
Bias
2
–
+3.3VRESET
3.3VRESET (IMP1834D)
350 ms
Delay 7
Pushbutton Level
Sense and Debounce
IMP1
IMP183
834/A/D
4/A/D
POWER MANAGEMENT
Dual 5V and 3.3V
Dual 5V and 3.3V µ
µP P
P Po
ow
wer
er
Suppl
Supply Super
y Supervisor
visors w/Manual R
s w/Manual Reset
eset
– Push-Pull and Open-Dr
– Push-Pull and Open-Drain Outputs
ain Outputs
– Select
– Selectable T
able Tr
rip P
ip Point T
oint Toler
olerance
ance
The IMP1834 supervisors simultaneously monitor both 3.3V and 5V
power sources and issue reset signals when either supply is out of toler-
ance. When an out-of-tolerance condition is detected, the output-reset
signal of the affected supply becomes active and resets the system micro-
processor/microcontroller. On power-up and after the supply voltage
returns to an in-tolerance condition, the reset signal remains active for
approximately 350ms. This allows the power supply and system micro-
processor to stabilize.
The IMP1834 supervisors are pin-compatible with devices from Dallas
Semiconductor and require up to 40% less current.
Tolerance levels are independently selectable for both supplies.
Tolerance options are 5- and 10-percent for the 5V supply and for the
3.3V supply, 10- and 20-percent.
The IMP1834 and IMP1834D have push-pull reset output stages. The
IMP1834A active LOW reset outputs are open drain devices that can
both be connected to either 5 volt or 3.3 volt supply. The IMP1834 and
IMP1834A have active LOW reset outputs. The IMP1834D has active
HIGH reset outputs.
All devices can issue reset signals through an internally debounced
pushbutton reset input that affects both reset outputs.
All devices operate over the extended industrial temperature range.
Devices are available in 8-pin DIP, surface mount 8-pin SO and 8-pin
MicroSO packages. Die are also available.
1834_02.eps
5VRESET
2
3.3VRESET
7
IMP1834A
rebmuNniP emaN noitcnuF
1 V5
NI
.tupniylppusrewopV5
2TESERV5 TESERV5 .)A4381PMIrofstuptuoniardnepO.A4381PMI,4381PMI,WOLevitcA(tuptuoteserV5 .)D4381PMI,HGIHevitcA(tuptuoteserV5
3 LOTV5 V5LOTV5rofecnarelot%01:tcelesecnarelottupniV5
NI
.DNG=LOTV5rofecnarelot%5dna
4 DNG .dnuorG
5 TSRBP k04(tupnitesernottubhsuplaunamdecnuobeD Ω.)pulluplanretni
6 LOTV3.3 V3.3=LOTV3.3rofecnarelot%02:tcelesecnarelottupniV3.3
NI
rofecnarelot%01dna,
.DNG=LOTV3.3
7TESERV3.3 TESERV3.3 .)A4381PMIrofstuptuoniardnepO.A4381PMI,4381PMI,WOLevitcA(tuptuoteserV3.3 .)D4381PMI,HGIHevitcA(tuptuoteserV3.3
8 V3.3
NI
.tupniylppusrewopV3.3
spe.t10_4381
2408-432-9100/www.impweb.com ©1999 IMP, Inc.
Pin Configuration
IMP1
IMP183
834/A/D
4/A/D
Pin Descriptions
IMP1834
IMP1834A
IMP1834D
1
2
3
4
5VIN
5VRESET*
5VTOL
GND
3.3VIN
3.3VRESET*
3.3VTOL
PBRST
8
7
6
5
1834_03.eps
* IMP1834D reset outputs are
active HIGH (5VRESET and 3.3VRESET).
Outputs are open drain for IMP1834A.
Ordering Information
DIP/SO/MicroSO
rebmuNtraP egakcaP gnitarepO
egnaRerutarepmeT ytiraloPteseR egatStuptuO
4381PMI PID-8 – 04 ° 58otC °C WOL lluP-hsuP
AME4381PMI OSorciM – 04 ° 58otC °C WOL lluP-hsuP
S4381PMI OS-8 – 04 ° 58otC °C WOL lluP-hsuP
D/4381PMI ECID 52 °C WOL lluP-hsuP
A4381PMI PID-8 – 04 ° 58otC °C WOL niarDnepO
AMEA4381PMI OSorciM – 04 ° 58otC °C WOL niarDnepO
SA4381PMI OS-8 – 04 ° 58otC °C WOL niarDnepO
D/A4381PMI ECID 52 °C WOL niarDnepO
D4381PMI PID-8 – 04 ° 58otC °C HGIH lluP-hsuP
AMED4381PMI OSorciM – 04 ° 58otC °C HGIH lluP-hsuP
SD4381PMI OS-8 – 04 ° 58otC °C HGIH lluP-hsuP
D/D4381PMI ECID 52 °C HGIH lluP-hsuP
spe.t20_4381
©
1999 IMP, Inc. 408-432-9100/www.impweb.com 3
IMP1
IMP183
834/A/D
4/A/D
Absolute Maximum Ratings
Electrical Characteristics
Voltage on V
IN
pins . . . . . . . . . . . . . . . . –0.5V to 7V
Voltage on 5VRESET . . . . . . . . . . . . . . . –0.5V to (+5V
IN
+0.5V)
(IMP1834, IMP1834D)
Voltage on 3.3VRESET . . . . . . . . . . . . . . –0.5V to (+3.3V
IN
+0.5V)
(IMP1834, IMP1834D)
Voltage on PBRST and reset outputs . . –0.5V to the greater of
5V
IN
+0.5V or 3.3V
IN
+0.5V
(IMP1834A)
Operating Temperature Range . . . . . . . –40°C to 85°C
Storage Temperature . . . . . . . . . . . . . . . –55°C to 125°C
Soldering Temperature . . . . . . . . . . . . . . 260°C for 10 seconds
Voltages measured with respect to ground.
These are stress ratings only and functional operation is not implied.
Parameter Symbol Conditions Min Typ Max Units
5V Supply Voltage (5V
IN
)5V
IN
1.2 5.5 V
3.3V Supply Voltage (3.3V) 3.3V
IN
1.2 5.5 V
PBRST Input High Level V
IH
Both 3.3V
IN
and 5V
IN
≥2.7V 2 V
INMAX
+0.3V V
PBRST Input High Level V
IH
Both 3.3V
IN
and 5V
IN
≤2.7V V
INMAX
–0.4V V
PBRST Input Low Level V
IL
–0.3 0.5 V
Recommended DC operating condition over the operating temperature range of –40°C to +85°C.
All voltages are referenced to ground.
Parameter Symbol Conditions Min Typ Max Units
Output Voltage V
OH
V
IN
– 0.1V V
Input Leakage I
IL
–1.0 +1.0 µA
Output Current I
OH
Output = 2.4V. Either 3.3V
IN
or 350 µA
5V
IN
≥2.7V.
(IMP1834/1834D only)
Output Current I
OL
Output = 0.4V. Either 3.3V
IN
or +10 mA
5V
IN
≥2.7V.
(IMP1834/1834D only)
5V Operating Current I
CC
3.3V
IN
and 5V
IN
≤ 5.5V, 16 30 µA
RESET outputs open.
3.3V Operating Current I
CC
3.3V
IN
and 5V
IN
≤ 3.6V, 12 25 µA
RESET outputs open.
5V Trip Point V
INTP
5VTOL = GND 4.50 4.63 4.75 V
5V Trip Point V
INTP
5VTOL = 5V
IN
4.25 4.38 4.49 V
3.3V Trip Point V
INTP
3.3VTOL = GND 2.80 2.88 2.97 V
3.3V Trip Point V
INTP
3.3VTOL = 3.3V
IN
2.47 2.55 2.64 V
Output Capacitance C
OUT
10 pF
PBRST Manual Reset t
PB
2ms
Minimum Low Time
PBRST Stable LOW to t
PDLY
2ms
Reset Active
Reset Active T ime t
RST
200 350 500 ms
V
CC
Detect Noise Immunity t
RPD
2µs
V
CC
Slew Rate t
F
V
INTP
(MAX) to V
INTP
(MIN) 300 µs
V
CC
Slew Rate t
R
V
INTP
(MIN) to V
INTP
(MAX) 0 ns
V
CC
Detect to RESET or RESET t
RPU
t
rise
= 5µs 200 350 500 ms
Unless otherwise noted, V
IN
= 1.2V to 5.5V and specifications are over the operating temperature range of –40°C to +85°C.
4408-432-9100/www.impweb.com ©1999 IMP, Inc.
IMP1
IMP183
834/A/D
4/A/D
Application Information
Operation – Power Monitor
The IMP1834 supervisors simultaneously detect out-of-tolerance
power supply conditions on both 3.3V and 5V power supplies. If
the voltages at 5V
IN
or 3.3V
IN
are outside the tolerance band, the
reset for the failing supply voltage becomes active. When the moni-
tored supply returns to an in-tolerance state, the reset remains active
for approximately 350ms before returning to the inactive state.
On power-up, the reset signals are kept active for approximately
350ms after the power supply voltages have reached the selected
tolerance. This allows the power supply and microprocessor to
stabilize before the reset is removed.
All supply current for the IMP1834 devices is drawn from the
input (5V
IN
or 3.3V
IN
) with the highest voltage level. The outputs
draw current from their input supplies 5V
IN
and 3.3V
IN
.
Reset Signal Polarity and Output Stage Structure
The IMP1834 and IMP1834A supervisors have active LOW reset
signals. The IMP1834D reset outputs are active HIGH.
The IMP1834 and IMP1834D have CMOS push-pull output
stages. The IMP1834A has open drain reset outputs.
Output Stage
IMP Part RESET Polarity Configuration
IMP1834 LOW Push-Pull
IMP1834EMA LOW Push-Pull
IMP1834S LOW Push-Pull
IMP1834A LOW Open Drain
IMP1834AEMA LOW Open Drain
IMP1834AS LOW Open Drain
IMP1834D HIGH Push-Pull
IMP1834DEMA HIGH Push-Pull
IMP1834DS HIGH Push-Pull
Trip Point Tolerance Selection
The 3.3VTOL and 5VTOL inputs allow independent selection of
the reset trip points. If 5VTOL is connected to the 5V supply input,
a 10% tolerance is selected. If 5VTOL is grounded, a 5% tolerance
is selected.
If 3.3VTOL is connected to the 3.3V supply input, a 20% tolerance
is selected. If 3.3VTOL is grounded, a 10% tolerance is selected.
See Table 1.
The 3.3VTOL and 5VTOL tolerance select inputs should be tied to
ground or to the respective input supply voltage pin, 3.3V
IN
or 5V
IN
.
Figure 1. Timing Diagram: Power Up
Figure 2. Timing Diagram: Power Down
(IMP1834D Only)
1834_10.eps
VINTP (Max)
VINTP
VINTP (Min)
VIN
RESET
RESET
tR
tRPU
VOH
VOL
VINTP
VINTP (Max)
VINTP (Min)
VIN
RESET
RESET
> tRPD
tF
VOH
VOL
RESET Slews
with VCC
1834_09.eps
(IMP1834D Only)
IMP1
IMP183
834/A/D
4/A/D
Application Information
©
1999 IMP, Inc. 408-432-9100/www.impweb.com 5
Manual Reset Operation
Pushbutton switch input, PBRST, allows the user to override the
internal trip point detection circuits and issue reset signals. The
pushbutton input is debounced and is pulled HIGH through a
40kΩ, internal pull-up resistor.
When at least one of the reset outputs is not asserted, a pushbut-
ton initiated reset signal can be issued by holding PBRST LOW for
at least 2ms. When PBRST is held LOW, both resets become active
and remain active for approximately 350ms after PBRST returns
HIGH. See Figure 3 and Figure 4.
tceleSecnareloT
tupnIV3.3 tupnIV5
V3.3
ecnareloT
)V(tnioPPIRT V5
ecnareloT
)V(tnioPPIRT
NIM lanimoN XAM NIM lanimoN XAM
V5=LOTV5
NI
— — — — %01 52.4 83.4 94.4
DNG=LOTV5 — — — — %5 5.4 36.4 57.4
V3.3=LOTV3.3
NI
%02 74.2 55.2 46.2 — — — —
DNG=LOTV3.3 %01 08.2 88.2 79.2 — — — —
spe.t30_4381
Table 1. Threshold Selection
Figure 3. Pushbutton Reset
1834_04.eps
5VIN
3.3V
13.3VIN
5VRESET
23.3VRESET
5VTOL
IMP1834
3
43.3VTOL
GND
8
7
6
5
PBRST
5V
Figure 4. Timing Diagram: Pushbutton Reset
VIL
VOH
VOL
RESET
RESET
PBRST tPDLY
tPB
tRST
1834_05.eps
VIH
(IMP1834D)
IMP1
IMP183
834/A/D
4/A/D
6408-432-9100/www.impweb.com ©1999 IMP, Inc.
Reset Output Signal
Reset output signals are valid as long as either voltage at 5V
IN
or 3.3V
IN
is above 1.2V. In addition, the IMP1834 has push-pull
outputs that can remain valid below a 1.2V input level. To sink
current below 1.2V, a resistor should be connected from the reset
output to ground. This resistor guarantees a valid reset signal
down to 0V. A 100kΩvalue is suggested.
The IMP1834A open drain reset outputs require pull-up resistors
and must be low enough in value to pull the output into a HIGH
state. Resistor value is not critical in most applications and a value
of 10kΩis suggested. See Figure 5 and Figure 6.
The IMP1834A open drain reset outputs can be connected to the
same potential through a single pull up resistor. In this configura-
tion a failure on either supply will generate an active LOW reset.
If the outputs are pulled-up to different voltages, the reset outputs
(pin 2 and pin 7) should not be connected. See Figure 7.
Figure 5. IMP1834 RESET Valid to 0V
RESET
100kΩ
1834_06.eps
µP
Input
Figure 6. IMP1834A Open Drain Output Pull-Up Resistor
1834_07.eps
5VIN
10kΩ
3.3V
13.3VIN
5VRESET
23.3VRESET
5VTOL
IMP1834A
3
43.3VTOL
GND
8
7
6
5
PBRST
5V
10kΩ
Figure 7. IMP1834A Wired “OR” Connection
1834_08.eps
5VIN
3.3V
13.3VIN
5VRESET
23.3VRESET
5VTOL
IMP1834A
3
43.3VTOL
GND
8
7
6
5
PBRST
5V or 3.3V5V
10kΩ
Application Information
SO (8-Pin)
Plastic DIP (8-Pin)
IMP1
IMP183
834/A/D
4/A/D
Absolute Maximum Ratings
©
1999 IMP, Inc. 408-432-9100/www.impweb.com 7
Package Dimensions
E
E1
D1
D
eA
eB
C
0°–15°
A
eb2
b
A2
LA1
Plastic DIP (8-Pin)a.eps
MicroSO (8-Pin)
sehcnI sretemilliM
niM xaM niM xaM
*)niP-8(OSorciM
A ––––– 3340.0 –––– 01.1
1A 0200.0 9500.0 050.0 51.0
2A 5920.0 4730.0 57.0 59.0
b 8900.0 7510.0 52.0 04.0
C 1500.0 1900.0 31.0 32.0
D 2411.0 0221.0 09.2 01.3
e CSB6520.0 CSB56.0
E CSB391.0 CSB09.4
1E 2411.0 0221.0 09.2 01.3
L 7510.0 6720.0 04.0 07.0
a °0 °6 °0 °6
**)niP-8(OS
A 350.0 960.0 53.1 57.1
1A 400.0 010.0 01.0 52.0
B 310.0 020.0 33.0 15.0
C 700.0 010.0 91.0 52.0
e 050.0 72.1
E 051.0 751.0 08.3 00.4
H 822.0 442.0 08.5 02.6
L 610.0 050.0 04.0 72.1
D 981.0 791.0 08.4 00.2
***)niP-8(PIDcitsalP
A ––––– 012.0 –––– 33.5
1A 510.0 ––––– 83.0 –––––
2A 511.0 591.0 29.2 59.4
b 410.0 220.0 63.0 65.0
2b 540.0 070.0 41.1 87.1
3b 030.0 540.0 08.0 41.1
D 553.0 004.0 20.9 61.01
1D 500.0 ––––– 31.0 –––––
E 003.0 523.0 26.7 62.8
1E 042.0 082.0 01.6 11.7
e 001.0 ––––– 45.2
Ae 003.0 ––––– 26.7
Be ––––– 034.0 ––––– 29.01
Ce ––––– 060.0
L 511.0 051.0 29.2 18.3
** AA781-OMgniwarDCEDEJ*
*AA211-SMgniwarDCEDEJ**
AB100-SMgniwarDCEDEJ***
3ta.40t_4381
IMP1
IMP183
834/A/D
4/A/D
IMP, Inc.
Corporate Headquarters
2830 N. First Street
San Jose, CA 95134-2071
Tel: 408-432-9100
Tel: 800-438-3722
Fax: 408-434-0335
Fax-on-Demand: 1-800-249-1614 (USA)
Fax-on-Demand: 1-303-575-6156 (International)
e-mail: info@impinc.com
http://www.impweb.com
The IMP logo is a registered trademark of IMP, Inc.
All other company and product names are trademarks of their respective owners.
©1999 IMP, Inc.
Printed in USA
Publication #: 1009
Revision: A
Issue Date: 07/02/99
Type: Preliminary