SY58605U 3.2Gbps Precision, LVDS Buffer with Internal Termination and Fail Safe Input General Description The SY58605U is a 2.5V, high-speed, fully differential LVDS buffer optimized to provide less than 10pspp total jitter. The SY58605U can process clock signals as fast as 2GHz or data patterns up to 3.2Gbps. The differential input includes Micrel's unique, 3-pin input termination architecture that interfaces to LVPECL, LVDS or CML differential signals, (AC- or DC-coupled) as small as 100mV (200mVpp) without any level-shifting or termination resistor networks in the signal path. For AC-coupled input interface applications, an integrated voltage reference (VREF-AC) is provided to bias the VT pin. The output is 325mV LVDS, with rise/fall times guaranteed to be less than 100ps. The SY58605U operates from a 2.5V 5% supply and is guaranteed over the full industrial temperature range (-40C to +85C). For applications that require CML or LVPECL outputs, consider Micrel's SY58603U and SY58604U, buffers with 400mV and 800mV output swings respectively. The SY58605U is part of Micrel's (R) high-speed, Precision Edge product line. Datasheets and support documentation can be found on Micrel's web site at: www.micrel.com. Functional Block Diagram Precision Edge (R) Features * Precision 325mV LVDS buffer * Guaranteed AC performance over temperature and voltage: - DC-to > 3.2Gbps throughput - <300ps typical propagation delay (IN-to-Q) - <100ps rise/fall times * Fail Safe Input - Prevents output from oscillating when input is invalid * Ultra-low jitter design - <1psRMS cycle-to-cycle jitter - <10psPP total jitter - <1psRMS random jitter - <10psPP deterministic jitter * High-speed LVDS output * 2.5V 5% power supply operation * Industrial temperature range: -40C to +85C * Available in 8-pin (2mm x 2mm) DFN package Applications * * * * All SONET clock and data distribution Fibre Channel clock and data distribution Gigabit Ethernet clock and data distribution Backplane distribution Markets * * * * * * * Storage ATE Test and measurement Enterprise networking equipment High-end servers Access Metro area network equipment Precision Edge is a registered trademark of Micrel, Inc. Micrel Inc. * 2180 Fortune Drive * San Jose, CA 95131 * USA * tel +1 (408) 944-0800 * fax + 1 (408) 474-1000 * http://www.micrel.com August 2007 M9999-082907-B hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58605U Ordering Information(1) Part Number Package Type Operating Range Package Marking Lead Finish SY58605UMG DFN-8 Industrial 605 with Pb-Free bar-line indicator NiPdAu Pb-Free DFN-8 Industrial 605 with Pb-Free bar-line indicator NiPdAu Pb-Free (2) SY58605UMGTR Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC Electricals only. 2. Tape and Reel. Pin Configuration 8-Pin DFN Pin Description Pin Number Pin Name 1, 4 IN, /IN Differential Input: This input pair is the differential signal input to the device. Input accepts DC-coupled differential signals as small as 100mV (200mVPP). Each pin of this pair internally terminates with 50 to the VT pin. If the input swing falls below a certain threshold (typically 30mV), them the Fail Safe Input (FSI) feature will guarantee a stable output by latching the output to its last valid state. See "Input Interface Applications" subsection for more details. 2 VT Input Termination Center-Tap: Each input terminates to this pin. The VT pin provides a center-tap for each input (IN, /IN) to a termination network for maximum interface flexibility. See "Input Interface Applications" subsection for more details. 3 VREF-AC Reference Voltage: This output biases to VCC-1.2V. It is used for AC-coupling input IN and /IN. Connect VREF-AC directly to the VT pin. Bypass with 0.01F low ESR capacitor to VCC. Maximum sink/source current is 1.5mA. See "Input Interface Applications" subsection for more details. 5 GND, Exposed pad Pin Function Ground: Exposed pad must be connected to a ground plane that is the same potential as the ground pin. 6, 7 /Q, Q LVDS Differential Output Pair: The output swing is typically 325mV. Normally terminated with 100 across the pair (Q, /Q). See "LVDS Output Termination" subsection for more details. 8 VCC Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors as close to the VCC pin as possible. August 2007 2 M9999-082907-B hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58605U Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VCC) ............................... -0.5V to +4.0V Input Voltage (VIN) ............................ -0.5V to VCC +0.3V LVDS Output Current (IOUT) .................................. 10mA Input Current Source or Sink Current on (IN, /IN) ............... 50mA Current (VREF) (4) Source or sink current on VREF-AC .............. 1.5mA Maximum operating Junction Temperature .......... 125C Lead Temperature (soldering, 20sec.) .................. 260C Storage Temperature (Ts) .................... -65C to +150C Supply Voltage (VIN) ...................... +2.375V to +2.625V Ambient Temperature (TA) ................... -40C to +85C (3) Package Thermal Resistance DFN Still-air (JA) ............................................ 93C/W Junction-to-board (JB) .......................... 56C/W DC Electrical Characteristics(5) TA = -40C to +85C, unless otherwise stated. Symbol Parameter VCC Power Supply Voltage Range Condition Min Typ Max Units 2.375 2.5 2.625 V ICC Power Supply Current 35 50 mA RDIFF_IN Differential Input Resistance (IN-to-/IN) 100 110 VIH Input HIGH Voltage (IN, /IN) IN, /IN 1.2 VCC V VIL Input LOW Voltage (IN, /IN) IN, /IN 0 VIH-0.1 V VIN Input Voltage Swing (IN, /IN) see Figure 3a, Note 6 0.1 1.7 V VDIFF_IN Differential Input Voltage Swing (|IN - /IN|) see Figure 3b 0.2 VIN_FSI Input Voltage Threshold that Triggers FSI VREF-AC Output Reference Voltage VT_IN Voltage from Input to VT No load, max. VCC 90 VCC-1.3 V 30 100 mV VCC-1.2 VCC-1.1 V 1.28 V Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB. JB and JA values are determined for a 4-layer board in still-air number, unless otherwise stated. 4. Due to the limited drive capability, use for input of the same package only. 5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 6. VIN (max) is specified when VT is floating. August 2007 3 M9999-082907-B hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58605U LVDS Output DC Electrical Characteristics(7) VCC = +2.5V 5%, RL = 100 across the outputs; T A = -40C to +85C, unless otherwise stated. Symbol Parameter Condition Min Typ VOUT Output Voltage Swing See Figure 3a 250 325 mV VDIFF_OUT Differential Output Voltage Swing See Figure 3b 500 650 mV VOCM Output Common Mode Voltage 1.125 1.20 VOCM Change in Common Mode Voltage -50 Max Units 1.275 V 50 mV Note: 7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. August 2007 4 M9999-082907-B hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58605U AC Electrical Characteristics VCC = +2.5V 5%, RL = 100 across the outputs, Input tr/tf: <300ps; TA = -40C to +85C, unless otherwise stated. Symbol Parameter Condition Min fMAX Maximum Frequency NRZ Data 3.2 VOUT > 200mV Max Units Gbps 2.0 3 GHz VIN: 100mV-200mV 170 280 420 ps 200mV-800mV 130 200 300 ps 135 ps tPD Propagation Delay tSkew Part-to-Part Skew Note 8 tJitter Data Random Jitter Note 9 1 psRMS Deterministic Jitter Note 10 10 psPP Cycle-to-Cycle Jitter Note 11 1 psRMS Note 12 10 psPP 100 ps 53 % Clock Total Jitter tr, tf IN-to-Q Clock Typ Output Rise/Fall Times (20% to 80%) At full output swing. Duty Cycle Differential I/O 35 47 60 Notes: 8. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective inputs. 9. Random jitter is measured with a K28.7 pattern, measured at fMAX. 10. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 223-1 PRBS pattern. 11. Cycle-to-cycle jitter definition: the variation period between adjacent cycles over a random sample of adjacent cycle pairs. tJITTER_CC = Tn -Tn+1, where T is the time between rising edges of the output signal. 12. Total jitter definition: with an ideal clock input frequency of fMAX (device), no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. August 2007 5 M9999-082907-B hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58605U Functional Description Input Clock Failure Case If the input clock fails to a floating, static, or extremely low signal swing, the FSI function will then eliminate a metastable condition and guarantee a stable output. No ringing and no undetermined state will occur at the output under these conditions. Note that the FSI function will not prevent duty cycle distortion in case of a slowly deteriorating (but still toggling) input signal. Due to the FSI function, the propagation delay will depend on rise and fall time of the input signal and on its amplitude. Refer to "Typical Characteristics" for detailed information. Fail-Safe Input (FSI) The input includes a special failsafe circuit to sense the amplitude of the input signal and to latch the outputs when there is no input signal present, or when the amplitude of the input signal drops sufficiently below 100mVPK (200mVPP), typically 30mVPK. Maximum frequency of SY58605U is limited by the FSI function. Timing Diagrams Figure 1a. Propagation Delay Figure 1b. Fail Safe Feature August 2007 6 M9999-082907-B hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58605U Typical Characteristics VCC = 2.5V, GND = 0V, VIN = 100mV, RL = 100 across the outputs, T A = 25C, unless otherwise stated. August 2007 7 M9999-082907-B hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58605U Functional Characteristics VCC = 2.5V, GND = 0V, VIN = 250mV, Data Pattern: 2 -1, RL = 100 across the outputs, T A = 25C, unless otherwise stated. 23 August 2007 8 M9999-082907-B hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58605U Functional Characteristics (continued) VCC = 2.5V, GND = 0V, VIN = 100mV, RL = 100 across the outputs, TA = 25C, unless otherwise stated. August 2007 9 M9999-082907-B hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58605U Input Stage Figure 2. Simplified Differential Input Buffer August 2007 Figure 3a. Single-Ended Swing Figure 3c. LVDS Common Mode Measurement Figure 3b. Differential Swing Figure 3d. LVDS Differential Measurement 10 M9999-082907-B hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58605U Input Interface Applications Figure 4a. CML Interface (DC-Coupled) Figure 4b. CML Interface (AC-Coupled) Figure 4c. LVPECL Interface (DC-Coupled) Option: May connect VT to VCC Figure 4d. LVPECL Interface (AC-Coupled) Figure 4e. LVDS Interface Related Product and Support Documents Part Number Function Data Sheet Link SY58603U 4.25Gbps Precision CML Buffer with Internal Termination and Fail Safe Input http://www.micrel.com/page.do?page=/productinfo/products/sy58603u.shtml SY58604U 3.2Gbps Precision LVPECL Buffer with Internal Termination and Fail Safe Input http://www.micrel.com/page.do?page=/productinfo/products/sy58604u.shtml HBW Solutions New Products and Termination Application Notes http://www.micrel.com/page.do?page=/productinfo/as/HBWsolutions.shtml August 2007 11 M9999-082907-B hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58605U Package Information 8-Pin (2mm x 2mm) DFN MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2006 Micrel, Incorporated. August 2007 12 M9999-082907-B hbwhelp@micrel.com or (408) 955-1690 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Micrel: SY58605UMG TR SY58605UMG-TR