AAT2783IRN-AAE-T1 - AnalogicTech

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

2783.2008.03.1.0 1

www.analogictech.com

General Description

The AAT2783 provides three independently regulated

DC outputs: two step-down (Buck) regulators and a

single low input voltage, low drop-out (LDO) regulator.

The input voltage range for the step-down regulators is

2.7V to 5.5V, while the LDO regulator allows inputs from

1.5V to 5.5V. The low input voltage LDO regulator allows

high efficiency, step-down, low noise outputs. In addi-

tion, the LDO input may be connected to step-down

outputs 1 or 2.

The Channel 1 and 2 step-down regulators can deliver up

to 1000mA and 400mA output current, respectively.

Step-down output voltages are set with external resis-

tors. Switching frequency is set at 1.3MHz to ensure

small external filtering components. Current mode con-

trol assures fast transient response and stable operation

across the operating range. The Channel 3 LDO regulator

can deliver up to 400mA with -80dB power supply rejec-

tion ratio (PSRR) and 65VRMS output noise with an

optional bypass capacitor. The LDO output voltage is fac-

tory set with a default voltage of 1.20V. Independent

enable and input pins are provided. The device consumes

low quiescent current and provides high efficiency across

the load range for maximum life in battery systems.

The AAT2783 is available in the Pb-free, 16-pin TDFN34

package and is rated over the -40°C to 85°C operating

temperature range.

Features

• V

IN Range Step-Down (Buck): 2.7V to 5.5V

• V

IN Range Low Drop-Out (LDO): 1.5V to 5.5V

• Output Voltage Range: 0.6V to VIN

• Step-Down Output Current:

 Channel 1: 1000mA

 Channel 2: 400mA

• LDO Output Current:

 Channel 3: 400mA

• High Efficiency with Low RDS(ON) Switches

 Step-Down up to 97%

 LDO Regulator up to 80%

• Total Quiescient Current 135A

• Shutdown Current: 1A

• Step-Down Converters

 1.3MHz Switching Frequency

 Current Mode Control

 Cycle-by-Cycle Current Limit

 High Efficiency Light-Load Mode Operation

• LDO Converter

 Ultra Low Noise with Bypass Capacitor

 Over-Current Protection

• 200s Internal Soft Start

• Over-Temperature Protection

• TDFN34-16 Low Profile Package

• -40°C to 85°C Temperature Range

Applications

• Cellular and SmartPhones

• Microprocessor / DSP Core / IO Power

• PDAs and Handheld Computers

• Portable Media Players

• Wireless Data Systems

Typical Application

AAT2783

VP2

EN2

AGND

FB2

LX 2

VOUT1

1.2V, 1.0A

VOUT2

1.7V, 0.4A

VOUT3

1.2V, 400mA

10μF

BYP

OUT3

VIN3

EN3

2.2μF

2.2 μ H

4.7μF

59 .0k

107k

0.01 μ F

AGND

VP1

EN1

VIN

GND1

FB1

LX1

10 μF C4

0.1μF

1.5 μ H

10μF

59 .0k

VIN

2.7V –5.5V

GND2

VIN = VOUT2

GND2

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

2 2783.2008.03.1.0

www.analogictech.com

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

2 2783.2008.03.1.0

www.analogictech.com

Pin Descriptions

Pin # Symbol Function

1 FB2 Feedback input pin for Channel 2. Connect an external resistor divider to this pin to program the output

voltage to the desired value.

2 EN3 Enable Channel 3 input. Pull logic high to enable LDO Channel 3 converter. Pull logic low to disable. Chan-

nel 3 will turn on when EN3 is high and Channel 2 is in regulation.

3 VIN Input voltage pin. Connect this pin to input voltage source.

4 AGND Analog ground pin. Connect to ground plane.

5 BYP LDO bypass pin. Connect a 10nF ceramic capacitor from this pin to ground plane for low output noise.

6 EN2 Enable Channel 2 input. Pull logic high to enable step-down Channel 2 converter. Pull logic low to disable.

7 EN1 Enable Channel 1 input. Pull logic high to enable step-down Channel 1 converter. Pull logic low to disable.

8 FB1 Channel 1 feedback pin internally set to 0.6V. Connect resistor divider and optional feed-forward capaci-

tor to this pin to set the Channel 1 voltage and adjust transient load response (see Table 1).

9 LX1 Channel 1 converter switching pin. Connect Channel 1 inductor to this pin. Inductor value is determined

by output voltage (see Table 2).

10 GND1 Power return pin for output 1 step-down converter. Connect returns of Channel 1 input and output ca-

pacitors close to this pin for best noise performance.

11 VP1 Input supply voltage pin for Channel 1 step-down converter. Connect the input capacitor close to this pin

for best noise performance.

12 VP2 Input supply voltage pin for Channel 2 step-down converter. Connect the input capacitor close to this pin

for best noise performance.

13 GND2 Power return pin for Channel 2 step-down converter. Connect returns of Channel 2 input and output ca-

pacitors close to this pin for best noise performance.

14 LX2 Channel 2 converter switching pin. Connect output 2 inductor to this pin. Inductor value is determined by

output voltage (see Table 2).

15 VIN3 Input supply voltage pin for output 3 low-noise LDO converter. Connect the input capacitor close to this

pin for best noise performance.

16 OUT3 Channel 3 LDO step-down converter output pin. Connect this pin to a 10F ceramic capacitor.

EP Exposed pad. Connect to ground as close as possible to the device. Use properly sized vias for thermal

coupling to the ground plane. See section on PCB layout guidelines.

Pin Configuration

TDFN34-16

(Top View)

VIN

GND

BYP

FB2

EN3

EN2

EN1

FB1

LX2

GND2

VP2

OUT3

VIN3

VP1

GND1

LX1

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

2783.2008.03.1.0 3

www.analogictech.com

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

2783.2008.03.1.0 3

www.analogictech.com

Absolute Maximum Ratings1

Symbol Description Value Units

VIN VP1, VP2, VIN to GND1, GND2, AGND -0.3 to 6.0 V

VIN3 VIN3 to GND1, GND2, AGND -0.3 to 6.0 V

VOUT3 OUT3 to GND1, GND2, AGND -0.3 to VIN3 + 0.3 V

VLX LX1, LX2 to GND1, GND2, AGND -0.3 to VIN + 0.3 V

VFB FB1, FB2, BYP to GND1, GND2, AGND -0.3 to VIN + 0.3 V

VEN EN1, EN2, EN3 to GND1, GND2, AGND -0.3 to 6.0 V

TJOperating Junction Temperature Range -40 to 150 °C

TLEAD Maximum Soldering Temperature (at leads, 10 sec) 300 °C

Thermal Information

Symbol Description Value Units

PD Maximum Power Dissipation22.0 W

ΘJA Thermal Resistance350 °C/W

1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions

specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.

2. Derate 20mW/°C above 25°C ambient temperature.

3. Mounted on an FR4 board with exposed paddle connected to ground plane.

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

4 2783.2008.03.1.0

www.analogictech.com

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

4 2783.2008.03.1.0

www.analogictech.com

Electrical Characteristics1

VP1 = VP2 = VIN = 3.3V; VIN3=1.7V, TA = -40°C to 85°C, unless noted otherwise. Typical values are at TA = 25°C.

Symbol Description Conditions Min Typ Max Units

General

VIN Input Voltage 2.7 5.5 V

VUVLO UVLO Threshold

VP1 Rising 2.7 V

VP1 Hysteresis 140 mV

VP1 Falling 2.1 V

IQQuiescent Current No load; EN1 = EN2 =EN3 = VIN 240 A

ISHDN Shutdown Current EN1 = EN2 =EN3 = GND 1.0 A

TSD

Over Temperature Shutdown

Threshold 130 °C

THYS

Over Temperature Shutdown

Hysteresis 20 °C

VIL Enable Threshold Low For EN1, EN2, and EN3 0.6 V

VIH Enable Threshold High For EN1, EN2, and EN3 1.4 V

IEN Enable Input Current VIN = VP1 = VP2 = VEN1 = VEN2 = VEN3 = 5.5V -1.0 1.0 A

Channel 1: 1000mA Step-down (Buck) Converter

VP1 Input Voltage 2.7 5.5 V

VOUT1 Output Voltage Range 0.6 VP1 V

VOUT1(TOL) Output Voltage Tolerance IOUT1 = 0 to 1000mA; VP1 = 2.7 to 5.5V -3.0 3.0 %

VFB1 Feedback Pin Voltage 0.591 0.6 0.609 V

VLOADREG1 Load Regulation IOUT1 = 0 to 1000mA 0.2 %

VLINEREG1 Line Regulation VP1 = 2.7 to 5.5V 0.3 %

IQ1 Quiescent Current No load; EN1 = VIN; EN2 = EN3 = GND 65 A

ILIM1 P-Channel Current Limit 1.7 A

RDS(ON)H1 High Side Switch On-Resistance 250 m

RDS(ON)L1 Low Side Switch On-Resistance 190 m

FOSC1 Oscillator Frequency 1.3 MHz

TS1 Start-Up Time From Enable to Output Regulation 200 s

1. The AAT2783 is guaranteed to meet performance specifications over the –40°C to +85°C operating temperature range and is assured by design, characterization and correla-

tion with statistical process controls.

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

2783.2008.03.1.0 5

www.analogictech.com

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

2783.2008.03.1.0 5

www.analogictech.com

Electrical Characteristics1

VP1 = VP2 = VIN = 3.3V; VIN3=1.7V, TA = -40°C to 85°C, unless noted otherwise. Typical values are at TA = 25°C.

Symbol Description Conditions Min Typ Max Units

Channel 2: 400mA Step-down (Buck) Converter

VP2 Input Voltage 2.7 5.5 V

VOUT2 Output Voltage Range 0.6 VP2 V

VOUT2(TOL) Output Voltage Tolerance IOUT2= 0 to 400mA; VP1 = 2.7 to 5.5V -3.0 3.0 %

VFB2 Feedback Pin Voltage 0.591 0.6 0.609 V

VLOADREG2 Load Regulation IOUT2 = 0 to 400mA 0.5 %

VLINEREG2 Line Regulation VP2 = 2.7 to 5.5V 0.3 %

IQ2 Quiescent Current No Load; EN2 = VIN; EN1 = EN3 = GND 65 A

ILIM2 P-Channel Current Limit 1.7 A

RDS(ON)H2 High Side Switch On-Resistance 250 m

RDS(ON)L2 Low Side Switch On-Resistance 190 m

FOSC2 Oscillator Frequency 1.3 MHz

TS2 Start-Up Time From Enable to Output Regulation 200 s

Channel 3: 400mA Low Dropout (LDO) Converter

VIN3 Input Voltage VOUT3 + VDO3 5.5 V

VDO3 Dropout Voltage IOUT3 = 150mA; VOUT3 > 1.20V 140 mV

IOUT3 = 400mA; VOUT3 > 1.20V 300

VOUT3 LDO Output Voltage Tolerance VIN3 = VOUT3 + VDO3 to 5.5V; IOUT3 = 0mA

to 400mA 1.164 1.200 1.236 V

IOUT3 Max Output Current VOUT3 = 1.2V 400 mA

ISC Short-Circuit Current VOUT3 < 0.4V 1.1 A

IQQuiescent Current No Load; EN1 = EN2 = GND; EN3 = VIN 70 A

TSStart-Up Time From Enable to Output Regulation 200 s

PSRR Power Supply Rejection Ratio

10Hz, IOUT3 = 10mA 85 dB

3kHz, IOUT3 = 10mA 80 dB

30kHz, IOUT3 = 10mA 60 dB

300kHz, IOUT3 = 10mA 55 dB

eNOutput Noise BW = 100Hz to 300kHz, CBYP = 10nF,

IOUT3 = 10mA 65 VRMS

1. The AAT2783 is guaranteed to meet performance specifications over the –40°C to +85°C operating temperature range and is assured by design, characterization and correla-

tion with statistical process controls.

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

6 2783.2008.03.1.0

www.analogictech.com

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

6 2783.2008.03.1.0

www.analogictech.com

Typical Characteristics

Step-Down Converter and LDO Input

Current vs. Input Voltage

(VEN1 = VEN2 = VEN3 = VIN)

Input Voltage (V)

Input Current (µA)

100

110

120

130

140

150

160

170

180

2.5 3 3.5 4 4.5 5 5.5 6

85°C

25°C

-40°C

Step-Down Converter Switching Frequency

vs. Temperature

(VIN = 3.3V; IOUT1 = 1A; IOUT2 = 0.4A)

Temperature (°C)

Switching Frequency (MHz)

1.25

1.26

1.27

1.28

1.29

1.30

1.31

-40 -20 0 20 40 60 80 100

VOUT2 = 1.7V

VOUT1 = 1.2V

Step-Down Converter Switching Frequency

vs. Input Voltage

(IOUT1 = 1A; IOUT2 = 0.4A)

Input Voltage (V)

Frequency Variation (%)

-3

-2

-1

2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5

VOUT2 = 1.7V

VOUT1 = 1.2V

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

2783.2008.03.1.0 7

www.analogictech.com

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

2783.2008.03.1.0 7

www.analogictech.com

Typical Characteristics—Buck Converter 1

Step-Down Converter 1 Efficiency vs. Load

(VOUT1 = 1.2V; L = 1.7µH)

Output Current (mA)

Efficiency (%)

100

0.1 1 10 100 1000 10000

VIN = 2.7V

VIN = 3.3V

VIN = 4.2V

VIN = 3.6V

VIN = 5V

VIN = 5.5V

Step-Down Converter 1 DC Regulation

(VOUT1 = 1.2V; VIN = 2.7 to 5.5V; L = 1.7µH)

Output Current (mA)

Output Error (%)

-0.50

-0.25

0.00

0.25

0.50

0.1 1 10 100 1000 10000

VIN = 2.7V

VIN = 3.3V

VIN = 4.2V

VIN = 3.6V

VIN = 5V

VIN = 5.5V

Step-Down Converter 1 VIH and VIL

vs. Input Voltage

(VEN1 = VIN; VEN2 = 0V; VEN3 = 0V)

Input Voltage (V)

VIH and VIL (V)

0.6

0.7

0.8

0.9

1.0

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

VIH

VIL

Step-Down Converter 1 Input Current

vs. Input Voltage

(VEN1 = VIN; VEN2 = VEN3 = 0V)

Input Voltage (V)

Input Current (µA)

-40°C

2.5 3 3.5 4 4.5 5 5.5 6

85°C

25°C

Step-Down Converter 1 Line Regulation

(VOUT1 = 1.2V; IOUT1 = 0.1mA to 1A; L = 1.7µH)

Input Voltage (V)

Accuracy (%)

-0.5

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

2.5 3.0 3.5 4.0 4.5 5.0 5.5

IOUT1 = 0.10mA

IOUT1 = 10mA

IOUT1 = 1000mA

IOUT1 = 100mA

Step-Down Converter Output 1 Voltage Error

vs. Temperature

(VIN = 3.3V; VOUT1 = 1.2V, IOUT1 = 1A)

Temperature (°C)

Output Voltage Error (%)

-1.00

-0.75

-0.50

-0.25

0.00

0.25

0.50

0.75

1.00

-50 -25 0 25 50 75 100

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

8 2783.2008.03.1.0

www.analogictech.com

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

8 2783.2008.03.1.0

www.analogictech.com

Typical Characteristics—Buck Converter 1

Step-Down Converter 1 Output Ripple

(VIN = 3.3V; VOUT1 = 1.2V; IOUT1 = 1A)

Time (500ns/div)

Output Voltage

(AC coupled) (top) (V)

Inductor Current

(bottom) (A)

1.18

1.20

1.22

0.8

1.0

1.2

Step-Down Converter 1 Output Ripple

(VIN = 3.3V; VOUT1 = 1.2V; IOUT1 = 1mA)

Time (10µs/div)

Output Voltage

(AC coupled) (top) (V)

Inductor Current

(bottom) (A)

1.18

1.20

1.22

0.0

0.2

Step-Down Converter 1 Line Transient Response

(VIN = 3V to 4V; VOUT1 = 1.2V; IOUT1 = 1A; COUT = 10µF)

Time (100µs/div)

Input Voltage (top) (V)

Output Voltage

(bottom) (A)

1.0

1.1

1.2

1.3

1.4

Step-Down Converter 1 Load Transient Response

(IOUT1 = 750mA to 1A; VIN = 3.3V; COUT1 = 10µF; CFF = 100pF)

Time (100µs/div)

Output Voltage (AC coupled)

(middle) (V)

Inductor Current (top) (A)

Output Current (bottom) (A)

1.15

1.20

1.25

0.5

1.0

0.75A

Step-Down Converter 1 Soft Start

(VIN = 3V; VOUT1 = 1.2V; IOUT1 = 1A; CFF = 100pF)

Time (50µs/div)

Enable Voltage (top) (V)

Output Voltage (middle) (V)

Inductor Current (bottom) (A)

0.0

0.5

1.0

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

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AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

2783.2008.03.1.0 9

www.analogictech.com

Typical Characteristics—Buck Converter 2

Step-Down Converter 2 Efficiency vs. Load

(VOUT2 = 1.7V; L = 2.2µH)

Output Current (mA)

Efficiency (%)

100

0.1 1 10 100 1000 10000

VIN = 2.7V

VIN = 3.3V

VIN = 4.2V

VIN = 3.6V

VIN = 5V

VIN = 5.5V

Step-Down Converter 2 DC Regulation

(VOUT2 = 1.7V; VIN = 2.7V to 5.5V; L = 2.2µH)

Output Current (mA)

Output Error (%)

-1.00

-0.75

-0.50

-0.25

0.00

0.25

0.50

0.1 1 10 100 1000 10000

VIN = 2.7V

VIN = 3.3V

VIN = 4.2V

VIN = 3.6V

VIN = 5V

VIN = 5.5V

Step-Down Converter 2 VIH and VIL

vs. Input Voltage

(VEN1 = 0V; VEN2 = VIN; VEN3 = 0V)

Input Voltage (V)

VIH and VIL (V)

0.6

0.7

0.8

0.9

1.0

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

VIH

VIL

Step-Down Converter 1 Input Current

vs. Input Voltage

(VEN2 = VIN; VEN1 = VEN3 = 0V)

Input Voltage (V)

Input Current (µA)

2.5 3 3.5 4 4.5 5 5.5 6

85°C

25°C

-40°C

Step-Down Converter Output 2 Voltage Error

vs. Temperature

(VIN = 3.3V; VOUT2 = 1.7V, IOUT2 = 400mA)

Temperature (°C)

Output Voltage Error (%)

-1.00

-0.75

-0.50

-0.25

0.00

0.25

0.50

0.75

1.00

-50 -25 0 25 50 75 10

Step-Down Converter 2 Line Regulation

(VOUT2 = 1.7V; IOUT2 = 0.1mA to 400mA; L = 2.2µH)

Input Voltage (V)

Accuracy (%)

-0.5

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

2.5 3.0 3.5 4.0 4.5 5.0 5.

IOUT2 = 0.10mA

IOUT2 = 10mA

IOUT2 = 400mA

IOUT2 = 100mA

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

10 2783.2008.03.1.0

www.analogictech.com

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

10 2783.2008.03.1.0

www.analogictech.com

Typical Characteristics—Buck Converter 2

Step-Down Converter 2 Output Ripple

(VIN = 3.3V; VOUT2 = 1.7V; IOUT2 = 400mA)

Time (500ns/div)

Output Voltage

(AC coupled) (top) (V)

Inductor Current

(bottom) (A)

1.69

1.70

1.71

0.2

0.4

0.6

Step-Down Converter 2 Output Ripple

(VIN = 3.3V; VOUT2 = 1.7V; IOUT2 = 1mA)

Time (10µs/div)

Output Voltage

(AC coupled) (top) (V)

Inductor Current

(bottom) (A)

1.69

1.70

1.71

0.0

0.2

Step-Down Converter 2 Line Transient Response

(VIN = 3V to 4V; VOUT2 = 1.7V; IOUT2 = 0.4A; COUT2 = 10µF)

Time (100µs/div)

Input Voltage (top) (V)

Output Voltage

(bottom) (A)

1.6

1.7

1.8

1.9

Step-Down Converter 2 Load Transient Response

(IOUT2 = 0.3A to 0.4A; VIN = 3.3V; VOUT2 = 1.7V;

COUT2 = 4.7µF; CFF = 100pF)

Time (100µs/div)

Output Voltage (AC coupled)

(middle) (V)

Inductor Current (top) (A)

Output Current (bottom) (A)

1.65

1.70

1.75

0.0

0.2

0.4

0.6

0.4A

0.3A

Step-Down Converter 2 Soft Start

(VIN = 3.3V; VOUT2 = 1.7V; IOUT2 = 500mA; CFF = 100pF)

Time (50µs/div)

Enable Voltage (top) (V)

Output Voltage (middle) (V)

Inductor Current (bottom) (A)

0.0

0.5

1.0

AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

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AAT2783

Triple Output PMIC: Dual Buck with Low-VIN LDOSystemPowerTM

PRODUCT DATASHEET

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Typical Characteristics—LDO

LDO Line Regulation

(VIN3 = VOUT2 = 1.7V; VOUT3 = 1.2V; Vary VIN)

Input Voltage (V)

Accuracy (%)

-0.5

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

2.5 3.0 3.5 4.0 4.5 5.0 5.5

IOUT = 0.1mA to 400mA

LDO VIH and VIL vs. Input Voltage

(VEN1 = 0V; VEN2 = VEN3 = VIN)

Input Voltage (V)

VIH and VIL (V)

0.6

0.7

0.8

0.9

1.0

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

VIH

VIL

LDO Dropout Characteristics

(VIN = 3.3V; Vary VIN3 from 3.3V to 1V; VOUT3 = 1.2V;

IOUT3 = 0.1mA to 400mA; -40°C)

Input Voltage (V)

LDO Output Voltage (V)

1.180

1.185

1.190

1.195

1.200

1.205

1.210

1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.

IOUT3 = 1mA

IOUT3 = 10mA

IOUT3 = 100mA

IOUT3 = 50mA

IOUT3 = 150mA

IOUT3 = 300mA

IOUT3 = 400mA

LDO Dropout Characteristics

(VIN = 3.3V; VIN3 = 3.3V to 1V; VOUT3 = 1.2V;

IOUT3 = 0.1mA to 400mA; 85°C)

Input Voltage (V)

LDO Output Voltage (V)

1.180

1.185

1.190

1.195

1.200

1.205

1.210

1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4

IOUT3 = 0.1mA

IOUT3 = 10mA

IOUT3 = 100mA

IOUT3 = 50mA

IOUT3 = 150mA

IOUT3 = 300mA

IOUT3 = 400mA

LDO Dropout Characteristics

(VIN = 3.3V; VIN3 = 3.3V to 1V; VOUT3 = 1.2V;

IOUT3 = 0.1mA to 400mA; 25°C)

Input Voltage (V)

LDO Output Voltage (V)

1.180

1.185

1.190

1.195

1.200

1.205

1.210

1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4

IOUT3 = 0.1mA

IOUT3 = 10mA

IOUT3 = 100mA

IOUT3 = 50mA

IOUT3 = 150mA

IOUT3 = 300mA

IOUT3 = 400mA

LDO Load Transient Response

(200mA to 400A; VIN = 3.3V; VIN3 = VOUT2 = 1.7V)

LDO Output Voltage (top) (V)

LDO Output Current (bottom) (A)

Time (50µs/div)

1.15

1.20

1.25

0.0

0.2

0.4

0.6

400mA

200mA

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Typical Characteristics—LDO

LDO Output Voltage Noise

(IOUT3 = 10mA; Power BW: 100~300KHz)

Frequency (Hz)

Noise (µV)

0.0

0.7

1.4

2.1

2.8

3.5

4.2

4.9

5.6

100 1000 10000 100000 1000000

LDO Power Supply Rejection Ratio, PSRR

(IOUT3 = 10mA; BW: 100~300KHz)

Frequency (Hz)

Magnitude (dB)

100

120

140

100 1000 10000 100000 1000000

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Functional Block Diagram

Logic

Comp.

Error

Amp

Control

Logic

Error

Amp

Control

Logic

OSCOT

Comp.

VP1

LX1

GND1

VP2

LX2

GND2

VIN3

OUT3

AGND

EN3

FB1

EN1

Logic

Error

Amp

Control

Logic

Voltage

Ref

OCP

FB2

EN2

VIN

BYP

OUT3

Voltage

Ref

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Functional Description

The AAT2783 is a 3-channel high performance power

management IC. Channel 1 is a 1000mA step-down con-

verter. Channel 2 is a 400mA step-down converter.

Channel 3 is a 400mA LDO regulator with low-input volt-

age capability and low output noise for sensitive analog

applications.

The low input voltage capability of the LDO regulator

allows either step-down converter to be tied directly to

the LDO input. This configuration provides the efficiency

benefits of a switching converter plus the low noise ben-

efits of a LDO (low drop-out) regulator.

Channel 1 and 2: 1000/400mA

Step-Down (Buck) Converters

The AAT2783 Channel 1 and 2 step-down converters are

peak current mode PWM converters operating at 1.3MHz

frequency. The input voltage range is 2.7V to 5.5V. The

output voltage range is 0.6V to VIN and is adjustable with

an external resistor divider. The converters provide

internal compensation. Power devices are sized for 1A

output current while maintaining over 85% efficiency at

full load. Peak efficiency is above 95%. Light load effi-

ciency is maintained at greater than 80% down to 85%

of full load current. Channel 2 has excellent transient

response, load and line regulation. Transient response

time is typically less than 20s.

The enable inputs, when pulled low, force the converter

into a low power non-switching state consuming less

than 1A of current.

For overload conditions, the peak input current is limit-

ed. Also, thermal protection completely disables switch-

ing if internal dissipation becomes excessive, thus pro-

tecting the device from damage. The junction over-

temperature threshold is 130°C with 20°C of hysteresis.

Under-voltage lockout (UVLO) guarantees sufficient VIN

bias and proper operation of all internal circuits prior to

activation.

Control Loop

The AAT2783 is a peak current mode step-down con-

verter. The current through the P-channel MOSFET (high

side) is sensed for current loop control, as well as short-

circuit and overload protection. A fixed slope compensa-

tion signal is added to the sensed current to maintain

stability for duty cycles greater than 50%. The peak cur-

rent mode loop appears as a voltage-programmed cur-

rent source in parallel with the output capacitor. The

output of the voltage error amplifier programs the cur-

rent mode loop for the necessary peak switch current to

force a constant output voltage for all load and line con-

ditions. Internal loop compensation terminates the

transconductance voltage error amplifier output. The

reference voltage is internally set to program the con-

verter output voltage greater than or equal to 0.6V.

Soft Start/Enable

Soft start limits the current surge seen at the input and

eliminates output voltage overshoot. When pulled low,

the enable input forces the AAT2783 into a low-power,

non-switching state. The total input current during shut-

down is less than 1A.

Low Dropout Operation

For conditions where the input voltage drops to the out-

put voltage level, the converter duty cycle increases to

100%. As the converter approaches the 100% duty

cycle, the minimum off-time initially forces the high side

on-time to exceed the 1.3MHz clock cycle and reduces

the effective switching frequency. Once the input drops

below the level where the converter can regulate the

output, the high side P-channel MOSFET is enabled con-

tinuously for 100% duty cycle. At 100% duty cycle the

output voltage tracks the input voltage minus the I*R

drop of the high side P-channel MOSFET.

Current Limit and

Over-Temperature Protection

For overload conditions, the peak input current is limit-

ed. To minimize power dissipation and stresses under

current limit and short-circuit conditions, switching is

terminated after entering current limit for a series of

pulses. Switching is terminated for seven consecutive

clock cycles after a current limit has been sensed for a

series of four consecutive clock cycles. Thermal protec-

tion completely disables switching when internal dissipa-

tion becomes excessive. The junction over-temperature

threshold is 130°C with 20°C of hysteresis. Once an

over-temperature or over-current fault conditions is

removed, the output voltage automatically recovers.

Under-Voltage Lockout

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Internal bias of all circuits is controlled via the VIN input.

Under-voltage lockout (UVLO) guarantees sufficient VIN

bias and proper operation of all internal circuitry prior to

activation.

Component Selection

Inductor Selection—Channel 1

The step-down converter uses peak current mode con-

trol with slope compensation to maintain stability for

duty cycles greater than 50%. The output inductor value

must be selected so the inductor current down slope

meets the internal slope compensation requirements.

The inductor should be set equal to the output voltage

numeric value in H. This guarantees that there is suf-

ficient internal slope compensation. Manufacturer’s spec-

ifications list both the inductor DC current rating, which

is a thermal limitation, and the peak current rating,

which is determined by the saturation characteristics.

The inductor should not show any appreciable saturation

under normal load conditions. Some inductors may meet

the peak and average current ratings yet result in exces-

sive losses due to a high DCR. Always consider the

losses associated with the DCR and its effect on the total

converter efficiency when selecting an inductor. For

Channel 1, the 1.5H LQH32PN1R5NN0L series Murata

inductor has a 68.4mΩ worst case DCR and a 1.75A DC

current rating. At full 1A load, the inductor DC loss is

68.4mW which gives less than 6% loss in efficiency for a

1A, 1.2V output.

Inductor Selection—Channel 2

The step-down converter uses peak current mode con-

trol with slope compensation to maintain stability for

duty cycles greater than 50%. The output inductor value

must be selected so the inductor current down slope

meets the internal slope compensation requirements.

The internal slope compensation for the adjustable and

low voltage fixed versions of the AAT2783 is 0.6A/s.

This equates to a slope compensation that is 75% of the

inductor current down slope for a 1.8V output and 2.2H

inductor.

0.75 ⋅ V

m = = = 0.6

0.75 ⋅ 1.8V

2.2µH

µs

0.75 · V

L = = 1.2

· V

= 1.2 1.7V = 2.0µH

0.75

0.6

µs

In this case a standard 2.2H value is selected.

Manufacturer’s specifications list both the inductor DC

current rating, which is a thermal limitation, and the

peak current rating, which is determined by the induc-

tor’s saturation characteristics. The inductor should not

show any appreciable saturation under all normal load

conditions. Some inductors may meet the peak and

average current ratings yet result in excessive losses due

to a high DCR. Always consider the losses associated

with the DCR and its effect on the total converter effi-

ciency when selecting an inductor.

For Channel 2, the 2.2H GLF2518T2R2M series TDK

inductor has a 104m worst case DCR and a 475mA DC

current rating. At full 300mA load, the inductor DC loss

is 10mW which gives less than 1% loss in efficiency for

a 300mA, 3.3V output.

Input Capacitor

Select a 10F to 22F X7R or X5R ceramic capacitor for

the VP1 and VP2 inputs. To estimate the required input

capacitor size, determine the acceptable input ripple

level (VPP) and solve for C. The calculated value varies

with input voltage and is a maximum when VIN is double

the output voltage.

⎛⎞

· 1 -

⎝⎠

VIN

CIN =

VIN

⎛⎞

- ESR · FS

⎝⎠

VPP

⎛⎞

· 1 - = for VIN = 2 · V

⎝⎠

VIN

CIN(MIN) = 1

⎛⎞

- ESR · 4 · FS

⎝⎠

VPP

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Always examine the ceramic capacitor DC voltage coef-

ficient characteristics when selecting the proper value.

For example, the capacitance of a 10F, 6.3V, X5R

ceramic capacitor with 5.0V DC applied is actually about

6F. The maximum input capacitor RMS current is:

⎛⎞

IRMS = IO · · 1 -

⎝⎠

VIN

The input capacitor RMS ripple current varies with the

input and output voltage and will always be less than or

equal to half of the total DC load current.

⎛⎞

· 1 - = D · (1 - D) = 0.52 =

⎝⎠

VIN

for VIN = 2 · VO

RMS(MAX)

The term

⎛⎞

· 1 -

⎝⎠

VIN

appears in both the input voltage

ripple and input capacitor RMS current equations and is

a maximum when VO is twice VIN. This is why the input

voltage ripple and the input capacitor RMS current ripple

are a maximum at 50% duty cycle. The input capacitor

provides a low impedance loop for the edges of pulsed

current drawn by the AAT2783. Low ESR/ESL X7R and

X5R ceramic capacitors are ideal for this function. To

minimize stray inductance, the capacitor should be

placed as closely as possible to the IC. This keeps the

high frequency content of the input current localized,

minimizing EMI and input voltage ripple. The proper

placement of the input capacitor (C1) can be seen in the

evaluation board layout in the Layout section of this

datasheet (see Figure 2). A laboratory test set-up typi-

cally consists of two long wires running from the bench

power supply to the evaluation board input voltage pins.

The inductance of these wires, along with the low-ESR

ceramic input capacitor, can create a high Q network that

may affect converter performance. This problem often

becomes apparent in the form of excessive ringing in the

output voltage during load transients. Errors in the loop

phase and gain measurements can also result. Since the

inductance of a short PCB trace feeding the input voltage

is significantly lower than the power leads from the

bench power supply, most applications do not exhibit this

problem. In applications where the input power source

lead inductance cannot be reduced to a level that does

not affect the converter performance, a high ESR tanta-

lum or aluminum electrolytic should be placed in parallel

with the low ESR/ESL bypass ceramic capacitor. This

dampens the high Q network and stabilizes the system.

Output Capacitor—Channel 1

The output capacitor limits the output ripple and pro-

vides holdup during large load transitions. A 10F to

22F X5R or X7R ceramic capacitor typically provides

sufficient bulk capacitance to stabilize the output during

large load transitions and has the ESR and ESL charac-

teristics necessary for low output ripple. The output volt-

age droop due to a load transient is dominated by the

capacitance of the ceramic output capacitor. During a

step increase in load current, the ceramic output capac-

itor alone supplies the load current until the loop

responds. Within two or three switching cycles, the loop

responds and the inductor current increases to match

the load current demand. The relationship of the output

voltage droop during the three switching cycles to the

output capacitance can be estimated by:

COUT =

3 · ΔILOAD

VDROOP · FS

Once the average inductor current increases to the DC

load level, the output voltage recovers. The above equa-

tion establishes a limit on the minimum value for the

output capacitor with respect to load transients. The

internal voltage loop compensation also limits the mini-

mum output capacitor value to 10F. This is due to its

effect on the loop crossover frequency (bandwidth),

phase margin, and gain margin. Increased output capac-

itance will reduce the crossover frequency with greater

phase margin.

Output Capacitor—Channel 2

The output capacitor limits the output ripple and limits

droop during large load transitions. A 4.7F to 10F X5R

or X7R ceramic capacitor typically provides sufficient

bulk capacitance to stabilize the output during large load

transitions and has the ESR and ESL characteristics nec-

essary for low output ripple.

Adjustable Output Resistor Selection

The output voltages on the two AAT2783 buck convert-

ers are programmed with external feedback resistors

R3, R5 and R2, R4. To limit the bias current required for

the external feedback resistor string while maintaining

good noise immunity, the minimum suggested value for

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R2, R4 is 59kΩ. Although a larger value will further

reduce quiescent current, it will also increase the imped-

ance of the feedback node, making it more sensitive to

external noise and interference. Table 1 summarizes the

resistor values for various output voltages with R2, R4

set to either 59kΩ for good noise immunity or 221kΩ for

reduced no load input current.

R3, R5

R2, R4

OUT

= 0.6V · 1 +

VOUT (V) R2, R4 = 59kΩ

R3, R5 (kΩ)R2, R4 = 221kΩ

R3, R5 (kΩ)

0.8 19.6 75

0.9 29.4 113

1.0 39.2 150

1.1 49.9 187

1.2 59.0 221

1.3 68.1 261

1.4 78.7 301

1.5 88.7 332

1.8 118 442

1.85 124 464

2.0 137 523

2.5 187 715

3.3 267 1000

Table 1: AAT2783 Resistor Values for Various

Output Voltages.

Channel 3: 400mA Low

Dropout (LDO) Converter

The Channel 3 LDO converter is used to post-regulate the

channel 2 step-down buck converter and provide a quiet

output voltage. The input voltage is 1.7V and the output

voltage is set to 1.2V. The output current is 400 mA. The

channel 2 buck converter efficiency at full load is 85%

and the LDO efficiency is 70%. Combined post-regulated

efficiency at full load is ∼60%. The LDO will turn on when

EN3 is high and VOUT2 has come into regulation.

Component Selection

Input Capacitor

Typically, a 2.2F or larger capacitor is recommended for

CIN in most applications. A CIN capacitor is not required for

basic LDO regulator operation. However, if the AAT2783 is

physically located more than three centimeters from an

input power source, a CIN capacitor will be needed for

stable operation. CIN should be located as closely to the

device VIN3 pin as practically possible. CIN values greater

than 2.2F will offer superior input line transient response

and will assist in maximizing the highest possible power

supply ripple rejection. Ceramic, tantalum, or aluminum

electrolytic capacitors may be selected for CIN. There is no

specific capacitor ESR requirement for CIN. However, for

400mA LDO regulator output operation, ceramic capaci-

tors are recommended for CIN due to their inherent capa-

bility over tantalum capacitors to withstand input current

surges from low impedance sources such as batteries in

portable devices.

Output Capacitor

For proper load voltage regulation and operational stabil-

ity, a capacitor is required between pins VOUT3 and

GND. The COUT capacitor connection to the LDO regulator

ground pin should be made as direct as practically pos-

sible for maximum device performance. The AAT2783

has been specifically designed to function with very low

ESR ceramic capacitors. For best performance, ceramic

capacitors are recommended. Typical output capacitor

values for maximum output current conditions range

from 4.7F to 10F. Applications utilizing the exception-

ally low output noise and optimum power supply ripple

rejection characteristics of the AAT2783 should use 10F

or greater for COUT

. If desired, COUT may be increased

without limit.

Thermal Calculations

There are three types of losses associated with the

AAT2783 step-down converters: switching losses, con-

duction losses, and quiescent current losses. Conduction

losses are associated with the RDS(ON) characteristics of

the power output switching devices. Switching losses are

dominated by the gate charge of the power output

switching devices. At full load, assuming continuous con-

duction mode (CCM), a simplified form of the losses for

each step-down is given by:

PTOTAL(Step-down)

2 · (RDS(ON)H · VO + RDS(ON)L · [VIN - VO])

VIN

+ [(tsw · FS · IOUT + IQ) · VIN]

IQ is the step-down converter quiescent current. The

term tsw is used to estimate the full load step-down con-

verter switching losses. For the condition where the

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step-down converter is in dropout at 100% duty cycle,

the total device dissipation reduces to:

PTOTAL(Step-down) = IO

2 · RDSON(H) + IQ · VIN

Since RDS(ON), quiescent current, and switching losses all

vary with input voltage, the total losses should be inves-

tigated over the complete input voltage range.

The AAT2783 LDO is designed to deliver a continuous

output load current up to 400mA under normal operating

conditions. The limiting characteristic for the maximum

output load safe operating area is essentially package

power dissipation and the internal preset thermal limit of

the device. In order to obtain high operating currents,

careful device layout and circuit operating conditions

must be taken into account.

This calculation accounts for the total power dissipation

of the LDO regulator, including that caused by ground

current.

PTOTAL(LDO) = (VIN3 - VOUT3)IOUT3 + (VIN3 - IQ3)

Add the total losses of the two step-down converters and

the LDO to determine the max junctions temperature.

The maximum junction temperature can be derived from

the JA for the TDFN34-16 which is 50°C/W.

TJ(MAX) = PTOTAL · ΘJA + TAMB

Layout

The suggested PCB layout for the AAT2783 is shown in

Figures 2 and 3. The following guidelines should be used

to help ensure a proper layout.

1. The power input capacitors (C6) should be connected

as closely as possible to VP1 and VP2, The LDO input

capacitor (C3) should be close to VIN3 as shown in

Figure 2. Due to the pin placement of VP1, VP2 and

VIN3 for all converters, proper decoupling is not pos-

sible with just one input capacitor.

2. C4 is a bypass capacitor for the VIN supply pin for

the device

3. C8 and L1, C5 and L2 should be connected as close-

ly as possible. The connection of L1 and L2 to the

LX1 and LX2 pins should be as short as possible.

4. The feedback trace or FB pin should be separate

from any power trace and connect as closely as pos-

sible to the load point. Sensing along a high-current

load trace will degrade DC load regulation.

5. The resistance of the trace from the load returns to

GND1, GND2, and AGND should be kept to a mini-

mum. This will help to minimize any error in DC

regulation due to differences in the potential of the

internal signal ground and the power ground.

6. Connect unused signal pins to ground to avoid

unwanted noise coupling.

7. For good thermal coupling, PCB vias are required

from the pad for the TDFN paddle to the ground

plane. The via diameter should be 0.3mm to 0.33mm

and positioned on a 1.2mm grid.

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AAT2783 Schematic

VCC

VOUT2

VOUT1

VOUT3

EN1

EN2

EN3

1.5μH

2.2 μHL2

VCC

VCC 59K

10μF

VCC

EN1

EN2

EN3

10μF

0.1 μF

0.01μF

10μF

2.2μF

59K

R3 107K

GND

N.A.

4.7μF

59K

1VOUT1

VOUT2

VCC

GND

FB2

VP2 12

LX1 9

EN1

BYP

VIN3 15

GND2 13

OUT3 16

VP1 11

FB1

GND1 10

EN2

AGND

LX2 14

VIN

EN3

U1 AAT2783

1.2 V@1 A

1.7V@0.4A

Symbol Part Number Description Quantity

U1 AAT2783 AnalogicTech AAT2783 Two Buck, One LDO 3x4 TDFN 1

L2 GLC2518T2R2M TDK 2.2H Chip Inductor, ISAT = 475mA, 1007 case 2

L1 LQH32PN1R5NN0L Murata 1.5H Inductor, ISAT = 1.75A, 3.2x2.5x1.7mm 1

C2, C6, C8 *Generic, MLC, 0603, 10F/6.3V Cap 3

C2, C5 *Generic, MLC, 0603, 4.7F/6.3V Cap 2

C9 Generic, MLC, 0402, 56pF/50V 1

R2-R6 Generic, 0402 Resistors 6

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Figure 2: AAT2783 Evaluation Board Component Side Layout.

Figure 3: AAT2783 Evaluation Board Solder Side Layout.

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Ordering Information

Package

Voltage

Marking1Part Number (Tape and Reel)2

Channel 1 Channel 2 Channel 3

TDFN34-16 0.6 0.6 1.2 3BXYY AAT2783IRN-AAE-T1

All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means semiconductor

products that are in compliance with current RoHS standards, including the requirement that lead not exceed

0.1% by weight in homogeneous materials. For more information, please visit our website at

http://www.analogictech.com/about/quality.aspx.

Legend

Voltage Code

Adjustable (0.6) A

1.2 E

Package Information

TDFN34-16

3.000

0.050 1.600

0.050

0.050 0.229

0.051

(4x)

0.850 MAX

4.000

0.050

3.300

0.050

Index Area

Detail "A"

Top View Bottom View

Side View

0.350

0.100

0.230

0.0500.450

0.050

Detail "A"

Pin 1 Indicator

(optional)

C0.3

All dimensions in millimeters.

1. XYY = assembly and date code.

2. Sample stock is generally held on part numbers listed in BOLD.

3. The leadless package family, which includes QFN, TQFN, DFN, TDFN and STDFN, has exposed copper (unplated) at the end of the lead terminals due to the manufacturing

process. A solder fillet at the exposed copper edge cannot be guaranteed and is not required to ensure a proper bottom solder connection.

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Phone (408) 737-4600

Fax (408) 737-4611

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property rights are implied. AnalogicTech reserves the right to make changes to their products or speciﬁ cations or to discontinue any product or service without notice. Except as provided in AnalogicTech’s terms and

conditions of sale, AnalogicTech assumes no liability whatsoever, and AnalogicTech disclaims any express or implied warranty relating to the sale and/or use of AnalogicTech products including liability or warranties

relating to ﬁ tness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. In order to minimize risks associated with the customer’s applications, adequate

design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. Testing and other quality control techniques are utilized to the extent AnalogicTech deems necessary to

support this warranty. Speciﬁ c testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other

brand and product names appearing in this document are registered trademarks or trademarks of their respective holders.