e
EPAD
TM
®
N
A
B
L
E
D
E
ADVANCED
LINEAR
DEVICES, INC.
ORDERING INFORMATION
PC, SC PACKAGES
PA, SA PACKAGES
PIN CONFIGURATION
* Contact factory for industrial or military temp. ranges or user-specified threshold voltage values.
QUAD/DUAL N-CHANNEL ENHANCEMENT MODE EPAD®
MATCHED PAIR MOSFET ARRAY VGS(th)= +1.4V
ALD110814/ALD110914
GENERAL DESCRIPTION
ALD110814/ALD110914 are monolithic quad/dual N-Channel MOSFETs
matched at the factory using ALD’s proven EPAD® CMOS technology.
These devices are intended for low voltage, small signal applications.
The ALD110814/ALD110914 MOSFETs are designed and built with ex-
ceptional device electrical characteristics matching. Since these devices
are on the same monolithic chip, they also exhibit excellent tempco track-
ing characteristics. Each device is versatile as a circuit element and is a
useful design component for a broad range of analog applications. They
are basic building blocks for current sources, differential amplifier input
stages, transmission gates, and multiplexer applications. For most appli-
cations, connect V - and N/C pins to the most negative voltage potential in
the system and V+ pin to the most positive voltage potential (or left open
unused). All other pins must have voltages within these voltage limits.
The ALD110814/ALD110914 devices are built for minimum offset voltage
and differential thermal response, and they are designed for switching
and amplifying applications in +1.5V to +10V systems where low input
bias current, low input capacitance and fast switching speed are desired.
Since these are MOSFET devices, they feature very large (almost infinite)
current gain in a low frequency, or near DC, operating environment.
The ALD110814/ALD1 10914 are suitable for use in precision applications
which require very high current gain, beta, such as current mirrors and
current sources. The high input impedance and the high DC current gain
of the Field Effect Transistors result in extremely low current loss through
the control gate. The DC current gain is limited by the gate input leakage
current, which is specified at 30pA at room temperature. For example, DC
beta of the device at a drain current of 3mA and input leakage current of
30pA at 25°C is = 3mA/30pA = 100,000,000.
FEATURES
• Enhancement-mode (normally off)
• Standard Gate Threshold Voltages: +1.4V
• Matched MOSFET to MOSFET characteristics
• Tight lot to lot parametric control
• Parallel connection of MOSFETs to increase drain currents
• Low input capacitance
• VGS(th) match to 10mV
• High input impedance — 1012Ω typical
• Positive, zero, and negative VGS(th) temperature coefficient
• DC current gain >108
• Low input and output leakage currents
Operating Temperature Range*
0°C to +70°C0°C to +70°C
16-Pin 16-Pin 8-Pin 8Pin
Plastic Dip SOIC Plastic Dip SOIC
Package Package Package Package
ALD110814PC ALD110814SC ALD110914PA ALD110914SA
APPLICATIONS
• Precision current mirrors
• Precision current sources
• Voltage choppers
• Differential amplifier input stages
• Discrete voltage comparators
• Voltage bias circuits
• Sample and Hold circuits
• Analog inverters
• Level shifters
• Source followers and buffers
• Current multipliers
• Discrete analog multiplexers/matrices
• Discrete analog switches
N/C*
1
2
314
15
16
413
512
N/C*
6
7
8
10
11
G
N1
D
N1
N/C*
D
N4
N/C*
G
N4
9
G
N3
D
N3
D
N2
G
N2
V
+
S
34
S
12
V
-
V
+
V
-
ALD110814
M 4 M 3
M 1 M 2
V
-
V
-
V
-
V
-
V-
GN1
DN1
N/C*
S12
DN2
GN2
ALD110914
1
2
36
7
8
45
M 1 M 2
V-
N/C*
V-
V-
Rev 1.0-0506 ©2 005 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
*N/C pins are internally connected.
Connect to V- to reduce noise
ALD110814/ALD110914 Advanced Linear Devices 2
Notes: 1 Consists of junction leakage currents
OPERATING ELECTRICAL CHARACTERISTICS
V+ = +5V (or open) V- = GND TA = 25°C unless otherwise specified
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
Parameter Symbol Min Typ Max Unit Test Conditions
ALD110814 / ALD110914
Gate Threshold Voltage VGS(th) 1.38 1.40 1.42 V IDS =1µA
VDS = 0.1V
Offset Voltage
VGS(th)1-VGS(th)2 VOS 310mVI
DS =1µA
Offset VoltageTempco TC ∆VOS 5µV/ °CV
DS1 = VDS2
GateThreshold Voltage Tempco TC∆VGS(th) -1.7 mV °CI
D = 1µA
0.0 ID = 20µA, VDS = 0.1V
+1.6 ID = 40 µA
On Drain Current IDS (ON) 12.0 mA VGS = +10.6V
3.0 VGS = + 5.4V
VDS = + 5V
Forward T ransconductance GFS 1.4 mmho VGS = +5.4V
VDS = +10.4V
Transconductance Mismatch ∆GFS 1.8 %
VGS = + 5.4V
Output Conductance GOS 68 µmho VDS = +10.4V
Drain Source On Resistance RDS (ON) 500 ΩVDS = 0.1V
VGS = +4.0V
Drain Source On Resistance ∆RDS (ON) 0.5 % VDS = 0.1V
Mismatch VGS = +5.4V
Drain Source Breakdown Voltage BVDSX 10 V IDS = 1.0µA
VGS = -0.4V
Drain Source Leakage Current1IDS (OFF) 10 100 pA VGS = +0.4V
4nAV
DS =10V, TA = 125°C
Gate Leakage Current1IGSS 330pAV
DS = 0V VGS = 10V
1nAT
A =125°C
Input Capacitance CISS 2.5 pF
Transfer Reverse Capacitance CRSS 0.1 pF
Turn-on Delay Time ton 10 ns V+ = 5V RL= 5KΩ
Turn-off Delay Time toff 10 ns V+ = 5V RL= 5KΩ
Crosstalk 60 dB f = 100KHz
ABSOLUTE MAXIMUM RATINGS
Drain-Source voltage, VDS 10.6V
Gate-Source voltage, VGS 10.6V
Power dissipation 500 mW
Operating temperature range PA, SA, PC, SC package 0°C to +70°C
Storage temperature range -65°C to +150°C
Lead temperature, 10 seconds +260°C
