74HC75 Quad bistable transparant latch Rev. 4 -- 24 February 2016 Product data sheet 1. General description The 74HC75 is a quad bistable transparent latch with complementary outputs. Two latches are simultaneously controlled by one of two active HIGH enable inputs (LE12 and LE34). When LEnn is HIGH, the data enters the latches and appears at the nQ outputs. The nQ outputs follow the data inputs (nD) as long as LEnn is HIGH (transparent). The data on the nD inputs one set-up time prior to the HIGH-to-LOW transition of the LEnn will be stored in the latches. The latched outputs remain stable as long as the LEnn is LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits Complementary Q and Q outputs VCC and GND on the center pins Low-power dissipation Complies with JEDEC standard no. 7A Input levels: For 74HC75: CMOS level ESD protection: HBM EIA/JESD22-A114F exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +80 C and from 40 C to +125 C. 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC75D 40 C to +125 C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74HC75DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 74HC75PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74HC75 Nexperia Quad bistable transparant latch 4. Functional diagram & ' /( 4 ' 4 4 ' 4 / / 4 ' 4 4 ' 4 /( Fig 1. Logic symbol 74HC75 Product data sheet & ' DDE DDE Fig 2. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 2 of 19 74HC75 Nexperia Quad bistable transparant latch ' /( ' 4 4 4 &3 ' ' 4 4 / /( ' ' 4 4 4 &3 &3 4 /$7&+ ' ' 4 4 / &3 ' /( ' 4 4 4 &3 4 /$7&+ ' ' 4 4 / /( ' ' 4 4 4 &3 &3 4 /$7&+ ' ' 4 4 / &3 /$7&+ DDE Fig 3. Functional diagram 74HC75 Product data sheet 4 Fig 4. DDE Logic diagram All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 3 of 19 74HC75 Nexperia Quad bistable transparant latch 5. Pinning information 5.1 Pinning 4 4 ' 4 ' 4 /( /( 9&& *1' ' 4 ' 4 4 4 DDE Fig 5. Pin configuration SO16, SSOP16 and TSSOP16 5.2 Pin description Table 2. Pin description Symbol Pin Description 1Q, 2Q, 3Q, 4Q 1, 14, 11, 8 complementary latch output 1D, 2D, 3D, 4D 2, 3, 6, 7 data input LE34 4 latch enable input for latches 3 and 4 (active HIGH) VCC 5 positive supply voltage GND 12 ground (0 V) LE12 13 latch enable input for latches 1 and 2 (active HIGH) 1Q, 2Q, 3Q, 4Q 16, 15, 10, 9 latch output 6. Functional description 6.1 Function table Table 3. Function table[1] Operating mode Data enabled Data latched [1] Input Output LEnn nD nQ nQ H L L H H H H L L X q q H = HIGH voltage level; L = LOW voltage level; q = lower case letters indicate the state of the referenced output one set-up time prior to the HIGH-to-LOW LEnn transition; X = don't care. 74HC75 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 4 of 19 74HC75 Nexperia Quad bistable transparant latch 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7.0 V - 20 mA - 20 mA - 25 mA 50 mA IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] IO output current VO = 0.5 V to VCC + 0.5 V ICC supply current - IGND ground current 50 - mA Tstg storage temperature 65 +150 C Ptot total power dissipation Tamb = 40 C to +125 C SO16 package [2] - 500 mW (T)SSOP16 package [3] - 500 mW [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] Ptot derates linearly with 8 mW/K above 70 C. [3] Ptot derates linearly with 5.5 mW/K above 60 C. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC supply voltage VI VO Conditions Min Typ Max Unit 2.0 5.0 6.0 V input voltage 0 - VCC V output voltage 0 - VCC V Tamb ambient temperature t/V input transition rise and fall rate 40 - +125 C VCC = 2.0 V - - 625 ns/V VCC = 4.5 V - 1.67 139 ns/V VCC = 6.0 V - - 83 ns/V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit HIGH-level input voltage VCC = 2.0 V 1.5 1.2 - V VCC = 4.5 V 3.15 2.4 - V VCC = 6.0 V 4.2 3.2 - V VCC = 2.0 V - 0.8 0.5 V VCC = 4.5 V - 2.1 1.35 V VCC = 6.0 V - 2.8 1.8 V Tamb = 25 C VIH VIL LOW-level input voltage 74HC75 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 5 of 19 74HC75 Nexperia Quad bistable transparant latch Table 6. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VOH HIGH-level output voltage VI = VIH or VIL VOL LOW-level output voltage Min Typ Max Unit IO = 20 A; VCC = 2.0 V 1.9 2.0 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - V IO = 4 mA; VCC = 4.5 V 3.98 4.32 - V IO = 5.2 mA; VCC = 6.0 V 5.48 5.81 - V IO = 20 A; VCC = 2.0 V - 0 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 V IO = 4 mA; VCC = 4.5 V - 0.15 0.26 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 V VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 8.0 A CI input capacitance - 3.5 - pF VCC = 2.0 V 1.5 - - V VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 - - V IO = 20 A; VCC = 4.5 V 4.4 - - V IO = 20 A; VCC = 6.0 V 5.9 - - V IO = 4 mA; VCC = 4.5 V 3.84 - - V IO = 5.2 mA; VCC = 6.0 V 5.34 - - V Tamb = 40 C to +85 C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL IO = 20 A; VCC = 2.0 V - - 0.1 V IO = 20 A; VCC = 4.5 V - - 0.1 V IO = 20 A; VCC = 6.0 V - - 0.1 V IO = 4 mA; VCC = 4.5 V - - 0.33 V IO = 5.2 mA; VCC = 6.0 V - - 0.33 V II input leakage current VI = VCC or GND; VCC = 6.0 V - - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 80 A 74HC75 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 6 of 19 74HC75 Nexperia Quad bistable transparant latch Table 6. Static characteristics ...continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V 1.5 - - VCC = 4.5 V 3.15 - - V VCC = 6.0 V 4.2 - - V VCC = 2.0 V - - 0.5 V VCC = 4.5 V - - 1.35 V VCC = 6.0 V - - 1.8 V Tamb = 40 C to +125 C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL V - IO = 20 A; VCC = 2.0 V 1.9 - - V IO = 20 A; VCC = 4.5 V 4.4 - - V IO = 20 A; VCC = 6.0 V 5.9 - - V IO = 4 mA; VCC = 4.5 V 3.7 - - V IO = 5.2 mA; VCC = 6.0 V 5.2 - - V VI = VIH or VIL - IO = 20 A; VCC = 2.0 V - - 0.1 V IO = 20 A; VCC = 4.5 V - - 0.1 V IO = 20 A; VCC = 6.0 V - - 0.1 V IO = 4 mA; VCC = 4.5 V - - 0.4 V IO = 5.2 mA; VCC = 6.0 V - - 0.4 V II input leakage current VI = VCC or GND; VCC = 6.0 V - - 1.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V - - 160 A 74HC75 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 7 of 19 74HC75 Nexperia Quad bistable transparant latch 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; tr = tf = 6 ns; CL = 50 pF; unless otherwise specified, see Figure 10. Symbol Parameter Conditions Min Typ Max Unit propagation delay nD to nQ see Figure 6 VCC = 2.0 V - 33 110 ns VCC = 4.5 V - 12 22 ns VCC = 6.0 V - 10 19 ns VCC = 5.0 V; CL = 15 pF - 11 - ns VCC = 2.0 V - 39 120 ns VCC = 4.5 V - 14 24 ns VCC = 6.0 V - 11 20 ns VCC = 5.0 V; CL = 15 pF - 11 - ns VCC = 2.0 V - 33 120 ns VCC = 4.5 V - 12 24 ns VCC = 6.0 V - 10 20 ns VCC = 5.0 V; CL = 15 pF - 11 - ns Tamb = 25 C tPHL, tPLH propagation delay nD to nQ propagation delay LEnn to nQ propagation delay LEnn to nQ tTHL, tTLH tW tsu th output transition time enable pulse width HIGH set-up time nD to LEnn hold time nD to LEnn 74HC75 Product data sheet see Figure 7 see Figure 9 see Figure 9 VCC = 2.0 V - 39 125 ns VCC = 4.5 V - 14 25 ns VCC = 6.0 V - 11 21 ns VCC = 5.0 V; CL = 15 pF - 11 - ns VCC = 2.0 V - 19 75 ns VCC = 4.5 V - 7 15 ns VCC = 6.0 V - 6 13 ns VCC = 2.0 V 80 17 - ns VCC = 4.5 V 16 6 - ns VCC = 6.0 V 14 5 - ns VCC = 2.0 V 60 14 - ns VCC = 4.5 V 12 5 - ns VCC = 6.0 V 10 4 - ns VCC = 2.0 V 3 8 - ns VCC = 4.5 V 3 3 - ns VCC = 6.0 V 3 2 - ns see Figure 6 and 7 see Figure 9 see Figure 8 see Figure 8 All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 8 of 19 74HC75 Nexperia Quad bistable transparant latch Table 7. Dynamic characteristics ...continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; unless otherwise specified, see Figure 10. Symbol CPD Parameter power dissipation capacitance per latch Conditions Min Typ Max - 42 - pF VCC = 2.0 V - - 140 ns VCC = 4.5 V - - 28 ns VCC = 6.0 V - - 24 ns VCC = 2.0 V - - 150 ns VCC = 4.5 V - - 30 ns VCC = 6.0 V - - 26 ns VCC = 2.0 V - - 150 ns VCC = 4.5 V - - 30 ns VCC = 6.0 V - - 26 ns VCC = 2.0 V - - 155 ns VCC = 4.5 V - - 31 ns VCC = 6.0 V - - 26 ns VCC = 2.0 V - - 95 ns VCC = 4.5 V - - 19 ns VCC = 6.0 V - - 16 ns VCC = 2.0 V 100 - - ns VCC = 4.5 V 20 - - ns VCC = 6.0 V 17 - - ns VCC = 2.0 V 75 - - ns VCC = 4.5 V 15 - - ns VCC = 6.0 V 13 - - ns VCC = 2.0 V 3 - - ns VCC = 4.5 V 3 - - ns VCC = 6.0 V 3 - - ns VI = GND to VCC [1] Unit Tamb = 40 C to +85 C tPHL, tPLH propagation delay nD to nQ propagation delay nD to nQ propagation delay LEnn to nQ propagation delay LEnn to nQ tTHL, tTLH tW tsu th output transition time enable pulse width HIGH set-up time nD to LEnn hold time nD to LEnn 74HC75 Product data sheet see Figure 6 see Figure 7 see Figure 9 see Figure 9 see Figure 6 and 7 see Figure 9 see Figure 8 see Figure 8 All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 9 of 19 74HC75 Nexperia Quad bistable transparant latch Table 7. Dynamic characteristics ...continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; unless otherwise specified, see Figure 10. Symbol Parameter Conditions Min Typ Max Unit VCC = 2.0 V - - 165 ns VCC = 4.5 V - - 33 ns VCC = 6.0 V - - 28 ns VCC = 2.0 V - - 180 ns VCC = 4.5 V - - 36 ns VCC = 6.0 V - - 31 ns VCC = 2.0 V - - 180 ns VCC = 4.5 V - - 36 ns VCC = 6.0 V - - 31 ns VCC = 2.0 V - - 190 ns VCC = 4.5 V - - 38 ns VCC = 6.0 V - - 32 ns Tamb = 40 C to +125 C tPHL, tPLH propagation delay nD to nQ propagation delay nD to nQ propagation delay LEnn to nQ propagation delay LEnn to nQ tTHL, tTLH enable pulse width HIGH tW set-up time nD to LEnn tsu hold time nD to LEnn th [1] output transition time see Figure 6 see Figure 7 see Figure 9 see Figure 9 see Figure 6 and 7 VCC = 2.0 V - - 110 ns VCC = 4.5 V - - 22 ns VCC = 6.0 V - - 19 ns see Figure 9 VCC = 2.0 V 120 - - ns VCC = 4.5 V 24 - - ns VCC = 6.0 V 20 - - ns VCC = 2.0 V 90 - - ns VCC = 4.5 V 18 - - ns VCC = 6.0 V 15 - - ns VCC = 2.0 V 3 - - ns VCC = 4.5 V 3 - - ns VCC = 6.0 V 3 - - ns see Figure 8 see Figure 8 CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi N + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL VCC2 fo) = sum of outputs. 74HC75 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 10 of 19 74HC75 Nexperia Quad bistable transparant latch 11. Waveforms Q'LQSXW 90 W3+/ Q4RXWSXW W3/+ 90 W7+/ W7/+ DDE VM = 0.5 VI Fig 6. Waveforms showing the data input (nD) to output (nQ) propagation delays and the output transition times Q'LQSXW 90 W3+/ Q4RXWSXW W3/+ 90 W7+/ W7/+ DDE VM = 0.5 VI Fig 7. Waveforms showing the data input (nD) to output (nQ) propagation delays and the output transition times Q'LQSXW 90 WK WVX 90 /(QQLQSXW Q4RXWSXW WK WVX 4 ' 4 ' DDE The shaded areas indicate when the input is permitted to change for predictable output performance. VM = 0.5 VI Fig 8. Waveforms showing the data set-up and hold times for nD input to LEnn input 74HC75 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 11 of 19 74HC75 Nexperia Quad bistable transparant latch Q'LQSXW /(QQLQSXW 90 W: W3+/ W3/+ 90 Q4RXWSXW W3/+ W7+/ W3+/ W7/+ 90 Q4RXWSXW W7/+ W7+/ DDE VM = 0.5 VI Fig 9. Waveforms showing the latch enable input (LEnn) pulse width, the latch enable input to outputs (nQ, nQ) propagation delays and the output transition times 9&& 38/6( *(1(5$725 9, 92 '87 57 &/ PQD Test data is given in Table 8 Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator CL = Load capacitance including jig and probe capacitance Fig 10. Test circuit for measuring switching times Table 8. Test data Supply Input VCC VI tr, tf CL 2.0 V VCC 6 ns 50 pF 4.5 V VCC 6 ns 50 pF 6.0 V VCC 6 ns 50 pF 5.0 V VCC 6 ns 15 pF 74HC75 Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 12 of 19 74HC75 Nexperia Quad bistable transparant latch 12. Package outline 62SODVWLFVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP 627 ' ( $ ; F \ +( Y 0 $ = 4 $ $ $ $ SLQLQGH[ /S / H Z 0 ES GHWDLO; PP VFDOH ',0(16,216 LQFKGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOPPGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP LQFKHV R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPP LQFK PD[LPXPSHUVLGHDUHQRWLQFOXGHG 5()(5(1&(6 287/,1( 9(56,21 ,(& -('(& 627 ( 06 -(,7$ (8523($1 352-(&7,21 ,668('$7( Fig 11. Package outline SOT109-1 (SO16) 74HC75 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 13 of 19 74HC75 Nexperia Quad bistable transparant latch 6623SODVWLFVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ = 4 $ $ $ $ SLQLQGH[ /S / GHWDLO; Z 0 ES H PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP R R 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7( 02 Fig 12. Package outline SOT338-1 (SSOP16) 74HC75 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 14 of 19 74HC75 Nexperia Quad bistable transparant latch 76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ' 627 ( $ ; F \ +( Y 0 $ = 4 $ SLQLQGH[ $ $ $ /S / H GHWDLO; Z 0 ES PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ PD[ $ $ $ ES F ' ( H +( / /S 4 Y Z \ = PP R R 1RWHV 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 3ODVWLFLQWHUOHDGSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 5()(5(1&(6 ,(& -('(& -(,7$ (8523($1 352-(&7,21 ,668('$7( 02 Fig 13. Package outline SOT403-1 (TSSOP16) 74HC75 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 15 of 19 74HC75 Nexperia Quad bistable transparant latch 13. Abbreviations Table 9. Abbreviations Acronym Abbreviation CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model 14. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC75 v.4 20160224 Product data sheet - 74HC75 v.3 Modifications: 74HC75 v.3 Modifications: * Type number 74HC75N (SOT38-4) removed. 20041112 Product data sheet - 74HC_HCT75_CNV v.2 * The format of this data sheet has been redesigned to comply with the current presentation and information standard of Philips Semiconductors. * * Removed type number 74HCT75. Inserted family specification. 74HC_HCT75_CNV v.2 19970918 Product specification - 74HC_HCT75 v.1 74HC_HCT75 v.1 19901201 Product specification - - 74HC75 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 16 of 19 74HC75 Nexperia Quad bistable transparant latch 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term `short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 15.2 Definitions Draft -- The document is a draft version only. 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This document supersedes and replaces all information supplied prior to the publication hereof. 74HC75 Product data sheet Suitability for use -- Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 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All rights reserved 17 of 19 74HC75 Nexperia Quad bistable transparant latch Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products -- Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia's warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia's specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia's standard warranty and Nexperia's product specifications. Translations -- A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com 74HC75 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 24 February 2016 (c) Nexperia B.V. 2017. All rights reserved 18 of 19 Nexperia 74HC75 Quad bistable transparant latch 17. Contents 1 2 3 4 5 5.1 5.2 6 6.1 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 (c) General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Nexperia B.V. 2017. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 24 February 2016