ICE2QR2280Z1XKLA1 - Infineon Technologies

CoolSET®- Q1

ICE2QR2280Z-1

Off-Line SMPS Quasi-Resonant

PWM Controller with integrated

800V CoolMOS®and startup cell in

DIP-7

N e v e r s t o p t h i n k i n g .

Power Management & Supply

Datasheet,Versio n 2.1, March 7, 2013

1st Edition 2013-01-28

Published by

Infineon Technologies AG

81726 München, Germany

©Infineon Technologies AG 3/7/13.

Attention please!

The information given in this data sheet shall in no event be regarded as a guarantee of conditions or

characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values

stated herein and/or any information regarding the application of the device, Infineon Technologies hereby

disclaims any and all warranties and liabilities of any kind, including without limitation warranties of

non-infringement of intellectual property rights of any third party.

Information

For further information on technology, delivery terms and conditions and prices please contact your nearest

Infineon Technologies Office (www.infineon.com).

Warnings

Due to technical requirements components may contain dangerous substances. For information on the types in

question please contact your nearest Infineon Technologies Office.

Infineon Technologies Components may only be used in life-support devices or systems with the express written

approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure

of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support

devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain

and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may

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For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or

the Infineon Technologies Companies and Representatives worldwide: see our webpage at http://

www.infineon.com

CoolMOS®, CoolSET®are trademarks of Infineon Technologies AG.

CoolSET®- Q1

ICE2QR2280Z-1

Revision History: March 7, 2013 Datasheet Version 2.1

Previous Version: 2.0

Page Subjects (major changes since last revision)

10, 11 Revised typo.

16 Add VVCCPD

Type Package Marking VDS RDSon

1) typ @ T=25°C

230VAC ±15%2)

2) Calculated maximum input power rating at Ta=50°C, Ti=125°C and with 232mm2, 2 OZ copper area on Drain pin as heat sink.

85-265 VAC2)

ICE2QR2280Z-1 PG-DIP-7 2QR2280Z-1 800V 2.26 54W 31W

CoolSET®- Q1

ICE2QR2280Z-1

Version 2.1 3 March 7, 2013

Off-Line SMPS Quasi-Resonant PWM Controller with

integrated 800V CoolMOS®and startup cell in DIP-7

Description

The ICE2QR2280Z-1 is derived from CoolSET®-Q1.

The only difference is it has a lower Vcc turn off

threshold. The CoolSET®-Q1 is the first generation of

quasi-resonant integrated power ICs. It is optimized for

off-line switch mode power supply applications such as

LCD monitor, DVD R/W, DVD Combo, Blue-ray DVD,

set top box, etc. Operating the MOSFET switch in quasi-

resonant mode, lower EMI, higher efficiency and lower

voltage stress on secondary diodes are expected for the

SMPS. Based on the BiCMOS technology, the

CoolSET®-Q1 series has a wide operation range (up to

25V) of IC power supply and lower power consumption.

It also offers many advantages such as quasi-resonant

operation till very low load which increases the average

system efficiency, Active Burst Mode operation which

enables an ultra-low power consumption at standby

mode with small and controllable output voltage ripple,

etc.

Product Highlights

• Quasi resonant operation

• Active Burst Mode to reach the lowest standby power requirement

<100mW@no load

• Digital frequency reduction for better overall system efficiency

• Integrated 800V avalanche rugged CoolMOS®with startup cell

• Pb-free lead plating; RoHS compliant

Features

• 800V avalanche rugged CoolMOS®with built-in

startup cell

• Quasi resonant operation till very low load

• Active burst mode operation for low standby input

power (< 0.1W)

• Digital frequency reduction with decreasing load for

reduced switching loss

• Built-in digital soft-start

• Foldback point correction and cycle-by-cycle peak

current limitation

• Maximum on/off time limitation

• Auto restart mode for VCC Overvoltage and

Undervoltage protections

• Auto restart mode for overload protection

• Auto restart mode for over temperature protection

• Latch-off mode for adjustable output over voltage

protection and transformer short-winding protection

• Lower Vcc turn off threshold

85 ~ 265 VAC

Snubber

Cbus

Dr1~Dr4

RCS

TL431

Optocoupler

Rb1

Rb2

Rc1

Cc1 Cc2

Rovs2

Rovs1

CVCC DVCC

LfCfVO

CPS

Startup Cell

CoolSET®-Q1

CoolMOS®

& Startup Cell

WpWs

RVCC

CZC RZC2 RZC1

Drain

Zero Crossing Block

Power Management

Cycle-by-Cycle

current limitation

Active Burst Mode

PWM controller

Current Mode Control

Protections

VCC

Control Unit

GND

CoolSET®- Q1

ICE2QR2280Z-1

Table of Contents Page

Version 2.1 4 March 7, 2013

1 Pin Configuration and Functionality .............................5

1.1 Pin Configuration with PG-DIP-7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5

1.2 PackagePG-DIP-7 ............................................5

1.3 PinFunctionality ..............................................5

2 Representative Blockdiagram ..................................6

3 Functional Description ........................................7

3.1 VCC Pre-Charging and Typical VCC Voltage During Start-up . . . . . . . . . . .7

3.2 Soft-start ....................................................7

3.3 NormalOperation .............................................7

3.3.1 Digital Frequency Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

3.3.1.1 Up/downcounter ..........................................8

3.3.1.2 Zero crossing (ZC counter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

3.3.1.3 Ringing suppression time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

3.3.2 Switch Off Determination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

3.4 CurrentLimitation .............................................9

3.4.1 Foldback Point Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

3.5 Active Burst Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

3.5.1 Entering Active Burst Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . .10

3.5.2 During Active Burst Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

3.5.3 Leaving Active Burst Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . .10

3.6 ProtectionFunctions ..........................................11

4 Electrical Characteristics .....................................12

4.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

4.2 OperatingRange .............................................12

4.3 Characteristics ...............................................13

4.3.1 SupplySection.............................................13

4.3.2 Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

4.3.3 PWMSection ..............................................14

4.3.4 CurrentSense .............................................14

4.3.5 SoftStart .................................................14

4.3.6 Foldback Point Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14

4.3.7 Digital Zero Crossing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

4.3.8 ActiveBurstMode ..........................................15

4.3.9 Protection.................................................16

4.3.10 CoolMOS®Section .........................................16

5 Typical CoolMOS®Performance Characteristic ...................17

6 Input Power Curve ...........................................18

7 Outline dimension ...........................................19

8 Marking ....................................................20

Version 2.1 5 March 7, 2013

CoolSET®- Q1

ICE2QR2280Z-1

Pin Configuration and Functionality

1 Pin Configuration and Functionality

1.1 Pin Configuration with PG-DIP-7

1.2 Package PG-DIP-7

Figure 1 Pin Configuration PG-DIP7 (top view)

1.3 Pin Functionality

ZC (Zero Crossing)

At this pin, the voltage from the auxiliary winding after

a time delay circuit is applied. Internally, this pin is

connected to the zero-crossing detector for switch-on

determination. Additionally, the output over voltage

detection is realized by comparing the voltage Vzc with

an internal preset threshold.

FB (Feedback)

Normally, an external capacitor is connected to this pin

for a smooth voltage VFB. Internally, this pin is

connected to the PWM signal generator for switch-off

determination (together with the current sensing

signal), the digital signal processing for the frequency

reduction with decreasing load during normal

operation, and the Active Burst Mode controller for

entering Active Burst Mode operation determination

and burst ratio control during Active Burst Mode

operation. Additionally, the open-loop / over-load

protection is implemented by monitoring the voltage at

this pin.

CS (Current Sense)

This pin is connected to the external shunt resistor for

the primary current sensing and the internal PWM

signal generator for switch-off determination (together

with the feedback voltage). Moreover, short-winding

protection is realised by monitoring the voltage Vcs

during on-time of the main power switch.

Drain (Drain of integrated CoolMOS®)

Drain pin is the connection to the drain of the internal

CoolMOS®.

VCC (Power supply)

VCC pin is the positive supply of the IC. The operating

range is between VVCCoff and VVCCOVP.

GND (Ground)

This is the common ground of the controller.

Pin Symbol Function

1 ZC Zero crossing

2 FB Feedback

3 CS Current Sense

4 N.C. No connection

5 Drain 800V CoolMOS™Drain

6 - No Pin

7 VCC Controller Supply Voltage

8 GND Controller Ground

GNDZC

VCC

NC Drain

CoolSET®- Q1

ICE2QR2280Z-1

Representative Blockdiagram

Version 2.1 6 March 7, 2013

2 Representative Blockdiagram

Figure 2 Representative Block diagram

Version 2.1 7 March 7, 2013

CoolSET®- Q1

ICE2QR2280Z-1

Functional Description

3 Functional Description

3.1 VCC Pre-Charging and Typical

VCC Voltage During Start-up

ICE2QR2280Z-1 is derived from CoolSET®-Q1. The

only difference is it has a lower Vcc turn off threshold.

The CoolSET®-Q1 has a startup cell which is integrated

into the CoolMOS®. As shown in Figure 2, the start cell

consists of a high voltage device and a controller,

whereby the high voltage device is controlled by the

controller. The startup cell provides a pre-charging of

the VCC capacitor till VCC voltage reaches the VCC

turned-on threshold VVCCon and the IC begins to

operate.

Once the mains input voltage is applied, a rectified

voltage shows across the capacitor Cbus. The high

voltage device provides a current to charge the VCC

capacitor Cvcc. Before the VCC voltage reaches a

certain value, the amplitude of the current through the

high voltage device is only determined by its channel

resistance and can be as high as several mA. After the

VCC voltage is high enough, the controller controls the

high voltage device so that a constant current around

1mA is provided to charge the VCC capacitor further,

until the VCC voltage exceeds the turned-on threshold

VVCCon. As shown in the time phase I in Figure 3, the

VCC voltage increase near linearly and the charging

speed is independent of the mains voltage level.

Figure 3 VCC voltage at start up

The time taking for the VCC pre-charging can then be

approximately calculated as:

[1]

where IVCCcharge2 is the charging current from the

startup cell which is 1.05mA, typically.

When the VCC voltage exceeds the VCC turned-on

threshold VVCCon at time t1, the startup cell is switched

off and the IC begins to operate with soft-start. Due to

power consumption of the IC and the fact that there is

still no energy from the auxiliary winding to charge the

VCC capacitor before the output voltage is built up, the

VCC voltage drops (Phase II). Once the output voltage

is high enough, the VCC capacitor receives the energy

from the auxiliary winding from the time point t2onward.

The VCC will then reach a constant value depending

on output load.

3.2 Soft-start

As shown in Figure 4, at the time ton, the IC begins to

operate with a soft-start. By this soft-start the switching

stresses for the switch, diode and transformer are

minimized. The soft-start implemented in CoolSET®-

Q1 is a digital time-based function. The preset soft-start

time is tSS (12ms) with 4 steps. If not limited by other

functions, the peak voltage on CS pin will increase step

by step from 0.32V to 1V finally.

Figure 4 Maximum current sense voltage during

softstart

3.3 Normal Operation

The PWM controller during normal operation consists

of a digital signal processing circuit including an up/

down counter, a zero-crossing counter (ZC counter)

and a comparator, and an analog circuit including a

current measurement unit and a comparator. The

switch-on and -off time points are determined by the

digital circuit and the analog circuit respectively. The

zero-crossing input signal and the value of the up/down

counter are needed for the switch-on determination

while the feedback signal VFB and the current sensing

signal VCS are necessary for the switch-off

determination. Details about the full operation of the

PWM controller in normal operation are illustrated in

the following paragraphs.

3.3.1 Digital Frequency Reduction

As mentioned above, the digital signal processing

circuit consists of an up/down counter, a ZC counter

and a comparator. These three parts are key to

implement digital frequency reduction with decreasing

load. In addition, a ringing suppression time controller

is implemented to avoid mis-triggering by the high

frequency oscillation when the output voltage is very

low under conditions such as soft start period or output

VVCCon

VVCC

VVCCoff

t1 tt2

I II III

VCCon

vcc

IVCCch e2arg

--------------------------------------------

ton 3 6 9 12

0.32

0.49

0.66

0.83

1.00

Vcs_sst

(V)

Time(ms)

CoolSET®- Q1

ICE2QR2280Z-1

Functional Description

Version 2.1 8 March 7, 2013

short circuit. Functionality of these parts is described in

the following.

3.3.1.1 Up/down counter

The up/down counter stores the number of the zero

crossing where the main power switch is switched on

after demagnetization of the transformer. This value is

fixed according to the feedback voltage, VFB, which

contains information about the output power. Indeed, in

a typical peak current mode control, a high output

power results in a high feedback voltage, and a low

output power leads to a low regulation voltage. Hence,

according to VFB, the value in the up/down counter is

changed to vary the power MOSFET off-time according

to the output power. In the following, the variation of the

up/down counter value according to the feedback

voltage is explained.

The feedback voltage VFB is internally compared with

three threshold voltages VFBZL, VFBZH and VFBR1, at

each clock period of 48ms. The up/down counter

counts then upward, keep unchanged or count

downward, as shown in Table 1.

Table 1 Operation of the up/down counter

In the CoolSET®-Q1, the number of zero crossing is

limited to 7. Therefore, the counter varies between 1

and 7, and any attempt beyond this range is ignored.

When VFB exceeds VFBR1 voltage, the up/down counter

is reset to 1, in order to allow the system to react rapidly

to a sudden load increase. The up/down counter value

is also reset to 1 at the start-up time, to ensure an

efficient maximum load start up. Figure 5 shows some

examples on how up/down counter is changed

according to the feedback voltage over time.

The use of two different thresholds VFBZL and VFBZH to

count upward or downward is to prevent frequency

jittering when the feedback voltage is close to the

threshold point. However, for a stable operation, these

two thresholds must not be affected by the foldback

current limitation (see Section 3.4.1), which limits the

VCS voltage. Hence, to prevent such situation, the

threshold voltages, VFBZL and VFBZH, are changed

internally depending on the line voltage levels.

Figure 5 Up/down counter operation

3.3.1.2 Zero crossing (ZC counter)

In the system, the voltage from the auxiliary winding is

applied to the zero-crossing pin through a RC network,

which provides a time delay to the voltage from the

auxiliary winding. Internally, this pin is connected to a

clamping network, a zero-crossing detector, an output

over voltage detector and a ringing suppression time

controller.

During on-state of the power switch a negative voltage

applies to the ZC pin. Through the internal clamping

network, the voltage at the pin is clamped to certain

level.

The ZC counter has a minimum value of 0 and

maximum value of 7. After the internal MOSFET is

turned off, every time when the falling voltage ramp of

on ZC pin crosses the 100mV threshold, a zero

crossing is detected and ZC counter will increase by 1.

It is reset every time after the DRIVER output is

changed to high.

The voltage vZC is also used for the output over voltage

detection. Once the voltage at this pin is higher than the

threshold VZCOVP during off-time of the main switch, the

IC is latched off after a fixed blanking time.

To achieve the switch-on at voltage valley, the voltage

from the auxiliary winding is fed to a time delay network

(the RC network consists of Dzc, Rzc1, Rzc2 and Czc as

shown in typical application circuit) before it is applied

to the zero-crossing detector through the ZC pin. The

needed time delay to the main oscillation signal Dt

should be approximately one fourth of the oscillation

period (by transformer primary inductance and drain-

source capacitance) minus the propagation delay from

vFB

up/down counter

action

Always lower than VFBZL

Count upwards till

Once higher than VFBZL, but

always lower than VFBZH

Stop counting, no

value changing

Once higher than VFBZH, but

always lower than VFBR1

Count downwards

till 1

Once higher than VFBR1

Set up/down

counter to 1

1Case 3

Case 2

Case 1

Up/down

counter

n+1

n+2

n+1

n-1

4 5 6 6 6 6 5 4 3

2 3 4 4 4 4 3 2 1

7 7 7 7 7 7 6 5 4

VFB

VFBR1

VFBZH

VFBZL

clock T=48ms

CoolSET®- Q1

ICE2QR2280Z-1

Functional Description

Version 2.1 9 March 7, 2013

the detected zero-crossing to the switch-on of the main

switch tdelay, theoretically:

[2]

This time delay should be matched by adjusting the

time constant of the RC network which is calculated as:

[3]

3.3.1.3 Ringing suppression time

After MOSFET is turned off, there will be some

oscillation on VDS, which will also appear on the voltage

on ZC pin. To avoid mis-triggering by such oscillations

to turn on the MOSFET, a ringing suppression timer is

implemented. This suppression time is depended on

the voltage vZC. If the voltage vZC is lower than the

threshold VZCRS, a longer preset time tZCRS2 is applied.

However, if the voltage vZC is higher than the threshold,

a shorter time tZCRS1 is set.

3.3.1.4 Switch on determination

After the gate drive goes to low, it can not be changed

to high during ring suppression time.

After ring suppression time, the gate drive can be

turned on when the ZC counter value is higher or equal

to up/down counter value.

However, it is also possible that the oscillation between

primary inductor and drain-source capacitor damps

very fast and IC can not detect enough zero crossings

and ZC counter value will not be high enough to turn on

the gate drive. In this case, a maximum off time is

implemented. After gate drive has been remained off

for the period of TOffMax, the gate drive will be turned on

again regardless of the counter values and VZC. This

function can effectively prevent the switching

frequency from going lower than 20kHz. Otherwise it

will cause audible noise, during start up.

3.3.2 Switch Off Determination

In the converter system, the primary current is sensed

by an external shunt resistor, which is connected

between low-side terminal of the main power switch

and the common ground. The sensed voltage across

the shunt resistor vCS is applied to an internal current

measurement unit, and its output voltage V1is

compared with the regulation voltage VFB. Once the

voltage V1exceeds the voltage VFB, the output flip-flop

is reset. As a result, the main power switch is switched

off. The relationship between the V1and the VCS is

described by:

[4]

To avoid mis-triggering caused by the voltage spike

across the shunt resistor at the turn on of the main

power switch, a leading edge blanking time, tLEB, is

applied to the output of the comparator. In other words,

once the gate drive is turned on, the minimum on time

of the gate drive is the leading edge blanking time.

In addition, there is a maximum on time, tOnMax,

limitation implemented in the IC. Once the gate drive

has been in high state longer than the maximum on

time, it will be turned off to prevent the switching

frequency from going too low because of long on time.

3.4 Current Limitation

There is a cycle by cycle current limitation realized by

the current limit comparator to provide an overcurrent

detection. The source current of the MOSFET is

sensed via a sense resistor RCS. By means of RCS the

source current is transformed to a sense voltage VCS

which is fed into the pin CS. If the voltage VCS exceeds

an internal voltage limit, adjusted according to the

Mains voltage, the comparator immediately turns off

the gate drive.

To prevent the Current Limitation process from

distortions caused by leading edge spikes, a Leading

Edge Blanking time (tLEB) is integrated in the current

sensing path.

A further comparator is implemented to detect

dangerous current levels, VCSSW which could occur if

one or more transformer windings are shorted or if the

secondary diode is shorted. To avoid an accidental

latch off, a spike blanking time of tCSSW is integrated in

the output path of the comparator.

3.4.1 Foldback Point Correction

When the main bus voltage increases, the switch on

time becomes shorter and therefore the operating

frequency is also increased. As a result, for a constant

primary current limit, the maximum possible output

power is increased which is beyond the converter

design limit.

To avoid such a situation, the internal foldback point

correction circuit varies the VCS voltage limit according

to the bus voltage. This means the VCS will be

decreased when the bus voltage increases. To keep a

constant maximum input power of the converter, the

DtTosc

------------ tdelay

–=

ttd Czc

Rzc1 Rzc2

---------------------------------×=

PWM Vcs

VPWM

CoolSET®- Q1

ICE2QR2280Z-1

Functional Description

Version 2.1 10 March 7, 2013

required maximum VCS versus various input bus

voltage can be calculated, which is shown in Figure 6.

Figure 6 Variation of the VCS limit voltage according

to the IZC current

According to the typical application circuit, when

MOSFET is turned on, a negative voltage proportional

to bus voltage will be coupled to auxiliary winding.

Inside CoolSET®- Q1, an internal circuit will clamp the

voltage on ZC pin to nearly 0V. As a result, the current

flowing out from ZC pin can be calculated as

[5]

When this current is higher than IZC_FS, the amount of

current exceeding this threshold is used to generate an

offset to decrease the maximum limit on VCS. Since the

ideal curve shown in Figure 6 is a nonlinear one, a

digital block in CoolSET®- Q1 is implemented to get a

better control of maximum output power. Additional

advantage to use digital circuit is the production

tolerance is smaller compared to analog solutions. The

typical maximum limit on VCS versus the ZC current is

shown in Figure 7.

Figure 7 VCS-max versus IZC

3.5 Active Burst Mode Operation

At light load condition, the IC enters Active Burst Mode

operation to minimize the power consumption. Details

about Active Burst Mode operation are explained in the

following paragraphs.

3.5.1 Entering Active Burst Mode Operation

For determination of entering Active Burst Mode

operation, three conditions apply:

• the feedback voltage is lower than the threshold of

VFBEB (1.25V). Accordingly, the peak current sense

voltage across the shunt resistor is 0.17;

• the up/down counter is NZC_ABM (7) and

• a certain blanking time tBEB (24ms).

Once all of these conditions are fulfilled, the Active

Burst Mode flip-flop is set and the controller enters

Active Burst Mode operation. This multi-condition

determination for entering Active Burst Mode operation

prevents mis-triggering of entering Active Burst Mode

operation, so that the controller enters Active Burst

Mode operation only when the output power is really

low during the preset blanking time.

3.5.2 During Active Burst Mode Operation

After entering the Active Burst Mode the feedback

voltage rises as VOUT starts to decrease due to the

inactive PWM section. One comparator observes the

feedback signal if the voltage level VFBBOn (3.6V) is

exceeded. In that case the internal circuit is again

activated by the internal bias to start with switching.

Turn-on of the power MOSFET is triggered by the

timer. The PWM generator for Active Burst Mode

operation composes of a timer with a fixed frequency of

fsB (52kHz, typical) and an analog comparator. Turn-off

is resulted if the voltage across the shunt resistor at CS

pin hits the threshold VcsB (0.34V). A turn-off can also

be triggered if the duty ratio exceeds the maximal duty

ratio DmaxB (50%). In operation, the output flip-flop will

be reset by one of these signals which come first.

If the output load is still low, the feedback signal

decreases as the PWM section is operating. When

feedback signal reaches the low threshold VFBBOff

(3.0V), the internal bias is reset again and the PWM

section is disabled until next time regulation signal

increases beyond the VFBBOn (3.6V) threshold. If

working in Active Burst Mode the feedback signal is

changing like a saw tooth between VFBBOff and VFBBOn

shown in Figure 8.

3.5.3 Leaving Active Burst Mode Operation

The feedback voltage immediately increases if there is

a high load jump. This is observed by one comparator.

As the current limit is 34% during Active Burst Mode a

certain load is needed so that feedback voltage can

exceed VLB (4.5V). After leaving active burst mode,

maximum current can now be provided to stabilize VO.

In addition, the up/down counter will be set to 1

0.6

0.7

0.8

0.9

80 100 120 140 160 180 200 220 240 260 280 300 320 340 360 380 400

Vin(V)

Vcs-max(V)

IZC

BUS

RZC1NP

------------------------

0.6

0.7

0.8

0.9

300 500 700 900 1100 1300 1500 1700 1900 2100

Izc(uA)

Vcs-max(V)

CoolSET®- Q1

ICE2QR2280Z-1

Functional Description

Version 2.1 11 March 7, 2013

immediately after leaving Active Burst Mode. This is

helpful to decrease the output voltage undershoot.

Figure 8 Signals in Active Burst Mode

3.6 Protection Functions

The IC provides full protection functions. The following

table summarizes these protection functions.

Table 2 Protection features

During operation, the VCC voltage is continuously

monitored. In case of an under-voltage or an over-

voltage, the IC is reset and the main power switch is

then kept off. After the VCC voltage falls below the

threshold VVCCoff, the startup cell is activated. The VCC

capacitor is then charged up. Once the voltage

exceeds the threshold VVCCon, the IC begins to operate

with a new soft-start.

In case of open control loop or output over load, the

feedback voltage will be pulled up. After a blanking time

of tOLP_B (30ms), the IC enters auto-restart mode. The

blanking time here enables the converter to provide a

peak power in case the increase in VFB is due to a

sudden load increase. This output over load protection

is disabled during burst mode.

During off-time of the power switch, the voltage at the

zero-crossing pin is monitored for output over-voltage

detection. If the voltage is higher than the preset

threshold vZCOVP, the IC is latched off after the preset

blanking time tZCOVP. This latch off mode can only be

reset if the Vcc < VVCCPD (5.2V).

If the junction temperature of IC exceeds TjCon (140 °C),

the IC enters into OTP auto restart mode. This OTP is

disabled during burst mode.

If the voltage at the current sensing pin is higher than

the preset threshold vCSSW during on-time of the power

switch, the IC is latched off. This is short-winding

protection. The short winding protection is disabled

during burst mode.

During latch-off protection mode, the VCC voltage

drops to vVCCoff (9.85V) and then the startup cell is

activated. The VCC voltage is then charged to vVCCon

(18V). The startup cell is shut down again. This action

repeats again and again.

There is also a maximum on time limitation

implemented inside the CoolSET®- Q1. Once the gate

voltage is high and longer than tOnMAx, the switch is

turned off immediately.

VCC Overvoltage Auto Restart Mode

VCC Undervoltage Auto Restart Mode

Overload/Open Loop Auto Restart Mode

Over temperature Auto Restart Mode

Output Overvoltage Latched Off Mode

Short Winding Latched Off Mode

VFBEB

VFBBOn

VFBLB

VFB

VCSB

1.0V

VCS

VVCCoff

VVCC t

VFBBOff

Max. Ripple < 1%

Time to 7th zero and

Blanking Window (tBEB)

Current limit level during

Active Burst Mode

Leaving

Active Burst

Mode

Entering

Active Burst

Mode

CoolSET®- Q1

ICE2QR2280Z-1

Electrical Characteristics

Version 2.1 12 March 7, 2013

4 Electrical Characteristics

Note: All voltages are measured with respect to ground (Pin 8). The voltage levels are valid if other ratings are

not violated.

4.1 Absolute Maximum Ratings

Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction

of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 7

(VCC) is discharged before assembling the application circuit.

4.2 Operating Range

Note: Within the operating range the IC operates as described in the functional description.

Parameter Symbol Limit Values Unit Remarks

min. max.

Drain Source Voltage VDS - 800 V Tj=25°C

Pulse drain current, tplimited by Tjmax ID_Puls - 4.9 A

Avalanche energy, repetitive tAR limited by

max. Tj=150°C1)

1) Repetitive avalanche causes additional power losses that can be calculated as PAV=EAR*f

EAR - 0.047 mJ

Avalanche current, repetitive tAR limited by

max. Tj=150°C

IAR - 1.5 A

VCC Supply Voltage VVCC -0.3 27 V

FB Voltage VFB -0.3 5.5 V

ZC Voltage VZC -0.3 5.5 V

CS Voltage VCS -0.3 5.5 V

Maximum current out from ZC pin IZCMAX 3 - mA

Junction Temperature Tj-40 150 °C Controller & CoolMOS®

Storage Temperature TS-55 150 °C

Thermal Resistance

Junction -Ambient

RthJA - 81 K/W with 232mm2, 2 oz

copper area on drain pin

Ta=25°C

ESD Capability (incl. Drain Pin) VESD - 2 kV Human body model2)

2) According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kWseries resistor)

Parameter Symbol Limit Values Unit Remarks

min. max.

VCC Supply Voltage VVCC VVCCoff VVCCOVP V

CoolSET®- Q1

ICE2QR2280Z-1

Electrical Characteristics

Version 2.1 13 March 7, 2013

4.3 Characteristics

4.3.1 Supply Section

Note: The electrical characteristics involve the spread of values within the specified supply voltage and junction

temperature range TJfrom – 25 °C to 125 °C. Typical values represent the median values, which are

related to 25°C. If not otherwise stated, a supply voltage of VCC = 18 V is assumed.

4.3.2 Internal Voltage Reference

Junction Temperature of

Controller

TjCon -25 130 °C

Junction Temperature of

CoolMOS®

TjCoolMOS -25 150 °C

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

Start Up Current IVCCstart - 300 550 mAVVCC =VVCCon -0.2V

VCC Charge Current IVCCcharge1 - 5.0 - mA VVCC = 0V

IVCCcharge2 0.8 - - mA VVCC = 1V

IVCCcharge3 - 1 - mA VVCC =VVCCon -0.2V

Maximum Input Current of

Startup Cell and CoolMOS®

IDrainIn - - 2 mA VVCC =VVCCon -0.2V

Leakage Current of

Startup Cell and CoolMOS®

IDrainLeak - 0.2 50 mAVDrain = 650V

at Tj=100°C

Supply Current in normal

operation IVCCNM - 1.5 2.3 mA output low

Supply Current in

Auto Restart Mode with Inactive

Gate

IVCCAR - 300 - mAIFB = 0A

Supply Current in Latch-off Mode IVCClatch - 300 - mAIFB = 0A

Supply Current in Burst Mode with

inactive Gate

IVCCburst - 500 950 mAVFB = 2.5V, exclude the

current flowing out from

FB pin

VCC Turn-On Threshold VVCCon 17.0 18.0 19.0 V

VCC Turn-Off Threshold VVCCoff 9.2 9.85 10.5 V

VCC Turn-On/Off Hysteresis VVCChys - 8.15 - V

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

Internal Reference Voltage VREF 4.80 5.00 5.20 V Measured at pin FB

IFB=0A

CoolSET®- Q1

ICE2QR2280Z-1

Electrical Characteristics

Version 2.1 14 March 7, 2013

4.3.3 PWM Section

4.3.4 Current Sense

4.3.5 Soft Start

4.3.6 Foldback Point Correction

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

Feedback Pull-Up Resistor RFB 14 23 33 kW

PWM-OP Gain GPWM 3.18 3.3 - -

Offset for Voltage Ramp VPWM 0.6 0.7 - V

Maximum on time in normal

operation

tOnMax 22 30 41 ms

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

Peak current limitation in normal

operation

VCSth 0.97 1.03 1.09 V

Leading Edge Blanking time tLEB 200 330 460 ns

Peak Current Limitation in

Active Burst Mode

VCSB 0.29 0.34 0.39 V

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

Soft-Start time tSS 8.5 12 - ms

soft-start time step tSS_S

1) The parameter is not subjected to production test - verified by design/characterization

- 3 - ms

Internal regulation voltage at

first step

VSS1

1) - 1.76 - V

Internal regulation voltage step

at soft start

VSS_S

1) - 0.56 - V

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

ZC current first step threshold IZC_FS 0.350 0.5 0.621 mA

ZC current last step threshold IZC_LS 1.3 1.7 2.2 mA

CS threshold minimum VCSMF - 0.66 - V Izc=2.2mA, VFB=3.8V

CoolSET®- Q1

ICE2QR2280Z-1

Electrical Characteristics

Version 2.1 15 March 7, 2013

4.3.7 Digital Zero Crossing

4.3.8 Active Burst Mode

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

Zero crossing threshold voltage VZCCT 50 100 170 mV

Ringing suppression threshold VZCRS - 0.7 - V

Minimum ringing suppression time tZCRS1 1.62 2.5 4.5 ms VZC > VZCRS

Maximum ringing suppression time tZCRS2 - 25 - ms VZC < VZCRS

Threshold to set Up/Down Counter to

one

VFBR1 - 3.9 - V

Threshold for downward counting at

low line

VFBZHL - 3.2 - V

Threshold for upward counting at low

line

VFBZLL - 2.5 - V

Threshold for downward counting at

high line

VFBZHH - 2.9 - V

Threshold for upward counting at high

line

VFBZLH - 2.3 - V

ZC current for IC switch threshold to

high line

IZCSH - 1.3 - mA

ZC current for IC switch threshold to

low line

IZCSL - 0.8 - mA

Counter time1)

1) The parameter is not subjected to production test - verified by design/characterization

tCOUNT - 48 - ms

Maximum restart time in normal

operation

tOffMax 30 42 57.5 ms

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

Feedback voltage for entering Active

Burst Mode

VFBEB - 1.25 - V

Minimum Up/down value for entering

Active Burst Mode

NZC_ABM - 7 -

Blanking time for entering Active Burst

Mode

tBEB - 24 - ms

Feedback voltage for leaving Active

Burst Mode

VFBLB - 4.5 - V

Feedback voltage for burst-on VFBBOn - 3.6 - V

Feedback voltage for burst-off VFBBOff - 3.0 - V

Fixed Switching Frequency in

Active Burst Mode

fsB 39 52 65 kHz

Max. Duty Cycle in Active Burst Mode DmaxB - 0.5 -

CoolSET®- Q1

ICE2QR2280Z-1

Electrical Characteristics

Version 2.1 16 March 7, 2013

4.3.9 Protection

Note: The trend of all the voltage levels in the Control Unit is the same regarding the deviation except VVCCOVP

&VVCCPD.

4.3.10 CoolMOS®Section

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

VCC overvoltage threshold VVCCOVP 24.0 25.0 26.0 V

Over Load or Open Loop Detection

threshold for OLP protection at FB pin

VFBOLP - 4.5 - V

Over Load or Open Loop Protection

Blanking Time

tOLP_B 20 30 44 ms

Output Overvoltage detection

threshold at the ZC pin

VZCOVP 3.55 3.7 3.84 V

Blanking time for Output Overvoltage

protection

tZCOVP - 100 - ms

Threshold for short winding protection VCSSW 1.63 1.68 1.78 V

Blanking time for short-winding

protection

tCSSW - 190 - ns

Over temperature protection1) TjCon 130 140 150 °C

Power Down Reset for

Latched Mode

VVCCPD 5.2 - 7.8 V After Latched Off

Mode is entered

Parameter Symbol Limit Values Unit Test Condition

min. typ. max.

Drain Source Breakdown Voltage V(BR)DSS 800

870

VTj= 25°C

Tj= 110°C

Drain Source On-Resistance RDSon1 - 2.26

5.02

6.14

2.62

5.81

7.1

Tj= 25°C

Tj=125°C1)

Tj=150°C1)

at ID= 0.81A

1) The parameter is not subjected to production test - verified by design/characterization

Effective output capacitance, energy

Co(er) - 16.31) - pF VDS = 0V to 480V

Rise Time trise - 302)

2) Measured in a Typical Flyback Converter Application

- ns

Fall Time tfall - 302) - ns

CoolSET®- Q1

ICE2QR2280Z-1

Typical CoolMOS®Performance Characteristic

Version 2.1 17 March 7, 2013

5 Typical CoolMOS®Performance Characteristic

Figure 9 Drain-Source Breakdown voltage; VBR(DSS)=f(Tj),ID=0.25mA

Figure 10 Safe Operating Area (SOA) for ICE2QR2280Z-1

CoolSET®- Q1

ICE2QR2280Z-1

Input Power Curve

Version 2.1 18 March 7, 2013

6 Input Power Curve

Two input power curves gives typical input power versus ambient temperature are showed below;

Vin=85~265Vac(Figure 11) and Vin=230Vac(Figure 12). The curves are derived based on a typical

discontinuous mode flyback model which considers 150V maximum secondary to primary reflected voltage. The

calculation is based on 232mm2, 2 ounce copper area as heatsink for the device. The input power already includes

power loss at input common mode choke and bridge rectifier and the CoolMOS®. The device saturation current

(ID_plus@Tj=125 °C) is also considered.

To estimate the out power of the device, it is simply multiplying the input power at a particular ambient temperature

with the estimated efficiency for the application. For example, a wide range input voltage(Figure 11), operating

temperature is 50 °C, estimated efficiency is 80%,the output power is 24.8W (31W*0.80)

Figure 11 Input Power curve Vin=85~265Vac;Pin=f(Ta)

Figure 12 Input Power curve Vin=230Vac;Pin=f(Ta)

Input Power curve of ICE2QR2280Z

0 25 35 45 55 65 75 85 95 105 115 125

Ambient Temperature[0C]

Input Power(85Vac~265Vac)[W]

Input Power curve of ICE2QR2280Z

0 25 35 45 55 65 75 85 95 105 115 125

Ambient Temperature[0C]

Input Power(230Vac)[W]

CoolSET®- Q1

ICE2QR2280Z-1

Outline dimension

Version 2.1 19 March 7, 2013

7 Outline dimension

Figure 13 PG-DIP-7

PG-DIP-7

(Plastic Dual In-Line Outline)

CoolSET®- Q1

ICE2QR2280Z-1

Marking

Version 2.1 20 March 7, 2013

8 Marking

Figure 14 Marking for ICE2QR2280Z-1

Marking

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