RHFLVDS31A Rad-hard quad LVDS driver Datasheet - production data * Guaranteed up to 300 krad TID * SEL immune up to 135 MeV.cm/mg * SET/SEU immune up to 67 MeV.cm/mg Description The RHFLVDS31A is a quad, low-voltage, differential signaling (LVDS) driver specifically designed, packaged, and qualified for use in aerospace environments in a low-power and fast point-to-point baseband data transmission standard. Ceramic Flat-16 The upper metallic lid is electrically connected to ground Operating at 3.3 V power supply, the RHFLVDS31A operates over a controlled impedance of 100-ohm transmission media that may be printed circuit board traces, back planes or cables. Features * LVDS output * CMOS input * Enable/Disable function with high-impedance * ANSI TIA/EIA-644 compliant The circuit features an internal fail-safe function to ensure a known state in case of floating input. All pins have cold spare buffers to ensure they are in high impedance when VCC is tied to GND. Designed on ST's proprietary CMOS process with specific mitigation techniques, the RHFLVDS31A achieves "best in the class" for hardness to total ionisation dose and heavy ions. * 400 Mbps (200 MHz) * Cold spare on all pins * 3.3 V operating power supply * 4.8 V absolute rating * Output voltage: 350 mV on 100-ohm load * Power consumption: 55 mW at 3.3 V The RHFLVDS31A can operate over a large temperature range of -55 C to +125 C and it is housed in an hermetic Ceramic Flat-16 package. * Hermetic package Table 1. Device summary Reference SMD pin Quality level Package RHFLVDS31AK1 - Engineering model RHFLVDS31AK01V 5962F98651 QML-V flight Lead finish Mass Gold 0.65 g Ceramic Flat-16 EPPL(1) Temp. range Target -55 C to 125 C 1. EPPL = ESA preferred part list April 2017 This is information on a product in full production. DocID025370 Rev 4 1/15 www.st.com Contents RHFLVDS31A Contents 1 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings and operating conditions . . . . . . . . . . . . . . . . . . . . . . 5 4 Radiation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.1 Ceramic Flat-16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 9 Shipping information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2/15 DocID025370 Rev 4 RHFLVDS31A 1 Functional description Functional description Figure 1. Logic diagram and logic symbol G 4 12 G G 1A 2 1 3 G 1Y 6 2A 5 10 3A 9 11 EN 12 1Z 2 1A 7 4 1 3 2Y 6 2Z 2A 7 5 10 3Y 3A 9 11 3Z 14 14 4A 15 13 4A 4Y 15 13 1Y 1Z 2Y 2Z 3Y 3Z 4Y 4Z 4Z CS05860 CS05830 Table 2. Truth table Input Note: Enables Outputs A G G Y Z H H X H L L H X L H H X L H L L X L L H X L H Z Z OPEN H X L H OPEN X L L H 1 The G input features an internal pull-up network. The G input features an internal pull-down network. If they are floating the circuit is enabled. 2 L = low level, H = high Level, X = irrelevant, Z = high impedance (off) DocID025370 Rev 4 3/15 15 Pin configuration 2 RHFLVDS31A Pin configuration Figure 2. Pin connections (top view) Table 3. Pin description 4/15 Pin number Symbol Name and function 1, 7, 9, 15 1A to 4A Driver inputs 2, 6, 10, 14 1Y to 4Y 3, 5, 11, 13 1Z to 4Z 4 G 12 G 8 GND Ground 16 VCC Supply voltage DocID025370 Rev 4 Driver outputs Enable RHFLVDS31A 3 Maximum ratings and operating conditions Maximum ratings and operating conditions Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Table 4. Absolute maximum ratings Symbol VCC Vi VOUT Tstg Tj Rthjc ESD Parameter Supply voltage Value (1) Unit 4.8 TTL inputs (operating or cold spare) -0.3 to +4.8 LVDS outputs (operating or coldspare) -0.3 to +4.8 Storage temperature range -65 to +150 Maximum junction temperature V C +150 Thermal resistance junction to case(2) 22 C/W HBM: Human body model - All pins except LVDS outputs - LVDS outputs vs. GND 2 8 kV 500 V CDM: Charge device model 1. All voltages, except differential I/O bus voltage, are with respect to the network ground terminal. 2. Short-circuits can cause excessive heating. Destructive dissipation can result from short-circuits on the amplifiers. Table 5. Operating conditions Symbol Parameter Min. Typ. Max. 3.3 3.6 VCC Supply voltage 3 VIN Driver DC input voltage (TTL inputs) 0 3.6 TA Ambient temperature range -55 +125 DocID025370 Rev 4 Unit V C 5/15 15 Radiation 4 RHFLVDS31A Radiation Total dose (MIL-STD-883 TM 1019) The products guaranteed in radiation within the RHA QML-V system fully comply with the MIL-STD-883 TM 1019 specification. The RHFLVDS31A is RHA QML-V, tested and characterized in full compliance with the MIL-STD-883 specification, between 50 and 300 rad/s only (full CMOS technology). All parameters provided in Table 7: Electrical characteristics apply to both pre- and postirradiation, as follows: * All test are performed in accordance with MIL-PRF-38535 and test method 1019 of MIL-STD-883 for total ionizing dose (TID). * The initial characterization is performed in qualification only on both biased and unbiased parts. * Each wafer lot is tested at high dose rate only, in the worst bias case condition, based on the results obtained during the initial qualification. Heavy ions The behavior of the product when submitted to heavy ions is not tested in production. Heavy-ion trials are performed on qualification lots only. Table 6. Radiation Type TID Heavy ions 6/15 Characteristics Value Unit High-dose rate (50 - 300 rad/sec) up to: 300 krad SEL immune up to: (with a particle angle of 60 at 125 C) 135 SEL immune up to: (with a particle angle of 0 at 125 C) 67 SET/SEU immune up to: (at 25 C) 67 DocID025370 Rev 4 MeV.cm/mg RHFLVDS31A 5 Electrical characteristics Electrical characteristics In Table 7 below, VCC = 3 V to 3.6 V, capa-load (CL) = 10 pF, typical values are at Tamb = +25 C, min. and max values are at Tamb = - 55 C and + 125 C unless otherwise specified Table 7. Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. ICCL Total enabled supply current, drivers enabled, not switching VIN = 0 V or VCC Load = 100 on all channels 16.5 20 ICCZ Total disabled supply current, loaded or not loaded, drivers disabled VIN = 0 V or VCC G = GND, G = VCC 2.8 4 TTL input power-off leakage current VCC = 0 V, VIN = 3.6 V IOFF (1) LVDS output power-off leakage VCC = 0 V, VOUT = 3.6 V current VOH Output voltage high VOL Output voltage low VOD1 Differential output voltage DVOD1 VOS DVOS Change of magnitude of VOD1 for complementary output states mA -10 10 -50 +50 A 1.65 0.925 250 10 1.125 Change of magnitude of VOS for complementary output states V 15 mV Output short-circuit current VIN = 0 V and VO(Z) = 0 V or VIN = VCC and VO(Y) = 0 V -9 IO High impedance output current Disabled, VOUT = 3.6 V or GND -10 10 VIH Input voltage high 2 VCC VIL Input voltage low GND 0.8 IIH High level input current G, G, and TTL inputs VCC = 3.6 V, VIN = VCC -10 10 IIL Low level input current G, G and TTL inputs VCC = 3.6 V, VIN = 0 -10 CIN Input capacitance mA A V A 10 3 DocID025370 Rev 4 mV 1.45 IOS G, G, and TTL inputs V 400 RL = 100 Offset voltage Unit pF 7/15 15 Electrical characteristics RHFLVDS31A Table 7. Electrical characteristics (continued) Symbol Parameter tPHLD Propagation delay time, high to low output tPLHD Propagation delay time, low to high output Test conditions Min. Typ. Max. 0.5 1.5 0.5 1.5 Refer to Figure 4 Unit ns tr Differential output signal rise time tf Differential output signal fall time tSK1 Channel-to-channel skew(2) 0.28 tSK2 Chip-to-chip skew(3)(4) 0.7 0.8 0.8 skew(5) tSKD Differential (tPHLD-tPLHD) tPHZ Propagation delay time, high level to high impedance output tPLZ Propagation delay time, low level to high impedance output 2.8 tPZH Propagation delay time, high impedance to high level output 2.5 tPZL Propagation delay time, high impedance to low level output 2.5 0.3 2.8 Load: refer to Figure 4 ns 1. All pins except pin under test and VCC are floating. 2. tSK1 is the maximum delay time difference between all outputs of the same device (measured with all inputs connected together). 3. tSK2 is the maximum delay time difference between outputs of all devices when they operate with the same supply voltage, at the same temperature. 4. Guaranteed by design. 5. tSKD is the maximum delay time difference between tPHLD and tPLHD (see Figure 4). Cold sparing The RHFLVDS31A features a cold spare input and output buffer. In high reliability applications, cold sparing enables a redundant device to be tied to the data bus with its power supply at 0 V (VCC = GND) without affecting the bus signals or injecting current from the I/Os to the power supplies. Cold sparing also allows redundant devices to be kept powered off so that they can be switched on only when required. This has no impact on the application. Cold sparing is achieved by implementing a high impedance between the I/Os and VCC. ESD protection is ensured through a non-conventional dedicated structure. Fail-safe In many applications, inputs need a fail-safe function to avoid an uncertain output state when the inputs are not connected properly. In case of TTL floating inputs, the LVDS outputs remain in a stable logic-high state. 8/15 DocID025370 Rev 4 RHFLVDS31A 6 Test circuit Test circuit Figure 3. Voltage and current definition (Y) OUT+ II LVDS Driver VOD VOS=(VOZ+VOY)/2 (Z) OUT- VIN VOZ VOY Figure 4. Test circuit, timing and voltage definitions for differential output signal LVDS Driver 100ohm CL=10pF CL=10pF VIN Vcc/2 Vcc/2 tPLHD tPHLD VOD 80% 80% 20% tf 20% tr 1. All input pulses are supplied by a generator with the following characteristics: tr or tf 1 ns, f = 1 MHz, ZO = 50 , and duty cycle = 50%. 2. The product is guaranteed in test with CL = 10 pF DocID025370 Rev 4 9/15 15 Test circuit RHFLVDS31A Figure 5. Enable and disable waveform 50ohm OUT+ LVDS Driver VOD OUT- 1.2V 50ohm VOS CL=10pF CL=10pF G 50% 50% G 50% 50% TPZH VOUT+ or VOUT- TPHZ 50% TPLZ TPZL VOUT+ or VOUT- 50% 50% 50% 1. All input pulses are supplied by a generator with the following characteristics: tr or tf 1 ns, fG or fG = 500 kHz, and pulse width G or G = 500 ns. 2. The product is guaranteed in test with CL = 10 pF 10/15 DocID025370 Rev 4 RHFLVDS31A 7 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. DocID025370 Rev 4 11/15 15 Package information 7.1 RHFLVDS31A Ceramic Flat-16 package information Figure 6. Ceramic Flat-16 package mechanical drawing b e c L 16 E3 9 E E2 8 1 E3 L Q S1 A D 1. The upper metallic lid is electrically connected to ground. Table 8. Ceramic Flat-16 package mechanical data Dimensions Ref. Millimeters Min. Max. Min. Typ. Max. A 2.31 2.72 0.091 0.107 b 0.38 0.48 0.015 0.019 c 0.10 0.18 0.004 0.007 D 9.75 10.13 0.384 0.399 E 6.75 7.06 0.266 0.278 E2 E3 4.32 0.170 0.76 e 12/15 Typ. Inches 0.030 1.27 0.050 L 6.35 7.36 0.250 0.290 Q 0.66 1.14 0.026 0.045 S1 0.13 0.005 DocID025370 Rev 4 RHFLVDS31A 8 Ordering information Ordering information Table 9. Order codes Order code Description RHFLVDS31AK1 Engineering model RHFLVDS31AK01V QML-V flight Temp. range Package Marking(1) -55 C to 125 C Ceramic Flat-16 RHFLVDS31AK1 Packing Strip pack 5962F9865107VZC 1. Specific marking only. Complete marking includes the following: - SMD pin (on QML-V flight only) - ST logo - Date code (date the package was sealed) in YYWWA (year, week, and lot index of week) - QML logo (Q or V) - Country of origin (FR = France). Note: Contact your ST sales office for information regarding the specific conditions for products in die form and QML-Q versions. 9 Shipping information Date code The date code is structured as follows: * Engineering model: EM xyywwz * QML flight model: FM yywwz Where: x = 3 (EM only), assembly location Rennes (France) yy = last two digits of the year ww = week digits z = lot index of the week DocID025370 Rev 4 13/15 15 Revision history 10 RHFLVDS31A Revision history Table 10. Document revision history 14/15 Date Revision Changes 29-Oct-2013 1 Initial release 30-Oct-2014 2 - Updated production status and marking information relative to order code RHFLVDS31AK01V in Table 1: Device summary and Table 9: Order codes. - Changed title of Section 4 to "Radiation" and moved Electrical characteristics to Section 5. 04-Mar-2015 3 Added VOUT to Table 4: Absolute maximum ratings. 28-Apr-2017 4 Table 1: Device summary: added mass value DocID025370 Rev 4 RHFLVDS31A IMPORTANT NOTICE - PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST's terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers' products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. (c) 2017 STMicroelectronics - All rights reserved DocID025370 Rev 4 15/15 15