Features
•Fast read access time – 55ns
•Low-power CMOS operation
– 100µA max standby
– 40mA max active at 5MHz
•JEDEC standard packages
– 40-lead PDIP
– 44-lead PLCC
•Direct upgrade from 512Kbit, 1Mbit, and 2Mbit
Atmel® AT27C516, AT27C1024, and AT27C2048) EPROMs
•5V ± 10% supply
•High-reliability CMOS technology
– 2,000V ESD protection
– 200mA latchup immunity
•Rapid programming algorithm – 50µs/word (typical)
•CMOS- and TTL-compatible inputs and outputs
•Integrated product identification code
•Industrial temperature range
•Green (Pb/halide-free) packaging option
1. Description
The Atmel AT27C4096 is a low-power, high-performance, 4,194,304-bit, one-time pro-
grammable, read-only memory (OTP EPROM) organized as 256K by 16 bits. It requires a
single 5V power supply in normal read mode operation. Any word can be accessed in less
than 55ns, eliminating the need for speed reducing WAIT states. The x16 organization
makes this part ideal for high-performance, 16- and 32-bit microprocessor systems.
In read mode, the AT27C4096 typically consumes 15mA. Standby mode supply current is
typically less than 10µA
The AT27C4096 is available in industry-standard, JEDEC-approved, one-time programma-
ble (OTP) PDIP and PLCC packages. The device features two-line control (CE, OE) to
eliminate bus contention in high speed systems.
With high-density 256K word storage capability, the AT27C4096 allows firmware to be
stored reliably and to be accessed by the system without the delays of mass storage media.
The AT27C4096 has additional features that ensure high quality and efficient production
use. The rapid programming algorithm reduces the time required to program the part and
guarantees reliable programming. Programming time is typically only 50µs/word. The Inte-
grated product identification code electronically identifies the device and manufacturer. This
feature is used by industry-standard programming equipment to select the proper pro-
gramming algorithms and voltages.
4Mb (256K x 16)
One-time
Programmable,
Read-only Memory
Atmel AT27C4096
0311J–EPROM–4/11
2
0311J–EPROM–4/11
Atmel AT27C4096
2. Pin configurations
Note: Both GND pins must be
connected
3. System considerations
Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless
accommodated by the system design, these transients may exceed datasheet limits, resulting in device nonconformance.
At a minimum, a 0.1µF, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the VCC and ground terminals of the device, as close to the device as possible.
Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7µF bulk electrolytic
capacitor should be utilized, again connected between the VCC and ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.
Figure 3-1. Block diagram
Pin name Function
A0 - A17 Addresses
O0 - O15 Outputs
CE Chip enable
OE Output enable
NC No connect
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
O12
O11
O10
O9
O8
GND
NC
O7
O6
O5
O4
A13
A12
A11
A10
A9
GND
NC
A8
A7
A6
A5
6
5
4
3
2
1
44
43
42
41
40
18
19
20
21
22
23
24
25
26
27
28
O3
O2
O1
O0
OE
NC
A0
A1
A2
A3
A4
O13
O14
O15
CE
VPP
NC
VCC
A17
A16
A15
A14
44-lead PLCC
Top view
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VPP
CE
O15
O14
O13
O12
O11
O10
O9
O8
GND
O7
O6
O5
O4
O3
O2
O1
O0
OE
VCC
A17
A16
A15
A14
A13
A12
A11
A10
A9
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0
40-lead PDIP
Top view
3
0311J–EPROM–4/11
Atmel AT27C4096
4. Absolute maximum ratings*
Note: 1. Maximum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is
VCC + 0.75V DC, which may overshoot to +7.0V for pulses of less than 20ns.
5. DC and AC characterisitcs
Table 5-1. Operating modes
Notes: 1. X can be VIL or VIH.
2. Refer to the Programming characteristics.
3. VH = 12.0 0.5V.
4. Two identifier words may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0, which is tog-
gled low (VIL) to select the manufacturer’s identification word and high (VIH) to select the device code word.
5. Standby VCC current (ISB) is specified with VPP = VCC. VCC > VPP will cause a slight increase in ISB.
Table 5-2. DC and AC operating conditions for read operation
Temperature under bias . . . . . . . . . . . . . -55C to +125C*NOTICE: Stresses beyond those listed under “Absolute
maximum ratings” may cause permanent damage to
the device. This is a stress rating only, and functional
operation of the device at these or any other
conditions beyond those indicated in the operational
sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect device reliability.
Storage temperature . . . . . . . . . . . . . . . . -65C to +150C
Voltage on any pin with
respect to ground . . . . . . . . . . . . . . . . . . . -2.0V to +7.0V(1)
Voltage on A9 with
respect to ground . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1)
VPP supply voltage with
respect to ground . . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1)
Mode/Pin CE OE Ai VPP Outputs
Read VIL VIL Ai X(1) DOUT
Output disable X VIH X X High Z
Standby VIH XX X
(5) High Z
Rapid program(2) VIL VIH Ai VPP DIN
PGM verify VIH VIL Ai VPP DOUT
PGM inhibit VIH VIH XV
PP High Z
Product identification(4) VIL VIL
A9 = VH(3)
A0 = VIH or VIL
A1 - A17 = VIL
VCC Identification code
Atmel AT27C4096
-55 -90
Industrial operating temperature (case) -40C - 85C -40C - 85C
VCC power supply 5V 10% 5V 10%
4
0311J–EPROM–4/11
Atmel AT27C4096
Table 5-3. DC and operating characteristics for read operation
Notes: 1. VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP.
2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and
IPP.
Table 5-4. AC characteristics for read operation
Note: 1. See the AC waveforms for read operation diagram.
Symbol Parameter Condition Min Max Units
ILI Input load current VIN = 0V to VCC 1µA
ILO Output leakage current VOUT = 0V to VCC 5µA
IPP1(2) VPP(1) read/standby current VPP = VCC 10 µA
ISB VCC(1) standby current
ISB1 (CMOS)
CE = VCC± 0.3V 100 µA
ISB2 (TTL)
CE = 2.0 to VCC + 0.5V 1mA
ICC VCC active current f = 5MHz, IOUT = 0mA, CE = VIL 40 mA
VIL Input low voltage -0.6 0.8 V
VIH Input high voltage 2.0 VCC + 0.5 V
VOL Output low voltage IOL = 2.1mA 0.4 V
VOH Output high voltage IOH = -400µA 2.4 V
Symbol Parameter Condition
Atmel AT27C4096
Units
-55 -90
Min Max Min Max
tACC(1) Address to output delay CE = OE = VIL 55 90 ns
tCE(1) CE to output delay OE = VIL 55 90 ns
tOE(1) OE to output delay CE = VIL 20 35 ns
tDF(1) OE or CE high to output float,
whichever occurred first 20 20 ns
tOH(1) Output hold from address, CE or OE,
whichever occurred first 70ns
5
0311J–EPROM–4/11
Atmel AT27C4096
Figure 5-1. AC waveforms for read operation(1)
Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC.
4. This parameter is only sampled, and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
Figure 5-2. Input test waveforms and measurement levels
For -55 devices only:
tR, tF < 5ns (10% to 90%)
For -90 devices:
tR, tF < 20ns (10% to 90%)
Figure 5-3. Output test load
Note: CL = 100pF including jig capacitance.
OUTPUT
PIN
1.3V
(1N914)
3.3K
CL
6
0311J–EPROM–4/11
Atmel AT27C4096
Table 5-5. Pin capacitance
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled, and is not 100% tested.
Figure 5-4. Programming waveforms(1)
Notes: 1. The input timing reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device, but must be accommodated by the programmer.
3. When programming the Atmel AT27C4096, a 0.1µF capacitor is required across VPP and ground to suppress spurious volt-
age transients.
f = 1MHz, T = 25°C(1)
Symbol Typ Max Units Conditions
CIN 410pFV
IN = 0V
COUT 812pFV
OUT = 0V
7
0311J–EPROM–4/11
Atmel AT27C4096
Table 5-6. DC programming characteristics
Table 5-7. AC programming characteristics
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.
2. This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no longer driven.
See timing diagram.
3. Program pulse width tolerance is 50µs ± 5%.
Table 5-8. The Atmel AT27C4096 intergrated product identification code
TA = 25 5°C, VCC = 6.5 0.25V, VPP = 13.0 0.25V
Symbol Parameter Test conditions
Limits
UnitsMin Max
ILI Input load current VIN = VIL, VIH 10 µA
VIL Input low level -0.6 0.8 V
VIH Input high level 2.0 VCC + 0.7 V
VOL Output low voltage IOL = 2.1mA 0.4 V
VOH Output high voltage IOH = -400µA 2.4 V
ICC2 VCC supply current (program and verify) 50 mA
IPP2 VPP supply current CE = VIL 30 mA
VID A9 product identification voltage 11.5 12.5 V
TA = 25 5°C, VCC = 6.5 0.25V, VPP = 13.0 0.25V
Symbol Parameter Test conditions(1)
Limits
UnitsMin Max
tAS Address setup time
Input rise and fall times :
(10% to 90%) 20ns
Input pulse levels
0.45V to 2.4V
Input timing reference level:
0.8V to 2.0V
Output timing reference level
0.8V to 2.0V
2µs
tOES OE setup time 2 µs
tDS Data setup time 2 µs
tAH Address hold time 0 µs
tDH Data hold time 2 µs
tDFP OE high to output float delay(2) 0 130 ns
tVPS VPP setup time 2 µs
tVCS VCC setup time 2 µs
tPW CE program pulse width(3) 47.5 52.5 µs
tOE Data valid from OE 150 ns
tPRT
VPP pulse rise time during
programming 50 ns
Codes
Pins
Hex dataA0 O15-O8 O7 O6 O5 O4 O3 O2 O1 O0
Manufacturer 0 0 00011110001E
Device type 1 0 1111010000F4
8
0311J–EPROM–4/11
Atmel AT27C4096
6. Rapid programming algorithm
A 50µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to
13.0V. Each address is first programmed with one 50µs CE pulse without verification. Then a verification/reprogramming
loop is executed for each address. In the event a word fails to pass verification, up to 10 successive 50µs pulses are applied
with a verification after each pulse. If the word fails to verify after 10 pulses have been applied, the part is considered failed.
After the word verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and
VCC to 5.0V. All words are read again and compared with the original data to determine if the device passes or fails.
Figure 6-1. Rapid programming algorithm
9
0311J–EPROM–4/11
Atmel AT27C4096
7. Ordering information
Green Package (Pb/halide-free)
tACC (ns)
ICC (mA)
Atmel ordering code Package Lead finish Operation rangeActive Standby
55 40 0.1 AT27C4096-55JU 44J Matte tin Industrial
(-40C to 85C)
90 40 0.1 AT27C4096-90JU
AT27C4096-90PU
44J
40P6 Matte tin Industrial
(-40C to 85C)
Package type
44J 44-lead, plastic, J-leaded chip carrier (PLCC)
40P6 40-lead, 0.600" wide, plastic, dual inline package (PDIP)
10
0311J–EPROM–4/11
Atmel AT27C4096
8. Packaging information
44J – PLCC
Notes: 1. This package conforms to JEDEC reference MS-018, variation AC
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
3. Lead coplanarity is 0.004" (0.102mm) maximum
A 4.191 – 4.572
A1 2.286 – 3.048
A2 0.508 – –
D 17.399 – 17.653
D1 16.510 – 16.662 Note 2
E 17.399 – 17.653
E1 16.510 – 16.662 Note 2
D2/E2 14.986 – 16.002
B 0.660 – 0.813
B1 0.330 – 0.533
e 1.270 TYP
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL MIN NOM MAX NOTE
1.14(0.045) X 45° PIN NO. 1
IDENTIFIER
1.14(0.045) X 45°
0.51(0.020)MAX
0.318(0.0125)
0.191(0.0075)
A2
45° MAX (3X)
A
A1
B1 D2/E2
B
e
E1 E
D1
D
44J, 44-lead, plastic J-leaded chip carrier (PLCC) B
44J
10/04/01
Package drawing contact:
packagedrawings@atmel.com
TITLE DRAWING NO. REV.
11
0311J–EPROM–4/11
Atmel AT27C4096
40P6 – PDIP
TITLE DRAWING NO. REV.
Package drawing contact:
packagedrawings@atmel.com
40P6, 40-lead (0.600"/15.24mm wide) Plastic dual
inline package (PDIP) B
40P6
09/28/01
PIN
1
E1
A1
B
REF
E
B1
C
L
SEATING PLANE
A
0º ~ 15º
D
e
eB
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL MIN NOM MAX NOTE
A – – 4.826
A1 0.381 – –
D 52.070 – 52.578 Note 2
E 15.240 – 15.875
E1 13.462 – 13.970 Note 2
B 0.356 – 0.559
B1 1.041 – 1.651
L 3.048 – 3.556
C 0.203 – 0.381
eB 15.494 – 17.526
e 2.540 TYP
Notes: 1. This package conforms to JEDEC reference MS-011, variation AC
2. Dimensions D and E1 do not include mold flash or protrusion.
mold flash or protrusion shall not exceed 0.25mm (0.010").
12
0311J–EPROM–4/11
Atmel AT27C4096
9. Revision history
Doc. rev. Date Comments
0311J 04/2011 Remove VSOP package
Add lead finish to ordering information
0311I 12/2007
Atmel Corporation
2325 Orchard Parkway
San Jose, CA 95131
USA
Tel: (+1) (408) 441-0311
Fax: (+1) (408) 487-2600
www.atmel.com
Atmel Asia Limited
Unit 01-5 & 16, 19F
BEA Tower, Millennium City 5
418 Kwun Tong Road
Kwun Tong, Kowloon
HONG KONG
Tel: (+852) 2245-6100
Fax: (+852) 2722-1369
Atmel Munich GmbH
Business Campus
Parkring 4
D-85748 Garching b. Munich
GERMANY
Tel: (+49) 89-31970-0
Fax: (+49) 89-3194621
Atmel Japan
9F, Tonetsu Shinkawa Bldg.
1-24-8 Shinkawa
Chuo-ku, Tokyo 104-0033
JAPAN
Tel: (+81) (3) 3523-3551
Fax: (+81) (3) 3523-7581
© 2011 Atmel Corporation. All rights reserved. / Rev.: 0311J–EPROM–4/11
Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel
products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY
RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE
THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to
make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not
be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.
Atmel®, logo and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trade-
marks of others.
