LTC7820 Fixed Ratio High Power Inductorless (Charge Pump) DC/DC Controller DESCRIPTION FEATURES Low Profile, High Power Density, Capable of 500W+ nn Soft Switching: 99% Peak Efficiency and Low EMI nn V Max for Voltage Divider (2:1): 72V IN nn V Max for Voltage Doubler (1:2)/Inverter (1:1): 36V IN nn Wide Bias V CC Range: 6V to 72V nn Soft Startup into Steady State Operation nn 6.5V to 40V EXTV CC Input for Improved Efficiency nn Input Current Sensing and Overcurrent Protection nn Wide Operating Frequency Range: 100kHz to 1MHz nn Output Short-Circuit/OV/UV Protections with Programmable Timer and Retry nn Thermally Enhanced 28-Pin 4mm x 5mm QFN Package nn APPLICATIONS The LTC(R)7820 is a fixed ratio high voltage high power switched capacitor/charge pump controller. The device includes four N-channel MOSFET gate drivers to drive external power MOSFETs in voltage divider, doubler or inverter configurations. The device achieves a 2:1 stepdown ratio from an input voltage as high as 72V, a 1:2 step-up ratio from an input voltage as high as 36V, or a 1:1 inverting ratio from an input voltage up to 36V. Each power MOSFET is switched with 50% duty cycle at a constant pre-programmed switching frequency. System efficiency can be optimized to over 99%. The LTC7820 provides a small and cost effective solution for high power, non-isolated intermediate bus applications with fault protection. The LTC7820 switching frequency can be linearly programmed from 100kHz to 1MHz. The device is available in a thermally enhanced 28-lead QFN package with some no-connect pins for high voltage compatible pin spacing. Bus Converters nn High Power Distributed Power Systems nn Communications Systems nn Industrial Applications nn All registered trademarks and trademarks are the property of their respective owners. Protected by U.S. patents, including 9484799. TYPICAL APPLICATION Very High Efficiency 5A Voltage Divider 10 VHIGH_SENSE 100 G1 ISENSE- 0.1F LTC7820 0.1F RUN 12V EXTVCC 10k UV 10k HYS_PRGM 10k PGOOD FREQ 10k 40k VIN = 48V VOUT = 24V EFFICIENCY 0.1F 99 1.6 BOOST1 TIMER INTVCC 2.0 100 SW1 G2 10F x6 1F BOOST2 VLOW VLOW_SENSE 10 G3 0.1F 1F 10F VOUT 24V/12V 5A* SW3 G4 INTVCC fs = 100kHz * LOAD CURRENT APPLIED AFTER STARTUP 0.8 97 VIN = 24V VOUT = 12V 96 95 BOOST3 1.2 98 0.4 POWER LOSS 0 1 2 3 LOAD CURRENT (A) 4 POWER LOSS (W) ISENSE+ RSENSE 0.005 VCC EFFICIENCY (%) 0.1F Efficiency and Power Loss vs Load Current VIN 48V/24V 5 0 7820 TA01b INTVCC 4.7F FAULT GND 7820 TA01a 7820fc For more information www.linear.com/LTC7820 1 LTC7820 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 3) ORDER INFORMATION BOOST1 G1 SW1 NC ISENSE+ ISENSE- TOP VIEW 28 27 26 25 24 23 VHIGH_SENSE 1 22 BOOST2 NC 2 21 G2 HYS_PRGM 3 20 VLOW TIMER 4 19 VLOW_SENSE 29 GND FREQ 5 18 BOOST3 RUN 6 17 G3 PGOOD 7 16 SW3 UV 8 15 G4 NC VCC INTVCC EXTVCC NC 9 10 11 12 13 14 FAULT VCC, VHIGH_SENSE........................................ -0.3V to 80V BOOST1...................................................... -0.3V to 86V BOOST2, BOOST3........................................-0.3V to 51V SW1............................................................... -5V to 80V SW3............................................................... -5V to 45V VLOW, VLOW_SENSE...................................... -0.3V to 45V ISENSE+, ISENSE-........................................... -0.3V to 80V (BOOST1 - SW1), (BOOST2 - VLOW)............. -0.3V to 6V (BOOST3 - SW3)........................................... -0.3V to 6V INTVCC, RUN................................................. -0.3V to 6V EXTVCC, PGOOD......................................... -0.3V to 45V HYS_PRGM, FREQ, TIMER, UV............. -0.3V to INTVCC FAULT.......................................................... -0.3V to 80V INTVCC Peak Current (Note 10).............................150mA Operating Junction Temperature Range (Notes 2, 11)................................ -40C to 125C Storage Temperature Range................... -65C to 150C UFD PACKAGE 28-LEAD (4mm x 5mm) PLASTIC QFN TJMAX = 125C, JA = 43C/W , JC(bottom) = 3.4C/W EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB http://www.linear.com/product/LTC7820#orderinfo LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC7820EUFD#PBF LTC7820EUFD#TRPBF 7820 28-Lead (4mm x 5mm) Plastic QFN -40C to 125C LTC7820IUFD#PBF LTC7820IUFD#TRPBF 7820 28-Lead (4mm x 5mm) Plastic QFN -40C to 125C Consult ADI Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 7820fc 2 For more information www.linear.com/LTC7820 LTC7820 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25C (Note 2). VCC = 12V, VRUN = 5V, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input/Output Voltage VCC IC Bias Voltage Range VVHIGH_SENSE VHIGH_SENSE Voltage Range (Note 6) 6 72 V 0 72 V 0 36 V 0 36 V VVLOW_SENSE VLOW_SENSE Voltage Range VVLOW VLOW Voltage Range (Note 5) IQ Input DC Supply Current Shutdown Normal Operation VRUN = 0V VRUN = 5V, No Switching 60 1.5 A mA VUVLO Undervoltage Lockout Threshold VINTVCC Falling VINTVCC Rising 4.85 5.05 V V ISENSE+ = ISENSE- = 24V 220 Pre-Balance Phase, VHIGH_SENSE = 24V, ISENSE+ = ISENSE- = 24V, VVLOW = 12V, VVLOW_SENSE = 11V 93 Overcurrent Protection IISENSE+ ISENSE+ Pin Current 350 A mA IISENSE- ISENSE- Pin Current l -5 1 5 A VISENSE Current Limit Threshold (VISNESE+ - VISENSE-) l 45 50 55 mV Gate Drivers RG2,4 Pull-Up On-Resistance Pull-Down On-Resistance 2.5 1.5 RG1,3 Pull-Up On-Resistance Pull-Down On-Resistance 2.4 1.1 G1/G2 tD G1 Off to G2 On Delay Time G2 Off to G1 On Delay Time (Note 4) 50 50 ns ns G3/G4 tD G3 Off to G4 On Delay Time G4 Off to G3 On Delay Time (Note 4) 60 60 ns ns G1/G3 tD G1 On to G3 On Delay Time G3 Off to G1 Off Delay Time (Note 4) 5 10 ns ns G2/G4 tD G2 On to G4 On Delay Time G4 Off to G2 Off Delay Time (Note 4) 5 10 ns ns VRUN Run Pin On Threshold VRUN Rising VRUN,HYS Run Pin On Hysteresis RUN Pin l 1.1 1.22 1.35 80 V mV INTVCC Regulator VINTVCC_VCC VINTVCC_EXT INTVCC Voltage No Load 6V < VCC < 72V, VEXTVCC = 0V INTVCC Load Regulation ICC = 0 to 60mA, VEXTVCC = 0V INTVCC Voltage No Load with EXTVCC 12V < VEXTVCC < 45V (Note 7) INTVCC Load Regulation with EXTVCC ICC = 0 to 50mA, VEXTVCC = 12V EXTVCC Switchover Voltage VEXTVCC Ramping Positive (Note 9) EXTVCC HYSTERESIS 5.4 5.4 6.35 5.6 5.9 V 0.8 2 % 5.6 5.9 V 0.5 2 % 6.5 6.65 V 400 mV VHIGH_SENSE and VLOW_SENSE RVHIGH_SENSE VHIGH_SENSE to GND Resistance IVLOW_SENSE VLOW_SENSE Pin Current 1 VCC = 51V, VLOW_SENSE = 45V 1 M 10 A 7820fc For more information www.linear.com/LTC7820 3 LTC7820 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25C (Note 2). VCC = 12V, VRUN = 5V, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ISOURCEVLOW Source Current to VLOW Pin from ISENSE+ ISENSE+ = VHIGH_SENSE = 24V, VLOW_SENSE = 11V, VLOW = 12V, Timer = 1V 93 mA ISINKVLOW Sink Current from VLOW Pin to GND ISENSE+ = VHIGH_SENSE = 24V, VLOW_SENSE = 13V, VLOW = 12V, Timer = 1V 50 mA VLOW Oscillator fs Oscillator Frequency Range fNOM Nominal Frequency VFREQ = 1.02V IFREQ FREQ Setting Current VFREQ = 1.02V (Note 3) 100 1000 500 -9.5 kHz kHz -10 -10.5 A 200 400 FAULTB and HYS_PRGM RFAULT FAULT Pull-Down Resistance VFAULT = 0.5V IFAULT_LEAK FAULT Leakage Current VFAULT = 80V 2 A IHYS_PRGM HYS_PRGM Setting Current VHYS_PRGM = 1V (Note 3) l -9.3 -10 -10.7 A VVHIGH_SENSE = 24V, VHYS_PRGM = 0V VVLOW_SENSE Ramp Up VVLOW_SENSE Ramp Down l l 12.2 11.6 12.3 11.7 12.4 11.8 V V VVHIGH_SENSE = 24V, VHYS_PRGM = 5V VVLOW_SENSE Ramp Up VVLOW_SENSE Ramp Down l l 12.7 11.1 12.8 11.2 12.9 11.3 V V VVHIGH_SENSE = 24V, VHYS_PRGM = 2.4V VVLOW_SENSE Ramp Up VVLOW_SENSE Ramp Down l l 14.15 9.5 14.3 9.65 14.45 9.8 V V 0.985 1.01 1.035 V VVLOW_SENSE_FAULT VLOW_SENSE Voltage Trigger Fault UV Comparator and PGOOD VUVTH UV Pin Comparator Threshold UV Pin Voltage Rising VUVHYS Undervoltage Hysteresis RPGOOD PGOOD Pull-Down Resistance VPGOOD = 0.5V IPGOOD_LEAK PGOOD Leakage Current VPGOOD = 45V 120 150 mV 300 1 A Timer ITIMER Timer Pin Current VTIMER < 0.5V or VTIMER > 1.2V (Note 3) 0.5V < VTIMER < 1.2V (Note 3) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC7820 is tested under pulsed load conditions such that TJ TA. The LTC7820E is guaranteed to meet performance specifications from 0C to 85C. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC7820I is guaranteed over the -40C to 125C operating junction temperature range. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD * 43C/W). Note 3: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. 4 -3.5 A -7 A Note 4: Delay times are measured using 50% levels with SW3 = VLOW = 6V, SW1 = 12V. Note 5: The maximum output operating voltage for divider applications is 36V, the maximum input operating voltage for doubler applications is 36V. Note 6: The maximum input operating voltage for divider applications is 72V, the maximum output operating voltage for doubler applications is 72V. Note 7: When VCC > 15V, EXTVCC lower than VCC is recommended to improve efficiency and reduce IC Temperature. Note 8: All the voltage is referred to the GND pin unless otherwise specified. Note 9: EXTVCC is enabled only if VCC is higher than 7V. Note 10: Guaranteed by design. Note 11: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum junction temperature may impair device reliability or permanently damage the device. For more information www.linear.com/LTC7820 7820fc LTC7820 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Load Current 48V to 24V Voltage Divider in Figure 7 Efficiency vs Load Current 24V to 12V Voltage Divider in Figure 7 Efficiency vs Load Current 24V to 48V Voltage Doubler in Figure 8 99.5 99.0 99.0 99.0 98.5 98.5 98.5 98.0 97.5 97.0 fS = 150kHz fS = 200kHz fS = 250kHz fS = 300kHz 95.5 95.0 1 3 5 9 7 11 LOAD CURRENT (A) 13 98.0 97.5 97.0 96.5 fS = 150kHz fS = 200kHz fS = 250kHz fS = 300kHz 96.0 95.5 95.0 15 1 3 5 9 7 11 LOAD CURRENT (A) 7820 G01 24.00 97.0 23.95 96.5 23.90 OUTPUT VOLTAGE (V) 24.05 97.5 96.0 95.5 95.0 fS = 150kHz fS = 200kHz fS = 250kHz fS = 300kHz 93.5 93.0 0 2 4 6 LOAD CURRENT (A) 8 97.0 96.5 10 95.0 0.5 15 2.5 3.5 4.5 5.5 LOAD CURRENT (A) 47.9 23.75 23.70 47.8 47.7 47.6 47.5 47.4 23.65 47.3 23.60 47.2 -1 1 3 5 9 7 11 LOAD CURRENT (A) 13 7.5 fS = 150kHz fS = 200kHz fS = 250kHz fS = 300kHz 48.0 23.80 23.55 6.5 7820 G03 48.1 23.85 15 47.1 0 1 2 3 5 4 6 LOAD CURRENT (A) 7820 G05 Output Voltage vs Load Current 24V to -24V Inverter in Figure 9 7 8 7820 G06 Load Transient 0A-10A-0A 48V to 24V Divider in Figure 7 Steady State Output Ripple in Figure 7 -22.8 fS = 250kHz 150kHz 200mV/DIV AC-COUPLED -23.0 OUTPUT VOLTAGE (V) 1.5 Output Voltage vs Load Current 24V to 48V Voltage Doubler in Figure 8 fS = 150kHz fS = 200kHz fS = 250kHz fS = 300kHz 7820 G04 -23.2 VOUT 200mV/DIV AC-COUPLED 200kHz 200mV/DIV AC-COUPLED -23.4 250kHz 200mV/DIV AC-COUPLED -23.6 -23.8 fS = 150kHz fS = 200kHz fS = 250kHz fS = 300kHz -24.0 -24.2 fS = 150kHz fS = 200kHz fS = 250kHz fS = 300kHz 95.5 Output Voltage vs Load Current 48V to 24V Voltage Divider in Figure 7 98.0 94.0 97.5 7820 G02 Efficiency vs Load Current 24V to -24V Inverter in Figure 9 94.5 13 98.0 96.0 OUTPUT VOLTAGE (V) 96.5 EFFICIENCY (%) 100.0 99.5 EFFICIENCY (%) 100.0 99.5 EFFICIENCY (%) 100.0 96.0 EFFICIENCY (%) TA = 25C, unless otherwise noted. 0 2 4 6 LOAD CURRENT (A) 8 10 ILOAD 5A/DIV VIN = 48V VOUT = 24V ILOAD = 10A 10s/DIV 7820 G08 50s/DIV 7820 G09 7820 G07 7820fc For more information www.linear.com/LTC7820 5 LTC7820 TYPICAL PERFORMANCE CHARACTERISTICS VCC Shutdown Current vs Temperature 4 3 2 1 0 0 10 20 30 40 50 60 VCC VOLTAGE (V) 70 80 85 5.8 80 5.6 75 5.4 70 65 60 55 50 40 -50 50 100 TEMPERATURE (C) 5.2 4.8 TIMER 5V/DIV FAULT 10V/DIV SW3 20V/DIV 125C 25C -45C 125C 25C -45C 4.6 4.2 4.0 150 0 VOUT 20V/DIV VOUT 20V/DIV RUN 5V/DIV RUN 5V/DIV SW3 20V/DIV SW3 20V/DIV Input Current During Short Circuit 48V to 24V Divider 400 600 800 FREQUENCY (kHz) 1200 1000 7820 G12 Shutdown 48V to 24V Voltage Divider, RUN Pin FLOAT VIN 20V/DIV 100ms/DIV 200 INTVCC BOOST3-SW3 BOOST2-VLOW BOOST1-SW1 VIN 20V/DIV 7820 G13 25C 125C 25C -45C 5.0 Start-Up 48V to 24V Voltage Divider, RUN Pin FLOAT VOUT 10V/DIV -45C 7820 G11 7820 G10 Short-Circuit and Retry 24V to 12V Divider 200ms/DIV 0 125C 4.4 VCC = 12V VCC = 48V VCC = 72V 45 7820 G14 100ms/DIV Voltage Divider Line Transient tr = tr = 100s, fS = 500kHz 100 7820 G15 Divider Efficiency vs CFLY in Figure 11 48V to 24V AT 10A LOAD VIN 20V/DIV VIN 5V/DIV VOUT 20V/DIV 99 EFFICIENCY (%) INTVCC VOLTAGE (V) 5 Driver Voltage vs Frequency, in Figure 7 DRIVER VOLTAGE (V) INTVCC Line Regulation VCC CURRENT AT SHUTDOWN (A) 6 TA = 25C, unless otherwise noted. VOUT 5V/DIV IIN 20A/DIV SW3 10V/DIV SW3 50V/DIV 5s/DIV 7820 G16 98 24V to 12V AT 20A LOAD 97 100s/DIV 7820 G17 96 8 10 12 14 QUANTITY OF 10F CFLY IN PARALLEL 16 7820 G18 7820fc 6 For more information www.linear.com/LTC7820 LTC7820 PIN FUNCTIONS UV (Pin 8): Undervoltage Comparator Input. If the UV pin voltage is lower than 0.9V, the PGOOD pin is pulled down while the controller keeps switching. If the UV pin voltage is higher than 1V and no faults exist, PGOOD pin is released. Connect to INTVCC if not used. HYS_PRGM (Pin 3): A resistor connected between this pin and ground will program the two thresholds of the window comparator that monitors the voltage difference between VHIGH_SENSE/2 and VLOW_SENSE. There is a 10A current flowing out of this pin. ISENSE+ (Pin 27): Current Sense Comparator Positive Input. Kelvin connected to the positive node of the current sensing resistor. The current sensing resistor has to be connected to the drain of the very top MOSFET. When the voltage between ISENSE+ pin and ISENSE- pin is higher than 50mV, the controller indicates an overcurrent fault by pulling the FAULT pin down. The ISENSE+ pin is also used to source 93mA current to the VLOW pin during the capacitor's pre-balancing time at power-up in voltage divider applications. Connect directly to the drain of the very top MOSFET if not used. G4 (Pin 15): High Current Gate Drive for the Bottom (Synchronous) N-Channel MOSFET. Voltage swing at this pin is from ground to INTVCC. - ISENSE (Pin 28): Current Sense Comparator Negative Input. Kelvin connected to the negative node of the current sensing resistor. Short to ISENSE+ if not used. RUN (Pin 6): Run Control Input. Forcing RUN below 1.14V shuts down the controller. When RUN is higher than 1.22V, internal circuitry starts up. There is a 1A pull-up current flowing out of RUN pin when the RUN pin voltage is below 1.14V and additional 5A current flowing out of RUN pin when the Run pin voltage is above 1.22V. TIMER (Pin 4): Charge Balance and Fault Timer Control Input. A capacitor between this pin and ground sets the amount of time to charge VLOW to VHIGH_SENSE/2 voltage during power-up. It also sets the short-circuit retry time. See the Application Information section for details. FAULT (Pin 9): Open Drain Output Pin. FAULT is pulled to ground when the VLOW_SENSE voltage is out of its window thresholds or the voltage between ISENSE+ and ISENSE- is higher than 50mV. FAULT pin is also pulled to ground under INTVCC UVLO. PGOOD (Pin 7): Open Drain Output Pin. PGOOD is pulled to ground if there are any faults or if the UV pin indicates an undervoltage condition. G3 (Pin 17): High Current Gate Drive for the Third Upper Most N-Channel MOSFET. This is the output of the floating driver with a voltage swing from BOOST3 to SW3. G2 (Pin 21): High Current Gate Drive for the Second Upper most N-Channel MOSFET. This is the output of the floating driver with a voltage swing from BOOST2 to VLOW. G1 (Pin 24): High Current Gate Drive for the Upper most N-Channel MOSFET. This is the output of the floating driver with a voltage swing from BOOST1 to SW1. SW1/SW3 (Pin 25/Pin 16): Switch Node Connections. BOOST1, BOOST2, BOOST3 (Pins 23, 22, 18): Bootstrapped supplies to the floating drivers. Capacitors are connected between these BOOST pins and their respective SWn and VLOW pins. EXTVCC (Pin 11): External Power Input to EXTVCC LDO. This LDO supplies INTVCC power whenever EXTVCC is higher than 6.5V and VCC is higher than 7V. Do not exceed 40V on this pin. INTVCC (Pin 12): Output of the Internal Linear Low Dropout Regulator. The driver and control circuits are powered from this voltage source. Must be bypassed to power ground with a minimum of 4.7F ceramic or other low ESR capacitor. VCC (Pin 14): Power Supply for Internal Circuitry and INTVCC Linear Regulator. A bypass capacitor should be tied between this pin and the power ground. VHIGH_SENSE (Pin 1): Kelvin Sensing Input. Monitor the voltage of the drain of the top MOSFET. 7820fc For more information www.linear.com/LTC7820 7 LTC7820 PIN FUNCTIONS VLOW (Pin 20): Half Supply from VHIGH_SENSE. Connect a bypass capacitor from this node to PGND. VLOW_SENSE (Pin 19): Kelvin Sensing Input. Monitors the voltage on VLOW. FREQ (Pin 5): Frequency Set Pin. There is a precision 10A current flowing out of this pin. A resistor to ground sets a voltage which in turn programs the frequency. See the Applications Information section for detailed information. GND (Exposed Pad Pin 29): Signal and Power Ground. All small-signal components should connect to this ground, which in turn connects to system power ground at one point. The exposed pad must be soldered to the PCB, providing a local ground for the control components of the IC, which should be tied to system power ground under the IC. For inverter applications, GND should connect to the negative output and all small signal components still referred to GND pin. NC (Pins 2, 10, 13, 26): No Connection. Always keep these pins floating. These pins are intentionally skipped to isolate adjacent high voltage pins. 7820fc 8 For more information www.linear.com/LTC7820 LTC7820 BLOCK DIAGRAM VHIGH 1 VLOW_SENSE VHIGH_SENSE R2 500k - - + + VHYS_PRGM INTVCC R3 500k ISENSE+ 3 ISENSE- OVERCURRENT COMPARATOR 50mV THRESHOLD 10A HYS_PRGM BOOST1 INTVCC G1 5 FREQ 93mA 10A 27 CF 28 SW1 RSENSE 23 24 OSC VCC RF M1 CB1 0.1F DB1 25 50mA 6 RUN 1A ~ 6A BOOST2 INTVCC 4 8 TIMER VLOW + 1.01V 7 ANTISHOOT-THROUGH - UV G2 CONTROL LOGIC 3.5A ~ 7A 21 BOOST3 G3 DB2 SW3 INTVCC 11 EXTVCC VCC LDO 14 G4 VCC EXTVCC > 6.5V AND VCC > 7V 29 CFLY CVLOW 18 17 FAULT EXTVCC LDO VLOW 20 UVLO 9 M2 CB2 1F VLOW_SENSE 19 120mV HYSTERESIS PGOOD 22 M3 CB3 1F DB3 16 12 15 GND M4 CINTVCC 4.7F 7820 BD 7820fc For more information www.linear.com/LTC7820 9 LTC7820 OPERATION Main Control INTVCC/EXTVCC Power The LTC7820 is a constant frequency, open loop switched capacitor/charge pump controller for high power and high voltage applications. Please refer to the Block Diagram for the following discussion on its operation. In steady state operation, the N-channel MOSFETs M1 and M3 are turned on and off in the same phase with around 50% duty cycle at a pre-programmed switching frequency. The N-channel MOSFETs M2 and M4 are turned on and off complementarily to MOSFETs M1 and M3. The gate drive waveforms are shown in Figure 1. Power for the quad N-channel MOSFET drivers and most other internal circuitry is derived from the INTVCC pin. Normally an internal 5.5V linear regulator supplies INTVCC power from VCC. If VCC is connected to a high input voltage, an optional external voltage source on the EXTVCC pin enables a second 5.5V linear regulator and supplies INTVCC power from the EXTVCC pin. To enable this more efficient second regulator, VCC needs to be higher than 7V and the EXTVCC pin voltage has to be higher than 6.5V. Do not exceed 40V on the EXTVCC pin. Each top MOSFET driver is biased from the floating bootstrap capacitors CB, which are normally recharged during each off cycle through an external Schottky diode when the respective top MOSFET turns off. VGS ~ 50% DUTY CYCLE M1 Start-Up and Shutdown TS M2 M3 M4 PHASE 1 PHASE 2 PHASE 1 PHASE 2 7820 F01 Figure 1. Gate Drive Waveforms During phase 1, M1 and M3 are on and the flying capacitor CFLY is in series with CVLOW. During phase 2, M2 and M4 are on and CFLY is in parallel with CVLOW. The VLOW pin voltage is always close to half of the top voltage at the drain of MOSFET M1 (refer to GND pin) in steady state, and it is not sensitive to variable loads due to the very low impedance at its output. The LTC7820 does not regulate the output voltage with a closed-loop feedback system. However, it stops switching when fault conditions occur, such as VLOW pin voltage overvoltage or undervoltage, an overcurrent event or an overtemperature protection event. The LTC7820 is in shutdown mode when the RUN pin is lower than 1.14V. In this mode, most internal circuitry is turned off including the INTVCC regulator and the LTC7820 consumes less than 100A current. All gates G1/G2/G3/ G4 are actively pulled low to turn off the external power MOSFETs in shutdown. Releasing RUN allows an internal 1A current to pull up this pin and enable the controller. Once the run pin rises above 1.22V, an additional 5A flows out of this pin. Alternately, the RUN pin may be externally pulled up or driven directly by logic. Do not exceed the Absolute Maximum Rating of 6V on this pin. After the Run pin is released and the INTVCC voltage passes UVLO, the LTC7820 starts up and monitors the VHIGH_SENSE and VLOW_SENSE voltages continuously. The LTC7820 starts switching only if VLOW_SENSE voltage is close to half of VHIGH_SENSE voltage or both VLOW_SENSE and VHIGH_SENSE voltages are close to GND. In voltage divider applications, VLOW is pre-balanced to half the VHIGH_SENSE voltage and the LTC7820 may start up with capacitors at different initial conditions. Fault Protection and Thermal Shutdown The LTC7820 monitors system voltage, current and temperature for faults. It stops switching and pulls down the FAULT pin when fault conditions occur. To clear voltage faults, the VLOW_SENSE pin voltage has to be within the 7820fc 10 For more information www.linear.com/LTC7820 LTC7820 OPERATION The FAULT pin may be pulled up by external resistors to voltages up to 80V. It can be used to control an external disconnect FET to isolate the input and output during fault conditions. High Side Current Sensing For over current protection, the LTC7820 uses a sense resistor RSENSE to monitor the current. The sensing resistor has to be placed at the drain of the very top MOSFET M1. For voltage divider and inverter applications, the current flows into the drain of the MOSFET M1, so the ISENSE+ pin should be connected to the sensing resistor then to the drain of the MOSFET M1. For voltage doubler applications, the current flows out of the drain of the MOSFET M1, so the ISENSE+ pin should be connected directly to the drain of the MOSFET M1. See Typical Applications section for examples. In most applications, the current through the sense resistor is a pulse current and the peak value is much higher than the average load current. A RC filter on the ISENSE- pin, with a time constant lower than the switching frequency, may be used to set the precision average current protection. If overcurrent protection is not desired, short the ISENSE+ and ISENSE- pins together and connect them to the drain of the top MOSFET M1 directly. Frequency Selection The selection of switching frequency is a trade-off between efficiency and component size. Low frequency operation increases efficiency by reducing MOSFET switching losses, but requires larger capacitance to maintain low output ripple voltage and low output impedance. The FREQ pin can be used to program the controller's operating frequency from 100kHz to 1MHz. There is a precision 10A current flowing out of the FREQ pin, so the user can program the controller's switching frequency with a single resistor to GND. The voltage on the FREQ pin is equal to the resistance multiplied by 10A current (e.g. the voltage is 1V with a 100k resistor from the FREQ pin to GND). In the linear region, the switching frequency, fS , can be estimated based on the equation: fS (kHz) = RFREQ (k) * 8 - 317kHz Figure 2 also shows the relationship between the voltage on the FREQ pin and switching frequency. 1400 SWITCHING FREQUENCY (kHz) programmed window around half of VHIGH_SENSE voltage or the VHIGH_SENSE and VLOW_SENSE voltages must be lower than 1V and 0.5V respectively. To clear the current fault, the voltage drop from ISENSE+ pin to ISENSE- pin has to be lower than 50mV. To clear temperature faults, the IC temperature has to be lower than 165C. 1200 1000 800 600 400 200 0 0 0.5 1.5 1 2 FREQ PIN VOLTAGE (V) 2.5 7820 F02 Figure 2. Relationship Between Switching Frequency and Voltage at the FREQ Pin Power Good and UV (PGOOD and UV pins) When the UV pin voltage is lower than 1V, the PGOOD pin is pulled low. The PGOOD pin is also pulled low when the RUN pin is low or when the LTC7820 is starting up. The PGOOD pin is released only when the LTC7820 is switching and UV pin is higher than 1V. The PGOOD pin will flag power bad immediately when the UV pin is low. However, there is an internal 20s power good mask and 120mV hysteresis when UV goes higher than 1V. The PGOOD pin may be pulled up by external resistors to sources up to 45V. PGOOD signal can be used to enable or disable the output loads. If the loads are switching mode converters or LDOs with ENABLE/RUN pins, this allows easy for interfacing. With proper setup on the UV pin, PGOOD can enable the loads at the output when the output voltage is above a certain value. PGOOD can also be used to control the RUN pin of another LTC7820 if two or more parts are cascaded to achieve higher step-down ratios. 7820fc For more information www.linear.com/LTC7820 11 LTC7820 APPLICATIONS INFORMATION The Typical Application on the first page of this data sheet is a LTC7820 voltage divider circuit. For voltage divider applications, the input voltage is at the drain of very top MOSFET M1 and the output voltage is at the VLOW pin, which is connected to the source of MOSFET M2 and the drain of MOSFET M3. The output voltage is around half of the input voltage in steady state. Alternately, by swapping the input and output voltages, the voltage divider circuit can be transformed into a voltage doubler circuit. For voltage doubler applications, the input voltage is at the VLOW pin while output voltage is available at the drain of the top MOSFET M1 and equals two times the input voltage as shown in Figure 8. Similarly, for inverter applications, the input voltage is applied between the drain of the top MOSFET M1 and VLOW, and the output voltage equals the negative input voltage at the GND pin with respect to the VLOW pin as shown in Figure 9. For divider applications, if the load current is applied before startup or heavy resistive loads are connected to the VLOW pin, the LTC7820 may not start up due to the limited drive ability of the pre-balance circuit. A disconnect FET may be used at the output for soft-start up. For doubler and inverter applications, a disconnect FET may also be required for soft start-up and shutdown. The disconnect FETs in divider/ doubler/inverter applications may be also controlled by hot swap controllers to achieve more programmable slew rates and fault protections. Voltage Divider Pre-Balance before Switching In voltage divider applications, the VLOW_SENSE voltage should be always close to VHIGH_SENSE/2 in steady state. The voltages across the flying capacitors and VLOW capacitors are close to each other and close to half of the input voltage. The charging inrush current is minimized during each switching cycle because the voltage difference between capacitors is small. However, without special methods such as the LTC7820 pre-charging circuitry, during start-up or fault conditions such as VLOW short to GND, the difference between capacitors can be large and charging currents may be great enough to cause permanent MOSFET damage. When the power MOSFETs are on, ideally, the inrush charge current, I= VIN - VCFLY - VLOW RON _ M1 +RON _ M3 when switches M1 and M3 are on and: I= VCFLY - VLOW RON _ M2 +RON _ M4 when switches M2 and M4 are on. Both currents are limited by the power MOSFET saturation current. With very low RDS(ON) of the external power MOSFETs, the inrush charge current could easily achieve several hundreds of Amperes which can be higher than the MOSFET's Safe Operating Area (SOA). The LTC7820 provides a proprietary pre-balance method to minimize the inrush charging current in voltage divider applications. The LTC7820 controller detects the VLOW_SENSE pin voltage before switching and compares it with the VHIGH_SENSE/2 internally. If the VLOW_SENSE pin voltage is much lower than the VHIGH_SENSE/2, a current source will source 93mA current to the VLOW pin to pull the VLOW pin up. If the VLOW_SENSE pin voltage is much higher than the VHIGH_SENSE/2, another current source will sink 50mA from VLOW pin to pull the VLOW pin down. If the VLOW_SENSE pin voltage is close to VHIGH_SENSE/2 and within the pre-programmed window, both current sources are disabled and LTC7820 starts switching. If the VLOW_SENSE voltage is still within the window after 36 switching cycles, the FAULT pin is released. For voltage divider with pre-balance startup, the LTC7820 assumes no load current or a very small load current (less than 50mA) at the VLOW (output) otherwise the VLOW voltage cannot reach VHIGH_SENSE/2 and the LTC7820 never starts up. This no load condition can be achieved by connecting the FAULT pin to the enable pins of the following electrical loads such as switching regulators and LDOs. If load current cannot be controlled off such as resistive loads, a disconnect FET is required to disconnect the load during startup as shown in the typical applications. 7820fc 12 For more information www.linear.com/LTC7820 LTC7820 APPLICATIONS INFORMATION If the LTC7820 divider input voltage is controlled by a front end supply or hot swap controller and ramps up slowly, the LTC7820 capacitor voltages are naturally balanced. In this case the pre-balance and no load start-up requirements are not necessary. Voltage Doubler and Inverter Startup and Disconnect In voltage doubler and inverter applications, LTC7820 can startup without capacitor inrush charging current if the input voltage is ramping slowly up from zero. As long as the input voltage ramps up slow (in milliseconds), the output voltage can track the input voltage and the voltage difference between capacitors are always small resulting in no huge inrush currents. The slew rate control of the input voltage can be achieved by using a disconnect FET at input or using hot swap controllers as shown in the typical application section. Different from voltage dividers, the voltage doubler and inverter applications have to start up from zero input voltage every time, but they can start up with heavy load currents directly. Note that voltage divider applications can also startup with a slow ramping input voltage from zero to the steady state operation if there is a hot swap in front of the LTC7820, (pre-balance is not required). Overcurrent Protection The LTC7820 provides overcurrent protection through a sensing resistor placed on the high voltage side. A precision rail to rail comparator monitors the differential voltage between the ISENSE+ pin and the ISENSE- pin which are Kelvin connected to a sensing resistor. Whenever the ISENSE+ pin voltage is 50mV higher than the ISENSE- pin voltage, an over current fault is triggered and the FAULT pin is pulled down to ground. At the same time the LTC7820 stops switching and starts retry mode based on the timer pin setup. The overcurrent fault will be cleared when the timer pin voltage reaches 4V and the voltage across the sensing resistor is less than 50mV. The current through the sensing resistor is a pulse current during charging/ discharging of the flying capacitors, which may result a voltage higher than the 50mV threshold at heavy loads. To prevent the inrush current from falsely triggering the overcurrent protection, an RC filter is required at the ISENSE+ pin and ISENSE-. The RC filter timer constant has to be larger than a switching period. Typically a 100 and 0.1F filter is good for most of applications. Due to the current flowing into the ISENSE+ pin, the resistor of the RC filter has to be placed at the ISENSE- pin. ISENSE+ pin needs to be connected to the sensing resistor directly. The current limit can be selected by choosing different sense resistor values. For example, the 10m sense resistor sets current limit at 50mV/10m = 5A ideally. Due to the switching ripple, the actual current limit is always lower than the ideal case. In real circuits, the current limit is around 4.2A with 0.1F/100 filter and 200kHz switching frequency. The LTspice(R) simulation tool can be used to quantify the switching ripple. The overcurrent protection can also be used in doubler and inverter applications for overcurrent and short-circuit conditions at both startup and steady state operation. If over current protection is not used, short the ISENSE+ pin and the ISENSE- pin together and connect them to the drain of the top MOSFET M1. Window Comparator Programming In normal operation, VLOW_SENSE voltage should be always close to half of the VHIGH_SENSE voltage. A floating window comparator monitors the voltage on the VLOW_SENSE pin and compares it with VHIGH_SENSE/2. The hysteresis window voltage can be programmed and is equal to the voltage at the HYS_PRGM pin. There is a precision 10A current flowing out of HYS_PRGM pin. A single resistor from HYS_PRGM pin to GND sets the HYS_PRGM pin voltage, which equals the resistor value multiplied by 10A current (e.g. the voltage is 1V with a 100k resistor from the HYS_PRGM pin to GND). With a 100k resistor on the HYS_PRGM pin, the VHIGH_SENSE/2 voltage has to be within a (VLOW_SENSE 1V) window during startup and normal operation, otherwise a fault is triggered and the LTC7820 stops switching. 7820fc For more information www.linear.com/LTC7820 13 LTC7820 APPLICATIONS INFORMATION The hysteresis window voltage can be linearly programmed from 0.3V to 2.4V as shown in Figure 3 with different resistor values on the HYS_PRGM pin. If the HYS_PRGM pin is tied to INTVCC, a default 0.8V hysteresis window is applied internally. The hysteresis window voltage has to be programmed large enough to tolerate the VLOW pin voltage ripple and voltage drop at maximum load conditions. ROUT VIN G1 SW1 G2 VLOW_SENSE WINDOW VOLTAGE (V) VLOW CFLY VIN/2 CVLOW G3 2.5 CVLOW SW3 2 G4 1.5 7820 F04 Figure 4. Thevenin Equivalent Circuit of Voltage Divider 1 Effective Open Loop Output Resistance and Load Regulation 0.5 0 VLOW 0 1 3 2 VHYS_PRGM (V) 4 5 7820 F03 Figure 3. Relationship Between HYS_PRGM Pin Voltage and VLOW_SENSE Window Comparator Voltage During an input line transient, as long as the change of the input voltage in each switching cycle is less than the window hysteresis voltage, LTC7820 keeps switching and the output voltage tracks the input voltage cycle by cycle. If the input voltage step is large enough to force VLOW_SENSE out of the window within one switching period, a fault is triggered. The LTC7820 stops switching and starts its retry sequence based on the TIMER pin setup. To make the window comparator work precisely, VHIGH_SENSE and VLOW_SENSE pins are provided for Kelvin connection to the capacitor at the drain of the top MOSFET M1 and the capacitors from VLOW to GND respectively. Small RC filters may be used on these two pins to reject noise higher than the switching frequency. The LTC7820 does not regulate the output voltage through a closed loop feedback system. However, the output voltage is not sensitive to load conditions due to the low output resistance when it is operating with large flying capacitors and high switching frequency. The Thevenin equivalent circuit of voltage divider circuit is shown in the Figure 4. When duty cycle is around 50%, - ROUT = 1 4fS RDS(ON) C FLY 1+ e 1 - 4fS RDS(ON)C FLY 4fSC FLY 1- e where: fS is the switching frequency CFLY is the flying capacitor RDS(ON) is the on resistance of one MOSFET (G1 to G4) 7820fc 14 For more information www.linear.com/LTC7820 LTC7820 APPLICATIONS INFORMATION At low switching frequencies, ROUT = 1/(4fSCFLY). As frequency increases, ROUT finally approaches 2RDS(ON). In high power applications, it is suggested to select the switching frequency around 1/(16CFLYRDS(ON)) or higher for decent load regulation and efficiency. At heavy load conditions, the output voltage will drop from VIN/2 by ROUT * ILOAD. In many applications, multi-layer ceramic capacitors (MLCC) are selected as flying capacitors. The voltage coefficients of MLCC capacitors strongly depend on the type and size of capacitors. Normally larger size X7R MLCC capacitors are better than X5R in terms of voltage coefficient. The capacitance still drops 20% to 30% with high DC bias voltage. Capacitance derating needs to be considered when estimating the output resistance of these switched capacitor circuits. INTVCC Regulators and EXTVCC The LTC7820 features an internal PMOS LDO that supplies power to INTVCC from the VCC supply. INTVCC powers the gate drivers and most of the LTC7820's internal circuitry. The linear regulator regulates the voltage at the INTVCC pin to 5.5V when VCC is greater than 6V. EXTVCC connects to INTVCC through another PMOS LDO and can supply the needed power when its voltage is higher than 6.5V and VCC is higher than 7V. Each of these can supply a peak current of 150mA and must be bypassed to ground with a minimum of 4.7F ceramic capacitor or low ESR electrolytic capacitor. No matter what type of bulk capacitor is used, an additional 0.1F ceramic capacitor placed directly adjacent to the INTVCC and GND pins is highly recommended. Good bypassing is needed to supply the high transient currents required by the MOSFET gate drivers. High input voltage applications in which large MOSFETs are being driven at high frequencies may cause the maximum junction temperature rating for the LTC7820 to be exceeded. The INTVCC current, which is dominated by the gate charge current, may be supplied by either the 5.5V linear regulator from VCC or the linear regulator from EXTVCC. When the voltage on the EXTVCC pin is less than 6.5V, the linear regulator from VCC is enabled. Power dissipation for the IC in this case is highest and is equal to VCC * IINTVCC. The gate charge current is dependent on operating frequency. The junction temperature can be estimated by using the equations given in Note 2 of the Electrical Characteristics. For example, the LTC7820 INTVCC current is limited to less than 27mA from a 48V supply in the UFD package and not using the EXTVCC supply: TJ = 70C + (27mA)(48V)(43C/W) = 125C Where ambient temperature is 70C and thermal resistance from junction to ambient is 43C/W To prevent the maximum junction temperature from being exceeded, the input supply current must be checked while operating at maximum VIN. When the voltage applied to EXTVCC rises above 6.5V and VCC above 7V, the INTVCC linear regulator is turned off and the EXTVCC linear regulator is turned on. Using the EXTVCC allows the MOSFET driver and control power to be derived from other high efficiency sources such as the VLOW pin of a 48V to 24V voltage divider or other voltage rails in the system. Using EXTVCC can significantly reduce the IC temperature in high VIN applications. Tying EXTVCC to the output (24V) reduces the junction temperature in the previous example to: TJ = 70C + (27mA) (24V) (43C/W) = 98C Do not apply more than 40V to the EXTVCC pin. Topside MOSFET Driver Supply (CB, DB) External bootstrap capacitors CB1/CB2/CB3 in the Block Diagram, connected to the BOOST pins, supply the gate drive voltages for the top side MOSFETs M1/M2/M3. Capacitor CB3 in the Block Diagram is charged though external Schottky diode DB3 from INTVCC when the SW3 pin is low. Capacitor CB2 is charged through DB2 from BOOST3 when the SW3 pin is high. Capacitor CB1 is charged through DB1 from BOOST2 when the SW1 pin is low. When the MOSFETs M1/M2/M3 are to be turned on, the driver places the CB1/CB2/CB3 voltage across the gate source of the MOSFETs M1/M2/M3. This enhances the MOSFETs and turns them on. The switch node voltage, SW1/SW3, rises to ISENSE+/VLOW and the BOOST pin follows. With continuous switching, the gate driver voltages on CB1/CB2/CB3 are: VCB3 = VINTVCC - VDB3 VCB2 = VINTVCC - VDB3 - VDB2 VCB1 = VINTVCC - VDB3 - VDB2 - VDB1 7820fc For more information www.linear.com/LTC7820 15 LTC7820 APPLICATIONS INFORMATION 3.5A CHARGE TIMER PIN 3.5A CHARGE TIMER PIN 4V 7A CHARGE TIMER PIN 1.2V 0.5V FAULT LOW PRE-BALANCE TIME FAULT RELEASE 7820 F05 Figure 5. Timer Behavior During Fault or Startup The value of the boost capacitors, CB1/CB2/CB3, needs to be 100 times that of the total input capacitance of the topside MOSFET(s). The standard 6.3V MLCC ceramic capacitors are good for CB1/CB2/CB3. The reverse breakdown of the external Schottky diodes must be greater than the maximum operation voltage between the VLOW and GND pins. When adjusting the gate drive level, the final arbiter is the threshold voltage of the top MOSFET M1. The Top driver voltage VCB1 has to be higher than the top FET M1 threshold voltage in all conditions. Logic level MOSFET should be used, otherwise lower operating switching frequency and lower forward voltage drop diodes are necessary to raise the gate driver voltages. Undervoltage Lockout The LTC7820 has a precision UVLO comparator constantly monitoring the INTVCC voltage to ensure that an adequate gate-drive voltage is present. It locks out the switching action when INTVCC is below 4.9V. To prevent oscillation when there is a disturbance on INTVCC, the UVLO comparator has 200mV of precision hysteresis. Another way to detect an undervoltage condition is to monitor the input supply. Because the RUN pin has a precision turn-on reference of 1.22V, one can use a resistor divider to the input to turn on the IC when the input voltage is high enough. An extra 5A of current flows out of the RUN pin once the RUN pin voltage passes 1.22V. One can program the hysteresis of the RUN comparator by adjusting the values of the resistive divider. Fault Response and Timer Programming The LTC7820 stops switching and pulls the FAULT pin low during fault conditions. A capacitor connected from the TIMER pin to GND sets the retry time to start-up if fault conditions are removed. A typical waveform on the TIMER pin during a fault condition is shown in Figure 5. After the FAULT pin is pulled low, a 3.5A pull-up current flows out of TIMER pin and starts to charge the Timer capacitor. The pull-up current increases to 7A when the TIMER pin voltage is higher than 0.5V and back to 3.5A when the TIMER pin voltage is higher than 1.2V. The TIMER pin will be strongly pulled down whenever the fault conditions are removed or the TIMER pin voltage is higher than 4V. When the TIMER pin voltage is between 0.5V and 1.2V, the internal pre-balance circuit will source or sink current to the VLOW pin and regulate the VLOW pin to VHIGH_SENSE/2 with around 93mA/50mA capability. The pre-balance time can be calculated based on the capacitor CTIMER on the TIMER pin: TPRE-BALANCE = CTIMER * 0.7V/7A So the pre-balance time is 100ms/F (e.g. the pre-balance time is 10ms with 0.1F CTIMER). For voltage divider applications, the output capacitors and the flying capacitors are pre-balanced to half of the input voltage during the startup. Assuming zero initial conditions, the time to charge the capacitors, tCHARGE, can be estimated from the equation: tCHARGE = (COUT + CFLY) * VIN /2/93mA 7820fc 16 For more information www.linear.com/LTC7820 LTC7820 APPLICATIONS INFORMATION Select the CTIMER such that the tCHARGE < tPRE-BALANCE. If the flying capacitor CFLY and the output capacitor are very large and input voltage is high, it may take several pre-balance time periods to pre-balance the VLOW pin to VHIGH_SENSE/2 with a fixed CTIMER. A longer start-up time is expected. If there is a resistive load on the output, the load current needs to be smaller than 93mA and still meet tCHARGE = (COUT + CFLY) * VIN/2/(93mA - ILOAD) < tPREBALANCE. Otherwise a disconnect FET may be required to disconnect the load during startup. Input/Output Capacitor and Flying Capacitor Selection In high power switched capacitor applications, large AC currents flow through the flying capacitors and input/ output capacitors. Low ESR ceramic capacitors are highly recommended for high power switch capacitor applications. Make sure the maximum RMS capacitor current is within the spec; or higher RMS current rated capacitors are preferred. Note that capacitor manufacturers' ripple current ratings are often based on only 2000 hours of life. This makes it advisable to further derate the capacitor, or to choose capacitors rated at a higher temperature than required. Several capacitors may be paralleled to meet size or height requirements in the design. The RMS current on the flying capacitors depends on their capacitance and the switching frequency. Higher capacitance and higher switching frequency results in lower RMS current. For a good trade-off between efficiency and power density, the RMS current on the flying capacitors should be lower than 140% of the maximum load current. If there are N identical flying capacitors in parallel, the maximum RMS current through each capacitor is: IRMS_CFLY = IOUT(MAX) * 140%/N The input capacitor RMS current is approximately half of the load current. The input capacitor has to be selected to accommodate the maximum load conditions. LTspice simulation tool can be used to quantify the RMS current. Power MOSFETs and Schottky Diodes Selection Four external N-channel MOSFETs must be selected for each LTC7820 controller. Four internal gate drivers are designed to drive the MOSFETs. The driver voltages are decided by the INTVCC voltage, schottky diodes forward voltage drop and switching frequency. The lowest driver voltage is the top MOSFET M1 drive voltage running at high switching frequency and cold temperature. It is normally around 4.2V. Consequently, logic-level threshold MOSFETs must be used in most applications. Be aware that the threshold voltage of some logic-level MOSFET varies with temperature. If switching frequency is high and temperature range is wide for specific applications, the top driver voltage of MOSFET M1 may be as low as 4V, and sub-logic level threshold MOSFETs (VGS(TH) < 3V) should be used. Selection criteria for the power MOSFETs also include the on-resistance RDS(ON), output capacitance COSS, input voltage, and maximum output current. Generally, low RDS(ON) and low COSS MOSFETs are preferred in switched capacitor applications since they will minimize both conduction loss and switching loss. For a given input and output voltage, the uppermost MOSFET M1 always sees high voltage during start-up and shutdown. The Drain to Source voltage of M1 has to be high enough to survive at full input voltage range. Other MOSFETs normally only see half of the input voltage, so the breakdown voltage of M2/M3/M4 can be lower than M1 to optimize RDS(ON) and COSS. If the reliability of M1 is a major concern, the same high voltage MOSFETs could also be used as M2/ M3/M4 to protect against M1 short conditions. External schottky diodes are needed for the bootstrap circuits, and provide voltage for the floating drivers. To minimize the voltage drop on the top gate driver, low forward voltage drop schottky diodes are preferred with load current in the range of 10mA to 50mA. The reverse breakdown voltage of the diodes should be high enough to survive at the maximum operation voltage between the VLOW and GND pins. 7820fc For more information www.linear.com/LTC7820 17 LTC7820 APPLICATIONS INFORMATION PC Board Layout Checklist PC Board Layout Debugging When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the IC. Start with one controller at a time. Monitor the switching nodes (SW1/SW3 pin) and probe the VLOW voltage as well. Check for proper performance over the operating voltage and current range expected in the application. The frequency of operation should be maintained over the full input voltage range down to dropout. 1. Are the top 2 N-channel MOSFETs M1 and M2 located within 1cm of each other? Are the bottom 2 N-channel MOSFETs M3 and M4 located within 1cm of each other? 2. Is the exposed GND pad solid connected to the source of bottom MOSFET M4 and the negative terminal of CVLOW capacitors? In divider and doubler applications, a solid ground plane is preferred for noise and thermal improvement. 3. Are the ISENSE+ and ISENSE- leads routed together with minimum PC trace spacing? The filter capacitor between ISENSE+ and ISENSE- should be as close as possible to the IC. Ensure accurate current sensing with Kelvin connections at the sense resistor. 4. Is the INTVCC bypassing capacitor connected close to the IC, between the INTVCC and the ground plane? This capacitor carries the MOSFET drivers current peaks. An additional 1F ceramic capacitor placed immediately next to the INTVCC and GND can substantially improve noise performance. 5. Keep the switching nodes (SW1, SW3), top gate nodes (G1, G2, G3), and boost nodes (BOOST1, BOOST3) away from sensitive small-signal nodes. All of these nodes have very large and fast moving signals and therefore should be kept on the output side of the LTC7820 and occupy minimum PC trace area. The duty cycle percentage should be maintained from cycle to cycle in a well-designed, low noise PCB implementation. Reduce VIN from its nominal level to verify operation of the regulator in dropout. Check the operation of the undervoltage lockout circuit by further lowering VIN while monitoring the outputs to verify operation. Investigate whether any problems exist only at higher output currents or only at higher input voltages. If problems coincide with high input voltages and low output currents, look for capacitive coupling between the BOOST, SW, G1/2/3/4 connections and the sensitive voltage and current pins. The capacitor placed across the current sensing pins needs to be placed immediately adjacent to the pins of the IC. This capacitor helps to minimize the effects of differential noise injection due to high frequency capacitive coupling. If problems are encountered with high current output loading at lower input voltages, look for inductive coupling between CIN, Schottky and the top MOSFET components to the sensitive current and voltage sensing traces. In addition, investigate common ground path voltage pickup between these components and the GND pin of the IC. 6. Use a modified star ground technique: a low impedance, large copper area central grounding point on the same side of the PC board as the input and output capacitors with tie-ins for the bottom of the INTVCC bypass capacitor. Figure 6 illustrates the high current paths requiring thick and wide copper trace connection. Refer to demo boards on www.linear.com/demo for PCB layout examples. 7820fc 18 For more information www.linear.com/LTC7820 LTC7820 APPLICATIONS INFORMATION VIN RSENSE VCC VHIGH_SENSE M1 G1 ISENSE- ISENSE+ COPT1 COPT CIN BOOST1 LTC7820 TIMER RUN EXTV CC INTVCC DB1 SW1 M2 G2 CFLY2 BOOST2 CFLY1 CFLY DB2 VOUT VLOW VLOW_SENSE M3 G3 UV HYS_PRGM PGOOD COPT2 PGOOD FREQ BOOST3 DB3 CVLOW2 SW3 G4 INTVCC INTVCC CVLOW1 CVLOW M4 GND FAULT FAULT 7820 F06 Figure 6. High Current Path in Printed Circuit Board Layout Diagram 7820fc For more information www.linear.com/LTC7820 19 LTC7820 APPLICATIONS INFORMATION Design Example As a design example using LTC7820 for a high voltage high power voltage divider, assume VIN = 48V (nominal), VIN = 55V (maximum), VOUT = 24V (nominal), IOUT = 15A (maximum). For high power and high voltage applications, always start with a low switching frequency e.g. 200kHz to minimize the switching losses. To set the 200kHz switching frequency, a 60.4k/1% resistor is connected from Freq pin to ground. Setting the CFLY voltage ripple to be 2% of the output voltage is a good starting point with trade-off between efficiency and power density. The CFLY can be calculated based on the equation below: CFLY = IOUT(MAX) 2fS VCFLY(RIPPLE) = 15A 2 * 200kHz * 0.48V = 78.125F Considering the ceramic capacitance derating at 24V DC bias voltage, 16 of 10F/X7R/50V ceramic capacitors are paralleled as flying capacitors. The worst case RMS current may be 40% higher than the maximum output current. So the worst case RMS on each capacitor can be estimated by this equation: IRMS(MAX) = IOUT(MAX) * 140% N = 15A * 140% = 1.3125A 16 The output capacitor selection is similar to the flying capacitor selection. More output capacitors resulting smaller output voltage ripple. Because of the lower RMS current, the output capacitor value can be much less than the flying capacitor. Some of the capacitors may be connected between input and output to serve as input/output capacitors at the same time, as shown in Figure 6. However the voltage rating of those capacitors has to be selected based on the input voltage instead of the output voltage. For MOSFET selection, the top MOSFET M1 drain to source voltage has to be higher than the maximum input voltage, while the other three MOSFETs drain to source voltage only needs to be higher than half of the maximum input voltage. Since logic level FETs are preferred, an Infineon BSC100N06LS is chosen as the top MOSFET M1 and BSC032N04LS are used as M2/3/4. Based on the output resistance equation in the application section, the output resistance is around 20m, which will result 300mV drop at the 24V output at 15A load current. In reality, due to the finite dead time and parasitic resistance on the PCB, the voltage drop may be higher than the calculated value. Taking into account the output voltage ripple, a window comparator with 1V programmed hysteresis is used to monitor the output voltage and compares it with the half of the input voltage during operation. To set the 1V hysteresis, a 100k/1% resistor is connected from HYS_PRGM pin to ground. where N is the number of flying capacitors. Double check and make sure the RMS current on each capacitor is below the ripple current ratings and temperature rise is below the limits. 7820fc 20 For more information www.linear.com/LTC7820 LTC7820 TYPICAL APPLICATIONS 10 0.1F VHIGH_SENSE VIN 48V/24V VCC G1 ISENSE- ISENSE+ TIMER BOOST1 LTC7820 0.1F RUN 12V EXTVCC SW1 G2 BOOST2 2.2F VLOW M1 BSC100N06LS CB1 0.1F 10k 10k PGOOD G3 UV PGOOD HYS_PRGM 100k FREQ BOOST3 SW3 M2 BSC032N04LS CB2 1F 60.4k FAULT CFLY 10F x16 DB2 CMDSH-4 10 M3 BSC032N04LS CB3 1F 0.1F VOUT 24V/12V CVLOW 15A* 10F x6 DB3 CMDSH-4 G4 INTVCC CTOP 10F x4 DB1 CMDSH-4 VLOW_SENSE INTVCC 10k 0.1F INTVCC M4 BSC032N04LS 4.7F GND FAULT *LOAD CURRENT APPLIED AFTER START-UP 7820 F07 Figure 7. High Efficiency 48V/24V to 24V/12V, 15A Voltage Divider 7820fc For more information www.linear.com/LTC7820 21 LTC7820 TYPICAL APPLICATIONS 10 RSENSE 0.005 0.1F VHIGH_SENSE 100 G1 0.1F BOOST1 0.1F 0.47F LTC7820 RUN 12V EXTVCC INTVCC 10k SW1 G2 BOOST2 VLOW BOOST2 PGOOD HYS_PRGM 100k FREQ BOOST3 SW3 G4 INTVCC M2 BSC032N04LS DB2 CMDSH-4 CFLY 10F 50V x16 10 G3 UV 1F M3 BSC032N04LS 0.1F 10F x4 MDISCONNECT SUD50N04-8M8P D3 CMHZ5236B VIN 100F 24V 35V 28m R20 10k DB3 CMDSH-4 INTVCC + 10F 50V x6 0.22F M4 BSC032N04LS 4.7F 68k GND FAULT 1F VLOW_SENSE 10k M1 BSC100N06LS DB1 CMDSH-4 ISENSE+ TIMER 10F x6 VOUT 48V 33F 7.5A 80V 36m 0.1F VCC ISENSE- + FAULT BOOST2 R19 10k 7820 F08 Figure 8. High Efficiency 24V to 48V, 7.5A Voltage Doubler with Disconnect FET at Input 7820fc 22 For more information www.linear.com/LTC7820 LTC7820 TYPICAL APPLICATIONS 10 0.1F ROPT* 10 + VHIGH_SENSE VOUT VOUT G1 ISENSE+ TIMER SW3 LTC7820 RUN EXTVCC 4.7F SW1 VLOW VLOW_SENSE INTVCC G3 10k 10k HYS_PRGM FREQ 100k VOUT G4 INTVCC GND M1 BSC032N04LS 100k 0.01F CFLY 10F x16 M2 BSC032N04LS M3 BSC032N04LS 0.1F VOUT DB3 CMDSH-4 INTVCC 10k 10 1F SW3 UV 10F x8 M4 BSC032N04LS 4.7F 75k GND VOUT FAULT SW3 VOUT DB2 CMDSH-4 BOOST3 UV PGOOD HOT SWAP CIRCUITRY (e.g. LT4256) 10F x8 VIN 24V IN BAT54WS 1F BOOST2 VOUT 2.2F 100V x8 DB1 CMDSH-4 G2 VOUT 100 0.1F BOOST1 0.1F VOUT 68F 50V 30m x2 0.1F VCC ISENSE- MOPT* BSS123L OUT FAULT VOUT -24V 10A 7820 F09 *OPTIONAL DISCHARGING COMPONENTS FOR FAST STARTUP. Figure 9. High Efficiency 24V to -24V, 10A Voltage Inverter with Hot Swap at Input 7820fc For more information www.linear.com/LTC7820 23 LTC7820 TYPICAL APPLICATIONS 10 0.1F ROPT* 10 VHIGH_SENSE OUT 10F x8 0.1F VCC G1 ISENSE- ISENSE+ MOPT* BSS123L TIMER BOOST1 LTC7820 0.1F RUN EXTVCC 4.7F SW1 BOOST2 G3 10k 10k UV HYS_PRGM 10k PGOOD FREQ UV 100k 10k 68F 35V 0.01F SW3 CFLY 10F x16 M3 BSC032N04LS 0.1F DB3 CMDSH-4 G4 INTVCC INTVCC VOUT 12V 10A 10F x8 M4 BSC032N04LS 4.7F GND 75k FAULT GND + 10 1F BOOST3 SW3 M2 BSC032N04LS DB2 CMDSH-4 VLOW VLOW_SENSE INTVCC 1F HOT SWAP CIRCUITRY (e.g. LT4256) DB1 CMDSH-4 G2 VOUT 0.1F M1 BSC032N04LS VIN 24V IN FAULT *OPTIONAL DISCHARGING COMPONENTS FOR FAST STARTUP. 7820 F10 Figure 10. High Efficiency 24V to 12V, 10A Voltage Divider with Hot Swap at Input 7820fc 24 For more information www.linear.com/LTC7820 100k 100k VMID VOUT 0.1F 60.4k 10k 2.2F 0.1F FAULT VLOW BOOST2 G2 SW1 BOOST1 G1 VCC PGOOD GND INTVCC G4 SW3 BOOST3 G3 VLOW_SENSE LTC7820 HYS_PRGM FREQ UV EXTVCC TIMER RUN ISENSE+ ISENSE - VHIGH_SENSE 10 4.7F 10k INTVCC1 DB3 CMDSH-4 1F DB2 CMDSH-4 1F DB1 CMDSH-4 0.1F For more information www.linear.com/LTC7820 0.1F 10 CFLY1 10F x8 VMID CMID 10F x2 CTOP1 10F x2 100k 10k INTVCC2 100k *PGOOD2 VOUT 100k 10k 2.2F 0.1F 0.1F FAULT 7820 F11 GND INTVCC G4 SW3 BOOST3 G3 VLOW BOOST2 G2 SW1 BOOST1 G1 VCC VLOW_SENSE LTC7820 PGOOD HYS_PRGM FREQ UV EXTVCC TIMER RUN ISENSE+ ISENSE- VHIGH_SENSE 10 Figure 11. High Efficiency 48V to 12V, 20A Voltage Divider M4 BSC032N04LS M3 BSC032N04LS M2 BSC032N04LS M1 BSC100N06LS VIN 48V M8 BSC011N03LS M7 BSC011N03LS M6 BSC011N03LS M5 BSC011N03LS 0.1F 10 CFLY2 10F x16 * LOAD CURRENT APPLIED AFTER START-UP PGOOD2 MAY BE USED TO ENABLE THE LOAD CURRENT 4.7F INTVCC2 DB6 CMDSH-4 1F DB5 CMDSH-4 1F DB4 CMDSH-4 0.1F COUT 10F x6 VOUT 12V 20A* CTOP2 10F x4 LTC7820 TYPICAL APPLICATIONS 7820fc 25 LTC7820 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC7820#packaging for the most recent package drawings. UFD Package 28-Lead Plastic QFN (4mm x 5mm) (Reference LTC DWG # 05-08-1712 Rev C) 0.70 0.05 4.50 0.05 3.10 0.05 2.50 REF 2.65 0.05 3.65 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 3.50 REF 4.10 0.05 5.50 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 0.10 (2 SIDES) 0.75 0.05 R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.35 x 45 CHAMFER 2.50 REF R = 0.115 TYP 27 28 0.40 0.10 PIN 1 TOP MARK (NOTE 6) 1 2 5.00 0.10 (2 SIDES) 3.50 REF 3.65 0.10 2.65 0.10 (UFD28) QFN 0816 REV C 0.200 REF 0.00 - 0.05 0.25 0.05 0.50 BSC BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGHD-3). 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 7820fc 26 For more information www.linear.com/LTC7820 LTC7820 REVISION HISTORY REV DATE DESCRIPTION A 06/17 Removed TG/BG from EC tables 3S B 07/17 Changed the # of Switching Cycles in Voltage Divider section 12 Modified INTVCC pin description 7 Changed hysteresis voltage in Power Good Section C 10/17 Corrected hot swap part number call-out. PAGE NUMBER 11 23, 24 7820fc Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. For more information www.linear.com/LTC7820 27 LTC7820 TYPICAL APPLICATION 10 0.1F VHIGH_SENSE 100 VCC G1 ISENSE- 0.1F ISENSE+ TIMER 0.1F BOOST1 LTC7820 0.1F RUN EXTVCC SW1 4.7F 1F BOOST2 G3 10k 10k UV 10k HYS_PRGM PGOOD FREQ 80k M2 BSC032N04LS DB2 CMDSH-4 VLOW VLOW_SENSE INTVCC FAULT BOOST2 1F BOOST3 CFLY 10F x16 MDISCONNECT SUD50N04-8M8P 10 M3 BSC032N04LS SW3 G4 INTVCC INTVCC VOUT 12V 15A CVLOW 10F x6 0.1F 220F D3 CMHZ5236B DB3 CMDSH-4 R20 10k M4 BSC032N04LS 4.7F FAULT CTOP 10F x4 M1 BSC032N04LS DB1 CMDSH-4 G2 VOUT VIN 24V RSENSE 0.005 GND BOOST2 1F R19 10k 7820 F12 Figure 12. High Efficiency 24V to 12V, 15A Voltage Divider with Disconnect FET at Output RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3255 48V Fault Protected 50mA Step-Down Charge Pump 4V VIN 48V, 2.4V VOUT 12.5V, IQ = 20A, 3mm x 3mm DFN-10, MSOP-10 LTC3895 150V Low IQ, Synchronous Step-Down DC/DC Controller 4V VIN 140V, 150VP-P, 0.8V VOUT 24V, IQ = 50A PLL Fixed Frequency 50kHz to 900kHz LTC3891 60V, Low IQ, Synchronous Step-Down DC/DC Controller with 99% Duty Cycle 4V VIN 60V, 0.8V VOUT 24V, IQ = 50A PLL Fixed Frequency 50kHz to 900kHz LTC3897 60V Multiphase Synchronous Boost Controller with Input/ Output Protection 4V VIN 60V, VOUT Up to 60V, In-Rush Current Control, Overcurrent Protection and Output Disconnect LTC3784 60V Single Output, Low IQ Multiphase Synchronous Boost Controller 4.5V (Down to 2.3V After Start-Up) VIN 60V, VOUT Up to 60V, PLL Fixed Frequency 50kHz to 900kHz, 4mm x 5mm QFN-28, SSOP-28 LTC3769 60V Low IQ Synchronous Boost Controller 4.5V (Down to 2.3V After Start-Up) VIN 60V, VOUT Up to 60V, PLL Fixed Frequency 50kHz to 900kHz, 4mm x 4mm QFN-20, TSSOP-20 LTC4442 High Speed Synchronous N-Channel MOSFET Drivers Up to 38V Supply Voltage, 6V VCC 9.5V, 2.4A Peak Pull-Up/5A Peak Pull-Down, MSOP-8 LT(R)4256-1/ LT4256-2 Positive High Voltage Hot Swap Controllers 10.8V VIN 80V, Active Current Limit, Auto-Retry or Latchoff LTM4636/ LTM4636-1 40A, DC/DC Module Regulator 4.7V VIN 15V. 0.6V VOUT 3.3V, 16mm x 16mm x 7.07mm (BGA) LTM(R)4650/ LTM4650A Dual 25A or Single 50A DC/DC Module Regulator 4.5V VIN 15V, 0.6V VOUT 1.8V, 16mm x 16mm x 5.01mm (BGA) 4.5V VIN 16V, 0.6V VOUT 5.5V, 16mm x 16mm x 5.01mm (BGA) 7820fc 28 LT 1017 REV C * PRINTED IN USA For more information www.linear.com/LTC7820 www.linear.com/LTC7820 ANALOG DEVICES, INC. 2017