A product Line of Diodes Incorporated PI6C48545 3.3V Low Skew 1-to-4 LVTTL/LVCMOS to LVDS Fanout Buffer Features Description 1/41/4 1/41/4 1/41/4 1/41/4 1/41/4 1/41/4 1/41/4 1/41/4 1/41/4 1/41/4 The PI6C48545 is a high-performance low-skew LVDS fanout buffer. PI6C48545 features two selectable single-ended clock inputs and translate to four LVDS outputs. The CLK0 and CLK1 inputs accept LVCMOS or LVTTL signals. The outputs are synchronized with input clock during asynchronous assertion/deassertion of CLK_EN pin. PI6C48545 is ideal for single-ended LVTTL/LVCMOS to LVDS translations. Typical clock translation and distribution applications are data-communications and telecommunications. Maximum operation frequency: 650 MHz 4 pair of differential LVDS outputs Selectable CLK0 and CLK1 inputs CLK0, CLK1 accept LVCMOS, LVTTL input level Output Skew: 40ps (maximum) Part-to-part skew: 300ps (maximum) Propagation delay: 2.2ns (maximum) 3.3V power supply Pin-to-pin compatible to ICS8545 Operating Temperature: -40oC to 85oC 1/41/4 Packaging (Pb-free & Green): - 20-pin TSSOP (L) Block Diagram Pin Diagram D CLK_EN Q LE CLK0 CLK1 CLK_SEL OE PI6C48545 Document Number DS40754 Rev 1-2 0 1 GND 1 20 Q0 CLK_EN 2 19 nQ0 CLK_SEL 3 18 VCC CLK0 4 17 Q1 NC 5 16 nQ1 Q1 nQ1 CLK1 6 15 Q2 NC 7 14 nQ2 OE 8 13 GND Q2 nQ2 GND 9 12 Q3 VCC 10 11 nQ3 Q0 nQ0 Q3 nQ3 1 www.diodes.com February 2018 Diodes Incorporated A product Line of Diodes Incorporated PI6C48545 Pin Description Name Pin # Type Description GND 1, 9, 13 P CLK_EN 2 I_PU Synchronizing clock enable. When high, clock outputs follow clock input. When low, Qx outputs are forced low, nQx outputs are forced high. LVCMOS/LVTTL level with 80k pull up. CLK_SEL 3 I_PD Clock select input. When high, selects CLK1 input. When low, selects CLK0 input. LVCMOS/LVTTL level with 80k pull down. CLK0 4 I_PD LVCMOS / LVTTL clock input CLK1 6 I_PD LVCMOS / LVTTL clock input Connect to Ground NC 5, 7 No internal connection. OE 8 I_PU VCC 10, 18 P Connect to 3.3V. Q3, nQ3 12, 11 O Differential output pair, LVDS interface level. Q2, nQ2 15, 14 O Differential output pair, LVDS interface level. Q1, nQ1 17, 16 O Differential output pair, LVDS interface level. Q0, nQ0 20, 19 O Differential output pair, LVDS interface level. Output Enable. Controls outputs Q0, nQ0 through Q3, nQ3. Notes: 1. I = Input, O = Output, P = Power supply connection, I_PD = Input with pull down, I_PU = Input with pull up. Pin Characteristics Symbol Parameter Conditions Min. Typ. CIN Input Capacitance 6 R_pullup Input Pullup Resistance 80 R_pulldown Input Pulldown Resistance 80 Max. Units pF k Control Input Function Table Inputs Outputs OE CLK_EN CLK_SEL Selected Source Q0:Q3 nQ0:nQ3 1 0 0 CLK0 Diasbled: Low Diasbled: High 1 0 1 CLK1 Disabled: Low Disabled: High 1 1 0 CLK0 Enabled Enabled 1 1 1 CLK1 Enabled Enabled 0 x x HiZ HiZ Notes: 1. After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as show below. PI6C48545 Document Number DS40754 Rev 1-2 2 www.diodes.com February 2018 Diodes Incorporated A product Line of Diodes Incorporated PI6C48545 CLK_EN Timing Diagram Disabled Enabled CLK0 CLK1 CLK_EN nQ0:nQ3 Q0:Q3 Clock Input Function Table Inputs Outputs CLK0 or CLK1 Q0:Q3 nQ0:nQ3 0 LOW HIGH 1 HIGH LOW PI6C48545 Document Number DS40754 Rev 1-2 3 www.diodes.com February 2018 Diodes Incorporated A product Line of Diodes Incorporated PI6C48545 Absolute Maximum Ratings Symbol Parameter Conditions Min. Typ. Max. VCC Supply voltage Referenced to GND VIN Input voltage Referenced to GND -0.5 VCC+0.5V VOUT Output voltage Referenced to GND -0.5 VCC+0.5V TSTG Storage temperature -65 150 Units 4.6 V oC Notes: 1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and correct functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Operating Conditions Symbol Parameter VCC Power Supply Voltage TA Ambient Temperature ICC Power Supply Current Conditions Min. Typ. Max. 3.135 3.3 3.465 V 85 oC 60 mA -40 Units LVCMOS/LVTTL DC Characteristics (TA = -40oC to 85oC, VCC = 3.135V to 3.465V unless otherwise stated below.) Symbol Parameter Conditions Min. Typ. Max. Units 2 VCC+0.3 V VIH Input High Voltage CLK0, CLK1, CLK_EN, CLK_SE, OE VIL Input Low Voltage CLK0, CLK1 -0.3 1.3 V CLK_EN, CLK_SEL, OE -0.3 0.8 V IIH Input High Current IIL Input Low Current CLK0, CLK1, CLK_SEL VIN = VCC = 3.465V 150 uA CLK_EN, OE VIN = VCC = 3.465V 5 uA CLK0, CLK1, CLK_SEL VIN = 0V, VCC = 3.465V -5 uA CLK_EN, OE VIN = 0V, VCC = 3.465V -150 uA LVDS DC Characteristics (TA = -40oC to 85oC, VCC = 3.135V to 3.465V unless otherwise stated below.) Symbol Parameter Conditions Min. Typ. Max. 200 280 360 0 40 1.3 1.475 V 5 25 mV VOD Differential Output Voltage VOD VOD Magnitude Change VOS Offset Voltage VOS VOS Magnitude Change IOZ High Impedance Leakage Current -10 IOFF Power OFF Leakage -20 IOSD 1.125 +10 1 +20 Differential Output Short Circuit Current -3.5 -5 IOS Output Short Circuit Current -3.5 -5 VOH Output Voltage High 1.34 1.6 VOL Output Voltage Low PI6C48545 Document Number DS40754 Rev 1-2 0.9 4 1.06 www.diodes.com Units mV A mA V February 2018 Diodes Incorporated A product Line of Diodes Incorporated PI6C48545 AC Characteristics (TA = -40oC to 85oC, VCC = 3.135V to 3.465V) Symbol Parameter fmax Output Frequency tPd Propagation Tsk(o) Output-to-output Tsk(pp) Part-to-part tr/tf Output Rise/Fall time odc Output duty cycle Conditions Delay(1) Min. 0.8 Skew(2) Typ. Max. Units 650 MHz 2.2 ns 40 Skew(3) 300 20% - 80% 100 300 48 52 ps % Notes: 1. Measured from the VCC/2 of the input to the differential output crossing point 2. Defined as skew between outputs at the same supply voltage and with equal load condition. Measured at the outputs differential crossing point. 3. Defined as skew between outputs on different parts operating at the same supply voltage and with equal load condition. Measured at the outputs differential crossing point. 4. All parameters are measured at 500MHz unless noted otherwise Part Marking L Package PI6C 48545LE CYYWWXX C: Die Rev YY: Year WW: Workweek 1st X: Assembly Code 2nd X: Fab Code PI6C48545 Document Number DS40754 Rev 1-2 5 www.diodes.com February 2018 Diodes Incorporated A product Line of Diodes Incorporated PI6C48545 Packaging Mechanical: 20-TSSOP (L) 16-0074 For latest package info. please check: http://www.diodes.com/design/support/packaging/pericom-packaging/packaging-mechanicals-and-thermal-characteristics/ Ordering Information Ordering Code Package Code PI6C48545LEX L Package Description 20-pin, 173-mil Wide (TSSOP) Notes: 1. EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. All applicable RoHS exemptions applied. 2. See http://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated's definitions of Halogen- and Antimony-free, "Green" and Lead-free. Thermal characteristics can be found on the company web site at www.diodes.com/design/support/packaging/ 3. E = Pb-free and Green 4. X suffix = Tape/Reel PI6C48545 Document Number DS40754 Rev 1-2 6 www.diodes.com February 2018 Diodes Incorporated A product Line of Diodes Incorporated PI6C48545 IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). 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