APU1150
1
Data and specifications subject to change without notice.
4A ULTRA LOW DROPOUT POSITIVE
ADJUSTABLE REGULATOR
The APU1150 is a 4A regulator with extremely low drop-
out voltage using a proprietary bipolar process that
achieves comparable equivalent on-resistance to that of
discrete MOSFETs. This product is specifically designed
to provide well regulated supply for applications requir-
ing 2.8V or lower voltages from 3.3V ATX power supplies
where high efficiency of a switcher can be achieved with-
out the cost and complexity associated with switching
regulators. One such application is the new graphic chip
sets that require anywhere from 2.4V to 2.7V supply
such as the Intel I740 chip set.
DESCRIPTION
0.7V Dropout at 4A
Fast Transient Response
1% Voltage Reference Initial Accuracy
Built-In Thermal Shutdown
APPLICATIONS
FEATURES
3.3V to 2.7V Intel I740 Chip Set
TYPICAL APPLICATION
Technology Licensed from International Rectifier
Figure 1 - Typical application of APU1150 in a 3.3V to 2.7V for I740 chip.
3.3V
APU1150
2.7V
C1
100uF
C3
100uF
5V
C2
100uF
R1
102
R2
118
1
2
3
4
5
V
SENSE
Adj
V
OUT
V
CTRL
V
IN
PACKAGE/ORDER INFORMATION
TJ (°C) 5-PIN PLASTIC 8-PIN PLASTIC
TO-263 (S) SOIC (M)
0 To 125 APU1150S-HF APU1150M-HF
Advanced Power
Electronics Corp.
RoHS Compliant & Halogen Free
200908201
2
APU1150
ABSOLUTE MAXIMUM RATINGS
Input Voltage (VIN) .................................................... 7V
Control Input Voltage (VCTRL) ..................................... 14V
Power Dissipation ..................................................... Internally Limited
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature Range ..................... 0°C To 150°C
PACKAGE INFORMATION
5-PIN PLASTIC TO-263 (S) 8-PIN PLASTIC SOIC (M)
θJA=35°C/W for 0.5" square pad θJA=55°C/W for 1" Sq pad area
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over CIN=1µF, COUT=10µF, and TJ=0 to 125C.
Typical values refer to TJ=25C. VOUT=VSENSE.
PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS
V
SENSE
Adj
V
IN
V
CTRL
V
OUT
4
3
2
1
5
6
7
8
TOP VIEW
V
OUT
V
OUT
V
OUT
V
SENSE
Adj
V
OUT
V
CTRL
V
IN
FRONT VIEW
1
2
3
4
5
Tab is
VOUT
Reference Voltage
Line Regulation
Load Regulation (Note 1)
Dropout Voltage (Note 2)
(VCTRL - VOUT)
Dropout Voltage (Note 2)
(VIN - VOUT)
Current Limit
Minimum Load Current (Note 3)
Thermal Regulation
Ripple Rejection
Control Pin Current
Adjust Pin Current
VCTRL=2.7 to 12V, VIN=2.05V to 5.5V,
Io=10mA to 4A, VADJ=0V
VCTRL=2.5V to 7V, VIN=1.75V to 5.5V,
Io=10mA, VADJ=0V
VCTRL=2.75V, VIN=2.1V,
Io=10mA to 4A, VADJ=0V
VADJ=0V for all conditions below:
VIN=2.05V, Io=1.5A
VIN=2.05V, Io=3A
VIN=2.05V, Io=4A
VADJ=0V for all conditions below:
VCTRL=2.75V, Io=1.5A
VCTRL=2.75V, Io=3A
VCTRL=2.75V, Io=4A
VCTRL=2.75V, VIN=2.05V,
∆Vo=100mV, VADJ=0V
VCTRL=5V, VIN=3.3V, VADJ=0V
30ms Pulse
VCTRL=5V, VIN=5V, Io=4A, VADJ=0V,
TJ=25C, VRIPPLE=1VPP at 120Hz
VADJ=0V for all below conditions:
VCTRL=2.75V, VIN=2.05V, Io=1.5A
VCTRL=2.75V, VIN=2.05V, Io=3A
VCTRL=2.75V, VIN=2.05V, Io=4A
VCTRL=2.75V, VIN=2.05V, VADJ=0V
1.225
-5
-5
4.2
1.250
-0.2
3
1.00
1.05
1.13
0.26
0.50
0.70
4.65
1
0.01
70
16
36
67
50
1.275
+5
+5
1.15
1.15
1.20
0.38
0.60
1.15
6
10
25
50
85
V
mV
mV
V
V
A
mA
%/W
dB
mA
µA
VREF
IADJ
Advanced Power
Electronics Corp.
APU1150
3
This pin is the positive side of the reference which allows remote load sensing to achieve
excellent load regulation.
A resistor divider from this pin to the VOUT pin and ground sets the output voltage.
The output of the regulator. A minimum of 10µF capacitor must be connected from this
pin to ground to insure stability.
This pin is the supply pin for the internal control circuitry as well as the base drive for the
pass transistor. This pin must always be higher than the VOUT pin in order for the device to
regulate. (See specifications)
The input pin of the regulator. Typically a large storage capacitor is connected from this
pin to ground to insure that the input voltage does not sag below the minimum drop out
voltage during the load transient response. This pin must always be higher than VOUT in
order for the device to regulate. (See specifications)
Note 1: Low duty cycle pulse testing with Kelvin con-
nections is required in order to maintain accurate data.
Note 2: Dropout voltage is defined as the minimum dif-
ferential between VIN and VOUT required to maintain regu-
lation at VOUT. It is measured when the output voltage
drops 1% below its nominal value.
Note 3: Minimum load current is defined as the mini-
mum current required at the output in order for the out-
put voltage to maintain regulation. Typically the resistor
dividers are selected such that it automatically main-
tains this current.
PIN # PIN SYMBOL PIN DESCRIPTION
PIN DESCRIPTIONS
1
2
3
4
5
VSENSE
Adj
VOUT
VCTRL
VIN
BLOCK DIAGRAM
Figure 2 - Simplified block diagram of the APU1150.
VCTRL
VIN
VSENSE
Adj
VOUT
THERMAL
SHUTDOWN
CURRENT
LIMIT
1.25V
+
+
5
4
3
1
2
Advanced Power
Electronics Corp.
4
APU1150
APPLICATION INFORMATION
Introduction
The APU1150 adjustable regulator is a five-terminal de-
vice designed specifically to provide extremely low drop-
out voltages comparable to the PNP type without the
disadvantage of the extra power dissipation due to the
base current associated with PNP regulators. This is
done by bringing out the control pin of the regulator that
provides the base current to the power NPN and con-
necting it to a voltage that is grater than the voltage present
at the VIN pin. This flexibility makes the APU1150 ideal
for applications where dual inputs are available such as
a computer mother board with an ATX style power sup-
ply that provides 5V and 3.3V to the board. One such
application is the new graphic chip sets that require any-
where from 2.4V to 2.7V supply such as the Intel I740
chip set. The APU1150 can easily be programmed with
the addition of two external resistors to any voltages
within the range of 1.25 to 5.5 V. Another major require-
ment of these graphic chips such as the Intel I740 is the
need to switch the load current from zero to several amps
in tens of nanoseconds at the processor pins, which
translates to an approximately 300 to 500ns of current
step at the regulator. In addition, the output voltage tol-
erances are also extremely tight and they include the
transient response as part of the specification.
The APU1150 is specifically designed to meet the fast
current transient needs as well as providing an accurate
initial voltage, reducing the overall system cost with the
need for fewer number of output capacitors. Another fea-
ture of the device is its true remote sensing capability
which allows accurate voltage setting at the load rather
than at the device.
Output Voltage Setting
The APU1150 can be programmed to any voltages in the
range of 1.25V to 5.5V with the addition of R1 and R2
external resistors according to the following formula:
V
OUT
R1
R2
V
IN
V
CTRL
V
REF
I
ADJ
= 50uA
APU1150
V
SENSE
Adj
V
OUT
V
CTRL
V
IN
R1
R2
V
IN
V
CTRL R
L
APU1150
V
SENSE
Adj
V
OUT
V
CTRL
Vin
Figure 3 - Typical application of the APU1150
for programming the output voltage.
The APU1150 keeps a constant 1.25V between the VSENSE
pin and the VADJ pin. By placing a resistor R1 across
these two pins and connecting the VSENSE and VOUT pin
together, a constant current flows through R1, adding to
the Iadj current and into the R2 resistor producing a volt-
age equal to the (1.25/R1)×R2 + IADJ×R2. This voltage
is then added to the 1.25V to set the output voltage.
This is summarized in the above equation. Since the
minimum load current requirement of the APU1150 is
10mA, R1 is typically selected to be a 121Ω resistor so
that it automatically satisfies this condition. Notice that
since the IADJ is typically in the range of 50µA it only
adds a small error to the output voltage and should be
considered when very precise output voltage setting is
required.
Load Regulation
Since the APU1150 has separate pins for the output (VOUT)
and the sense (VSENSE), it is ideal for providing true re-
mote sensing of the output voltage at the load. This
means that the voltage drops due to parasitic resistance
such as PCB traces between the regulator and the load
are compensated for using remote sensing. Figure 4
shows a typical application of the APU1150 with remote
sensing.
Figure 4 - Schematic showing connection
for best load regulation.
VOUT = VREF× 1+
+IADJ×R2
R2
R1
( )
Where:
VREF = 1.25V Typically
IADJ = 50µA Typically
R1 and R2 as shown in Figure 3:
Advanced Power
Electronics Corp.
APU1150
5
VOUT = 2.7V
VIN = 3.3V
VCTRL = 5V
IOUT = 2A (DC Avg)
Assuming, the following conditions:
Calculate the maximum power dissipation using the fol-
lowing equation:
Using table below select the proper package and the
amount of copper board needed.
Pkg Copper θJA(°C/W) Max Pd Max Pd
Area (TA=25°C) (TA=45°C)
TO-263 1.4"X1.4" 25 4.4W 3.6W
TO-263 1.0"X1.0" 30 3.7W 3.0W
TO-263 0.7"X0.7" 35 3.1W 2.6W
TO-263 Pad Size 45 2.4W 2.0W
SO-8 1.0"X1.0" 55 2.0W 1.63W
Note: Above table is based on the maximum junction
temperature of 135C.
As shown in the above table, any of the two packages
will do the job. For low cost applications the SOIC 8-pin
package is recommended.
PD = 2×(3.3 - 2.7)+
×(5 - 2.7) = 1.28W
PD = IOUT×(VIN - VOUT)+
×(VCTRL - VOUT)
2
60
( )
IOUT
60
( )
Stability
The APU1150 requires the use of an output capacitor as
part of the frequency compensation in order to make the
regulator stable. Typical designs for the microprocessor
applications use standard electrolytic capacitors with
typical ESR in the range of 50 to 100mΩ and an output
capacitance of 500 to 1000µF. Fortunately as the ca-
pacitance increases, the ESR decreases resulting in a
fixed RC time constant. The APU1150 takes advantage
of this phenomena in making the overall regulator loop
stable.
For most applications a minimum of 100µF aluminum
electrolytic capacitor such as Sanyo, MVGX series,
Panasonic FA series as well as the Nichicon PL series
insures both stability and good transient response.
Thermal Design
The APU1150 incorporates an internal thermal shutdown
that protects the device when the junction temperature
exceeds the allowable maximum junction temperature.
Although this device can operate with junction tempera-
tures in the range of 150C, it is recommended that the
selected heat sink be chosen such that during maxi-
mum continuous load operation the junction tempera-
ture is kept below this number. The example below
shows the steps in selecting the proper surface mount
package.
Advanced Power
Electronics Corp.
Package Outline : SO-8
MIN NOM MAX
1.35 1.55 1.75
0.10 0.18 0.25
0.33 0.41 0.51
0.19 0.22 0.25
4.80 4.90 5.00
5.80 6.15 6.50
3.80 3.90 4.00
0.38 －0.90
0.00 4.00 8.00
1.All Dimension Are In Millimeters.
2.Dimension Does Not Include Mold Protrusions.
Part Marking Information & Packing : SO-8
Laser Marking
Draw No. M1-M-8-G-v01
1.27 TYP
0.254 TYP
ADVANCED POWER ELECTRONICS CORP.
SYMBOLS Millimeters
A
A1
B
c
G
L
α
D
E
E1
e
e
B
134
5678
2
D
E1
A1
A
G
Part Number
U1150M
YWWSSS
Package Code
Date Code (YWWSSS)
Y：Last Digit Of The Year
WW：Week
SSS：Sequence
E
Package Outline : TO-263-5L
Millimeters
MIN NOM MAX
A 4.40 4.60 4.80
b 0.66 0.79 0.91
L4 0.00 0.15 0.30
c 0.36 0.43 0.50
L1 2.29 2.54 2.79
E 9.80 10.10 10.40
E1
c2 1.25 1.35 1.45
L2
D 8.60 8.80 9.00
D1
e
L 14.60 15.20 15.80
0° 4° 8°
1.All Dimensions Are in Millimeters.
2.Dimension Does Not Include Mold Protrusions.
Part Marking Information & Packing : TO-263-5L
θ
7.60
1.27
5.90
1.70
SYMBOLS
ADVANCED POWER ELECTRONICS CORP.
U1150S
Package Code
Part Numbe
r
YWWSSS LOGO
Date Code (YWWSSS)
Y：Last Digit Of The Year
WW：Week
SSS：Sequence
