N
ZXLD1371
Document numbe
r
Descripti
o
The ZXLD13
7
external MOS
topology cont
r
through serie
s
to operate in
b
The 60V cap
a
enables it to
b
in excess of 1
5
The ZXLD13
7
patent pendin
g
accuracy in
a
dimming is a
c
PWM control.
The ZXLD137
highlights a f
a
information on
Features
• 0.5% typi
c
• 5 to 60V
o
• LED driv
e
• configura
t
• Wide dyn
a
o 10:1
D
o 1000:
• Up to 1M
H
• High tem
p
• Available
TS16949
• Available
lead Free
N
ote 1: EU Direc
t
RoHS ex
e
Typical A
p
Buck-Boo
s
T
H
1
0
R
1.
8
RGI2
75k
RGI1
24k
C1
10µF
VIN 8V to 22V
r
: DS35436 Rev. 1
o
n
7
1 is an LE
D
FETs to drive
r
oller enabling
s
connected L
E
b
uck, boost an
d
a
bility couple
d
b
e used in a w
i
5
LEDs in seri
e
7
1 is a modi
f
g
control sch
e
a
ll three mo
d
c
hieved throu
g
1 uses two pi
n
a
ult, while the
the exact faul
t
c
al output curr
e
o
perating volta
g
e
r supports Bu
c
t
ions
a
mic range di
m
D
C dimming
1 dimming ran
g
H
z switching
p
erature contr
o
in Automoti
v
certification
in “Green” M
o
Finish/ RoHS
t
ive 2002/95/EC (
R
e
mptions applied.
p
plication
s
t Diagram U
C2
330pF
ZXL
D
H
1
0
k
R
4
8
k
PWM
VAUX VI
N
GI
ADJ
REF
TADJ
SHP S
NC
- 2
60V HIGH
A
D
driver cont
r
high current
it to efficientl
y
E
Ds. The mult
i
d
buck-boost c
o
d
with its mult
de range of a
p
e
s.
f
ied hystereti
c
e
me providing
d
es of operat
i
g
h DC control
n
s for fault dia
g
multi-level sta
t
t
.
e
nt accuracy
g
e range
c
k, Boost and
B
m
ming
g
e at 500Hz
o
l of LED curre
n
v
e Grade w
i
o
lding Compo
u
Compliant (N
o
R
oHS) & 2011/65/
E
Circuit
tilizing Ther
D
1371
L1
33µ
H
R1
0R05
N
ISM
GNDPGND
GATE
FLAG
STATUS
Th
e
w
w
A
CCURACY
r
oller IC for
d
LEDs. It is a
y
control the
c
i
-topology ena
b
o
nfigurations.
i-topology ca
p
p
plications an
d
c
controller u
s
high output
c
i
on. High ac
c
and high freq
g
nosis. A flag
o
t
us pin gives
f
B
uck-boost
n
t using T
ADJ
i
th AEC-Q10
0
u
nd (No Br, S
b
o
te 1)
E
U (RoHS 2). All a
p
mistor and
T
H
C
1
0
D1
PDS3100
Q1
DMN6068LK3
e
rmally connected
ILED = 1A
1 of 42
w
w.diodes.com
BUCK/BOO
S
d
riving
multi-
c
urrent
b
les it
p
ability
d
drive
s
ing a
c
urrent
c
uracy
uency
o
utput
f
urther
Pi
n
0
and
b
) with
p
plicable
T
ADJ
1
0
1
0
I
L
C
OUT
0
µF
1 to 6
LEDs
A
Di
o
S
T/BUCK-B
O
n
Assignm
e
Curve S
h
ADJ
REF
TADJ
SHP
STATUS
SGND
PGND
N/C
1
2
3
4
5
6
7
8
0
%
0
0%
L
ED
Thermal net
w
Rth = 1.
8
A
Product Li
n
o
des Incorpo
r
O
OST LED
D
e
nts
h
owing LED
1
2
3
4
5
6
7
8
TSSO
P
70°C 85°C
w
ork response in
8
k and TH1 =
1
Ω
ZX
Febr
u
© Diodes
n
e o
f
r
ated
D
RIVER-CON
T
Current vs.
T
P
-16EP
T
LED
R
T
Bu ck co nfig ur at i
o
1
0k (beta = 39
0
Ω
LD1371
u
ary 2012
Incorporated
T
ROLLER
T
LED
GI
PWM
FLAG
ISM
VIN
VAUX
GATE
N/C
16
15
14
13
12
11
10
9
R
th
T
H1
REF
TADJ
o
n with:
0
0)
ZXLD1371
ZXLD1371
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Pin Descriptions
Pin
Name Pin Type
(Note 2) Description
ADJ 1 I
Adjust input (for dc output current control)
Connect to REF to set 100% output current.
Drive with dc voltage (125mV<VADJ< 1.25V) to adjust output current from 10% to 100%
of set value. The ADJ pin has an internal clamp that limits the internal node to less than
3V. This provides some failsafe should they get overdriv en
REF 2 O
Internal 1.25V reference voltage outp ut
TADJ 3 I
Temperature Adjust input for LED thermal current control
Connect thermistor/resistor network to this pin to reduce output current above a preset
temperature threshold.
Connect to REF to disable thermal compensation function. (See section on thermal
control.)
SHP 4 I/O
Shaping capacitor for feedback control loop
Connect 330pF ±20% capaci tor from this pin to ground to provide loop compensation
STATUS 5 O
Operation status output (analog output)
Pin is at 4.5V (nominal) during normal operation.
Pin switches to a lower voltage to indicate specific operation warnings or fault
conditions. (See section on ST ATUS output.)
Status pin voltage is lo w during shutdown mode
SGND 6 P
Signal ground (Connect to 0V)
PGND 7 P
Power ground - Connect to 0V and pin 8 to maximize copper area
N/C 8 -
Not Connected internally – recommend connection to pin 7, (PGND), to maximize PCB
copper for thermal dissipation
N/C 9
Not Connected internally – recommend connection pin 10 (GATE) to permit wide copp er
trace to gate of MOSFET
GATE 10 O Gate drive output to external NMOS transistor – connect to pin 9
VAUX 11 P
Auxiliary positive supp ly to internal switch gate driver
At VIN < 8V; a bootstrap circuit is recommended to ensure adequate gate drive voltage
(see Applications section)
At VIN > 8V; connect to VIN
At VIN >24V; to reduce power dissipation, VAUX can be connected to an 8V to 15V
auxiliary p ower supply (see Applic ations section). Decouple to ground with capacitor
close to device (see Applications section)
VIN 12 P
Input supply to device 5V to 60V
Decouple to ground with capacitor close to device (refer to Applications section)
ISM 13 I
Current monitor input. Connect current sens e resistor between this pin and VIN
The nominal voltage, VSENSE, across the resistor is 218mV fixed in Buck mode and
initially 225mV in Boost an d Buck-Boost modes, varying with duty cycle.
FLAG 14 O Flag open drain output
Pin is high impedance during normal operation
Pin switches low to indicate a fault, or warning condition
PWM 15 I
Digital PWM output current control
Pin driven either by open Drain or push-pull 3.3V or 5V logic levels.
Drive with frequency higher than 100Hz to gate output ‘on’ and ‘off’ during dimming
control.
The device enters standby mode when PWM pin is driven with logic low level for more
than 15ms nominal (Refer to application se ction for more details)
GI 16 I
Gain setting input
Used to set the device in Buck mode or Boost, Buck-boost modes and to control the
sense voltage in Boost and Buck-boost mod es
Connect to ADJ pin for Buck mode operation
For Boost and Buck-boost modes, connect to resistive divider from ADJ to SGND. The
GI divider is required to compensate for duty cycle gating in the internal feedback lo op
(see Application section). The GI pin has an i nternal clamp that limits the internal node to
less than 3V. This provides some failsafe should it become overdriven.
EP PAD P Exposed paddle. Connect to 0V plane for electrical and thermal management
Notes: 2. Type refers to whether or not pin is an Input, Output, Input/Output or Power supply pin.
ZXLD1371
ZXLD1371
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Functional Block Diagram
Absolute Maximum Ratings (Voltages to GND Unless Otherwise Stated) (Note 3)
Symbol Parameter Rating Unit
VIN Input supply voltage -0.3 to 65 V
VAUX Auxiliary supply voltage -0.3 to 65 V
VISM Current monitor input relative to GND -0.3 to 65 V
VSENSE Current monitor sense voltage (VIN-VISM) -0.3 to 5 V
VGATE Gate driver output voltage -0.3 to 20 V
IGATE Gate driver continuous output current 18 mA
VFLAG Flag output voltage -0.3 to 40 V
VPWM, VADJ, VTADJ, VGI,
VPWM Other input pins -0.3 to 5.5 V
TJ Maximum junction temperature 150 °C
TST Storage temperature -55 to 150 °C
Stresses greater than the 'Absolute Maximum Ratings' specified above, may cause permanent damage to the device. These are stress ratings only; functional
operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be affected by
exposure to absolute maximum rating conditions for extended periods of time.
Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and
transporting these devices.
ZXLD1371
ZXLD1371
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Package Thermal Data
Thermal Resistance Package Typical Unit
Junction-to-Ambient, JA (Note 4) TSSOP-16 EP 50 °C/W
Junction-to-Case, JC TSSOP-16 EP 23 °C/W
Recommended Operating Conditions (-40°C TJ 125°C)
Symbol Paramete
r
Performance/Comment Min Max Unit
VIN Input supply voltage range Normal Operation 8.0 60 V
(Note 5) Reduced performance
operation 5.0 8.0
VAUX Auxiliary supply volt age range (Note 6) Normal Operation 8.0 60 V
(Note 5) Reduced performance
operation 5.0 8.0
VSENSE Differential input voltage VIN-VISM, with 0 VADJ 2.5 0 450 mV
VADJ External dc control voltage applied to ADJ pin to
adjust output current DC brightness control mode
from 10% to 100% 0.125 1.25 V
IREF Reference external load current REF sourcing current 1 mA
fmax Recommended switching frequency range (Note 7) 300 1000 kHz
VTADJ Temperature adjustment (TADJ) input voltage range 0
VREF V
fPWM Recommended PWM dimming frequency range To achieve 1000:1 resolution 100 500 Hz
To achieve 500:1 resolution 100 1000 Hz
tPWMH/L PWM pulse width in dimming mode PWM input high or low 0.002 10 ms
VPWMH PWM pin high level input voltage 2 5.5 V
VPWML PWM pin lo w level input voltage 0 0.4 V
TJ Operating Junction Temperature Range -40 125 °C
GI Gain setting ratio for boost and buck-boost modes Ratio= VGI/VADJ 0.20 0.50
Notes: 3. For correct operation SGND and PGND should always be connected together.
4. Measured on “High Effective Thermal Conductivity Test Board" according to JESD51.
5. Device starts up above 5.4V and as such the minimum applied supply voltage has to be above 5.4V (plus any noise margin). The ZXLD1371 will,
however, continue to function when the input voltage is reduced from ≥ 8V down to 5.0V.
When operating with input voltages below 8V the output current and device parameters may deviate from their normal values; and is dependent
on power MOSFET switch, load and ambient temperature conditions. To ensure best operation in Boost and Buck-boost modes with input
voltages, VIN, between 5.0 and 8V a suitable boot-strap network on VAUX pin is recommended.
Performance in Buck mode will be reduced at input voltages (VIN, VAUX) below 8V. – a boot-strap network cannot be implemented in buck mode.
6. VAUX can be driven from a voltage higher than VIN to provide higher efficiency at low VIN voltages, but to avoid false operation; a voltage should
not be applied to VAUX in the absence of a voltage at VIN. VAUX can also be operated at a lower voltage than VIN to increase efficiencies at high
VIN.
7. The device contains circuitry to control the switching frequency to approximately 400kHz. The maximum and minimum operating frequency is not
tested in production.
ZXLD1371
ZXLD1371
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Electrical Characteristics (Test conditions: VIN = VAUX = 12V, TA = 25°C, unless other wise specified.)
Symbol Parameter Conditions Min Typ Max Units
Supply and reference parameters
VUV- Under-Voltage detection threshold
Normal operation to switch disabled VIN or VAUX falling (Note 8) 4.5 V
VUV+ Under-Voltage detection threshold
Switch disabled to normal operation VIN or VAUX rising (Note 8) 4.9 V
IQ-IN Quiescent current into VIN PWM pin floating.
Output not switching 1.5 3
mA
IQ-AUX Quiescent current into VAUX 150 300
µA
ISB-IN Standby current into VIN. PWM pin grounded
for more than 15ms 90 150
µA
ISB-AUX Standby current into VAUX. 0.7 10
µA
VREF Internal reference voltage No load 1.237 1.25 1.263 V
ΔVREF Change in reference voltage with output
current Sourcing 1mA -5 mV
Sinking 25µA 5
VREF_LINE Reference voltage l ine regulation VIN = VAUX, 8.0V<VIN = <60V -60 -90 dB
VREF-TC Reference temperature coefficient ±50
ppm/°C
DC-DC converter parameter s
IADJ ADJ input current (Note 9) VADJ 1.25V 100 nA
VADJ = 5.0V 5 µA
VGI GI Voltage threshold for boost and buck-
boost modes selection (Note 9) VADJ = 1.25V 0.8 V
IGI GI input current (Note 9) VGI 1.25V 100 nA
VGI = 5.0V 5 µA
IPWM PWM input current VPWM = 5.5V 36 100 µA
tPWMoff PWM pulse width
(to enter shutdown state) PWM input low 10 15 25 ms
TSDH Thermal shutdown upper threshold
(GATE output forced lo w) Temperature rising. 150 ºC
TSDL Thermal shutdown lower threshold
(GATE output re-enabled) Temperature falling. 125 ºC
High-Side Current Monitor (Pin ISM)
IISM Input Current Measured into ISM pin VISM = 12V 11 20 µA
VSENSE_acc Accuracy of nominal VSENSE threshold
voltage VADJ = 1.25V ±0.25 ±2 %
VSENSE-OC Over-current sense threshold voltage 300 350 375 mV
Notes: 8. UVLO levels are such that all ZXLD1371 will function above 5.4V for rising supply voltages and function down to 5V for falling supply voltages.
9. The ADJ and GI pins have an internal clamp that limits the internal node to less than 3V. This provides some failsafe should those pins get
overdriven.
ZXLD1371
ZXLD1371
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Electrical Characteristics (cont.) (Test conditions: VIN = VAUX = 12V, TA = 25°C, unless otherwise specified.)
Symbol Parameter Conditions Min Typ Max Units
Output Parameters
VFLAGL FLAG pin low level output voltage Output sinking 1mA 0.5 V
IFLAGOFF FLAG pin open-drain leakag e current VFLAG = 40V 1 µA
VSTATUS STATUS F lag no-load output voltage
(Note 10)
Normal operation 4.2 4.5 4.8
V
Out of regulation (VSHP out of range)
(Note 11) 3.3 3.6 3.9
VIN under-voltage (VIN < UVLO) 3.3 3.6 3.9
Switch stalled (tON or tOFF > 100µs) 3.3 3.6 3.9
Over-temperature (TJ > 125°C) 1.5 1.8 2.1
Excess sense resistor current
(VSENSE > 0.32V) 0.6 0.9 1.2
RSTATUS Output impedance of STATUS output Normal operation 10 k
Driver output (PIN GATE)
VGATEH High level output voltage No load Sourcing 1mA
(Note 12) 10 11 V
VGATEL Low level output voltage Sinking 1mA, (Note 13) 0.5 V
VGATECL High level GATE CLAMP voltage VIN = VAU X= VISM = 18V
IGATE = 1mA 12.8 15 V
IGATE Dynamic peak current available during
rise or fall of output voltage
Charging or discharging gate of
external switch with QG = 10nC and
400kHz ±300 mA
tSTALL Time to assert ‘STALL’ flag and
warning on STATUS output
(Note 14) GATE low or high 100 170 µs
LED Thermal control circuit (TADJ) parameters
VTADJH Upper threshold voltage Onset of output current reduction
(VTADJ falling) 560 625 690 mV
VTADJL Lower threshold voltage Output current reduced to <10% of
set value (VTADJ falling) 380 440 500 mV
ITADJ T
ADJ pin Input current VTADJ = 1.25V 1 µA
Notes: 10. In the event of more than one fault/warning condition occurring, the higher priority condition will take precedence.
For example ‘Excessive coil current’ and ‘Out of regulation’ occurring together will produce an output of 0.9V on the STATUS pin.
These STATUS pin voltages apply for an input voltage to VIN of 7.5V < VIN < 60V. Below 7.5V the STATUS pin voltage levels reduce and
therefore may not report the correct status. For 5.4V < VIN < 7.5V the flag pin still reports any error by going low. At low VIN in Boost and
Buck-boost modes an over-current status may be indicated when operating at high boost ratios – this due to the feedback loop increasing
the sense voltage.
For more information see the Application Information section about Flag/Status levels.
11. Flag is asserted if VSHP < 1.5V or VSHP > 2.5V
12. GATE is switched to the supply voltage VAUX for low values of VAUX (5V VAUX ~12V). For VAUX > 12V, GATE is clamped internally to prevent
it exceeding 15V.
13. GATE is switched to PGND by an NMOS transistor
14. If tON exceeds tSTALL, the device will force GATE low to turn off the external switch and then initiate a restart cycle. During this phase, ADJ is
grounded internally and the SHP pin is switched to its nominal operating voltage, before operation is allowed to resume. Restart cycles will be
repeated automatically until the operating conditions are such that normal operation can be sustained. If tOFF exceeds tSTALL, the switch will
remain off until normal operation is possible.
ZXLD1371
ZXLD1371
Document number: DS35436 Rev. 1 - 2 7 of 42
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Typical Characteristics
0
0.5
1
1.5
2
2.5
3
5 1015202530354045505560
SUPPL Y VOLTAGE (V)
Suppl y Volt age vs. S uppl y Curr ent
SUPPLY CURRENT (mA)
1.248
1.2485
1.249
1.2495
1.25
1.2505
1.251
1.2515
1.252
-40 -25 -10 5 20 35 50 65 80 95 110 125
JUNCTION TEMPERA TURE ( C)
Referenc e Voltag e vs. Junction Temp er at ure
°
REFERENCE V
O
LTA
G
E (V)
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
6121824303642485460
INP U T VOLTAGE (V)
Duty Cycle vs. Input Voltage
DUTY (%)
T=25°C
L=33µH
R=146m
Buck Mode
2 LEDs
A
S
Ω
ZXLD1371
ZXLD1371
Document number: DS35436 Rev. 1 - 2 8 of 42
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Typical Characteristics – Linear/DC Dimming
0
150
300
450
600
750
0
150
300
450
600
750
0 0.25 0.5 0.75 1 1.25
ADJ VOLTAGE ( V)
Led C ur re n t and Sw it ching Frequency v s .
ADJ Voltage in Bu ck M ode
LED CURRENT (mA)
SWITCHING FREQUENCY (kHz)
Switching
Frequency
T=25°C
V=V=12V
2 LEDs , L=33µH
R =300m
A
AUX IN
S
Ω
0
200
400
600
800
1000
1200
1400
0
100
200
300
400
500
600
700
0 0.25 0.5 0.75 1 1.25
ADJ VOLTAGE (V )
LED Cur r ent an d Swi tch ing Frequ ency vs.
ADJ Volta ge in Bu c k -B o os t Mode
LED CURRENT (mA)
SWITCHING FREQUENCY (kHz)
Switching
Frequency
T= 25°C
V= V= 24V
8 LEDs, L = 33µH
GI = 0.23, R = 300m
A
AUX IN
S
Ω
LED
Current
0
100
200
300
400
500
600
700
0
50
100
150
200
250
300
350
0 0.25 0.5 0.75 1 1.25
ADJ VOLTAGE (V)
LED Current and Switching Frequency vs.
ADJ Voltage in Bo o s t M ode
LED CURRENT (mA)
SWITCHING FREQUENCY (kHz)
Switching
Frequency I
LED
T=25°C
V=V=12V
12 LE D s , L= 3 3µH
GI=0.23, R =300 m
A
AUX IN
S
Ω
ZXLD1371
Document numbe
r
Typical
C
r
: DS35436 Rev. 1
C
haracteri
s
0
250
500
750
1000
1250
1500
0
LED CURRENT (mA)
0%
20%
40%
60%
80%
100%
0
LED CURRENT DIMMING FACTOR
- 2
s
tics – PW
M
I
LED
v
s
10 2
0
T = 25°C
A
V= V =
L = 33µH, R
IN
AUX
S
f= 100H
z
PWM
25
0
w
w
M
/Thermal
s
. Time - P
W
P
LED
C
0
30
4
24V
=150m
Ω
z
0
5
0
T
LED Current
A
9 of 42
w
w.diodes.com
Dimming
W
M Pin Tran
s
P
WM DUTY CYCL
E
C
urrent vs. PWM
D
4
050
0
0 PIN VOLTAGE
(
Dimming Factor v
s
A
DJ
A
Di
o
s
ient Respo
n
E
(%)
D
uty Cycle
60 70
750
(
mV)
s
. T V o ltage
A
DJ
A
Product Li
n
o
des Incorpo
r
n
se
I
LED
80 90
1000
ZX
Febr
u
© Diodes
n
e o
f
r
ated
100
1250
LD1371
u
ary 2012
Incorporated
ZXLD1371
ZXLD1371
Document number: DS35436 Rev. 1 - 2 10 of 42
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Typical Characteristics – Buck Mode – RS = 75m – L = 33µH – ILED = 2.9A
2.6
2.7
2.8
2.9
3.0
3.1
3.2
510152025303540
INP UT VOLTAGE (V)
LED CURRENT (A)
0
100
200
300
500
600
700
510152025303540
INPUT VOLTAGE (V)
1 LED 3 LEDs
2 LEDs
4 LEDs
SWITCHING FREQUENCY (kHz)
T = 25°C, V = V
L = 15µH, R = 75m
C = 100µF, V = 3.8V
AAUXIN
S
IN LED
Ω
4 LEDs
L = 22µH
400
51015202530 35 40
INPUT VOLTAGE (V)
0
100
300
500
600
700
EFFICIENCY (%)
400
ZXLD1371
ZXLD1371
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Typical Characteristics – Buck Mode – RS =150m - L = 33µH – ILED = 1.45A
0
100
200
300
600
700
LED
C
U
R
R
EN
T
(A)
400
510 15 2025 303540
INP UT VOLTAGE (V)
1 LED
10 20 25 30
1 ~ 16 LEDs
T = 25°C, V
L = 33µH, R = 150m
C = 100µF
AAUX,
S
IN
V=
IN
Ω
2 LEDs
3 LEDs
4 LEDs 6 LEDs
5 LEDs
8 LEDs 10 LEDs 16 LEDs
12 LEDs 14 LEDs
510 556015 20 25 30 45 5035 40
V (V)
IN
1000
900
100
0
800
700
300
200
600
500
400
SWIT
C
H
I
N
G F
R
E
Q
U
E
N
C
Y
(k
H
z)
5 1015202530354045505560
100
E
F
F
I
C
I
E
N
C
Y
(
%
)
V (V)
IN
95
90
85
80
75
70
65
60
3 LEDs
1 LED
5 LEDs
2 LEDs
4 LEDs 6 LEDs 8 LEDs 10 LEDs 14 LEDs 16 LEDs
12 LEDs
T = 25°C, V
L = 33µH, R = 150m
C = 100µF
AAUX,
S
IN
V=
IN
Ω
ZXLD1371
ZXLD1371
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Typical Characteristics – Boost Mode – ILED = 350mA – RS = 150m – GIRATIO = 0.23
58 44 5011 17 20 26 38 4129 32
V (V)
IN
14 23 35 47
0.45
0.40
0.20
0.15
0.35
0.25
0.30
L
E
D
C
U
R
R
E
N
T
(
A
)
510 455020 25 4030
V (V)
IN
15 35
800
700
100
0
500
300
400
S
WI
T
C
H
I
N
G
F
R
E
Q
U
E
N
C
Y
(k
H
z)
600
200
4 LEDs
T = 25°C,
L = 33µH, R = 150m ,
R9 = 120k , R10 = 36k
C = 100µF
A
S
IN
V = V
AUX IN
Ω
ΩΩ
6 LEDs 8 LEDs 10 LEDs 12 LEDs 14 LEDs 16 LEDs
100
E
FFI
C
I
E
N
C
Y
(
%
)
90
80
70
60
50
40
ZXLD1371
ZXLD1371
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Typical Characteristics – Boost Mode – ILED = 350mA – GIRATIO = 0.23 – Bootstrap comparison
6578109 111213141516171819 20
V (V)
IN
T = 25 C, L = 33µH
R = 150m , R9 = 120k
R10 = 36k , C = 100µF
A
S
IN
°
ΩΩ
Ω
0.25
0.27
0.29
0.33
0.31
0.35
0.37
0.39
0.41
0.43
0.45
LED
C
U
R
R
EN
T
(A)
8 LEDs
8 LEDs Bootstrap
65781091112131415 16 17 18 19 20
V (V)
IN
T = 25 C, L = 33µH
R = 150m , R9 = 120k
R10 = 36k , C = 100µF
A
S
IN
°
ΩΩ
Ω
8 LEDs Bootstrap
8 LEDs
0
50
100
150
200
250
300
350
400
450
500
SWI
T
C
H
IN
G
F
R
E
Q
U
EN
C
Y
(k
H
z)
65781091112131415 16 17 18 19 20
V (V)
IN
T = 25 C, L = 33µH
R = 150m , R9 = 120k
R10 = 36k , C = 100µF
A
S
IN
°
ΩΩ
Ω
8 LEDs Bootstrap
8 LEDs
40
50
60
70
80
90
100
E
F
F
I
C
IEN
C
Y
%
ZXLD1371
ZXLD1371
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Typical Characteristics – Boost Mode – ILED = 350mA – RS = 150m – GIRATIO = 0.23
6578109 11121314151617181920
V (V)
IN
L = 100µH
0.25
0.29
0.35
0.37
0.41
0.45
LED
C
U
R
R
EN
T
(A)
T = 25 C, V = V
8 LEDs, RS = 150m
R9 = 120k , R10 = 36k ,
C = 100µF
AAUXIN
IN
°
ΩΩ
Ω
L = 33µH
L = 68µH
0.43
0.39
0.33
0.31
0.27
65781091112131415 16 17 18 19 20
V (V)
IN
T = 25 C, V = V
8 LEDs, R = 150m ,
R9 = 120k , R10 = 36k ,
C = 100µF
AAUXIN
S
IN
°
Ω
ΩΩ
L = 33µH
0
50
100
150
200
250
300
350
400
450
500
SWITCHING FREQUEN CY (kHz)
L = 100µH
L = 68µH
6578109 111213141516171819
V (V)
IN
40
50
60
70
80
90
100
EFFICIE NCY %
L = 33µH
L = 100µH
L = 68µH
T = 25C, V = V
8 LEDs, R = 150m ,
R9 = 120k , R10 = 36k ,
C = 100µF
AAUXIN
S
IN
°
Ω
ΩΩ
ZXLD1371
ZXLD1371
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Typical Characteristics – Boost Mode – 8 LEDs – GIRATIO = 0.23
65781091112131415 16 17 18 19 20
V (V)
IN
I = 500mA
LED
I = 150mA
LED
0.10
0.20
0.30
0.40
0.50
0.60
LED
C
U
R
R
E
N
T
(A)
I = 350mA
LED
T = 25 C, V = V
8 LEDs, L = 33µH
R9 = 120k , R10 = 36k ,
C = 100µF
AAUXIN
IN
°
ΩΩ
65781091112131415 16 17 18 19 20
V (V)
IN
I = 150mA
LED
I = 500mA
LED
0
100
200
300
400
500
600
700
800
SWI
T
C
H
I
N
G
F
R
E
Q
U
E
N
C
Y
(k
H
z)
I = 350mA
LED
T = 25 C, V = V
8 LEDs, L = 33µH
R9 = 120k , R10 = 36k ,
C = 100µF
AAUXIN
IN
°
ΩΩ
65781091112131415 16 17 18 19 20
V (V)
IN
I = 150mA
LED
I = 500mA
LED
40
60
70
80
90
100
E
F
F
I
C
IEN
C
Y
(%)
I = 350mA
LED
T = 25 C, V = V
8 LEDs, L = 33µH
R9 = 120k , R10 = 36k ,
C = 100µF
AAUXIN
IN
°
ΩΩ
50
ZXLD1371
ZXLD1371
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Typical Characteristics – Buck-Boost Mode – RS = 150m - ILED = 350mA – GIRATIO = 0.23
5172014118
0.450
L
E
D
C
U
R
R
E
N
T
(
A
)
0.250
0.425
0.275
0.300
0.400
0.375
0.325
0.350
T = 25°C,
A
L = 33µH,
Rs = 150m R9 = 120k
R10 = 36k V = V
Ω, Ω,
Ω,
AUX IN
1 LED
2 LEDs 3 LEDs 4 LEDs
5 LEDs
6 LEDs
8 LEDs
9 LEDs
7 LEDs
58 172014
V (V)
I
N
900
800
100
0
500
300
400
SWIT
C
HIN
G
F
R
E
Q
UEN
C
Y
(kHz)
700
200
600
T = 25°C,
A
L = 33µH,
Rs = 150m R9 = 120k
R10 = 36k V = V
Ω, Ω,
Ω,
AUX IN
5172014118
90
EFFI
C
IEN
C
Y
%
40
85
45
80
50
75
55
70
60
65
1 LED
2 LEDs
3 LEDs
4 LEDs
5 LEDs
6 LEDs
7 LEDs
8 LEDs
9 LEDs
ZXLD1371
ZXLD1371
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Typical Characteristics – Buck-Boost Mode – RS = 150m - ILED = 350mA – GIRATIO = 0.23
6578109 1112131415161718
V (V)
IN
T = 25 C, L = 33µH
R = 150m , R9 = 120k
R10 = 36k
A
S
°
ΩΩ
Ω
0.25
0.27
0.29
0.33
0.31
0.35
0.37
0.39
0.41
0.43
0.4
5
LED
C
U
R
R
EN
T
(A)
5 LEDs
5 LEDs Bootstrap
56 9 14 15 1881216171310 117
SWI
T
C
H
IN
G
F
R
E
Q
U
EN
C
Y
(
k
H
z)
600
500
400
200
100
0
300
6578109 1112131415161718
V (V)
IN
90
EFFICIENCY %
5 LEDs Bootstrap
5 LEDs
T = 25 C, L = 33H
R = 150m , R9 = 120k ,
R10 = 36k , C = 100µF
A
S
IN
°
ΩΩ
Ω
85
80
50
45
40
75
70
65
60
55
ZXLD1371
ZXLD1371
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Typical Characteristics – Buck-Boost Mode – RS = 150m - ILED = 350mA – GIRATIO = 0.23
56 9 14 15 1881216171310 117
LED
C
U
R
R
E
N
T
(A )
0.450
0.425
0.400
0.375
0.325
0.300
0.275
0.250
0.350
L = 33µH
L = 68µH
T = 25°C, V = V ,
5 LEDs, R = 150m
C = 100µF
AINAUX
S
IN
Ω
Ω, Ω
R9 = 120k R10 = 36k
56 9 1415 1881216171310 117
0
100
200
300
400
500
L = 100µH
SWI
T
C
H
IN
G
F
R
E
Q
U
EN
C
Y
(
k
H
z)
600
L = 33µH T = 25°C, V = V ,
5 LEDs, R = 150m
C = 100µF
AINAUX
S
IN
Ω
Ω, Ω
R9 = 120k R10 = 36k
56 9 1415 1881216171310 117
90
E
F
F
I
C
IEN
C
Y
%
40
85
45
80
50
75
55
70
60
65
L = 100µH
L = 68µH
ZXLD1371
ZXLD1371
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Typical Characteristics – Buck-Boost Mode –5 LEDs GIRATIO = 0.23
I = 150mA
LED
I = 500mA
LED
I = 350mA
LED
T = 25°C, V = V , 5 LEDs
C = 100µF
AINAUX
IN
L = 33µH, R9 = 120k R10 = 36k
Ω, Ω
56 9 1415 1881216171310 117
0.60
LED
C
U
R
R
EN
T
(A)
0.10
0.55
0.15
0.50
0.20
0.45
0.25
0.40
0.30
0.35
I = 150mA
LED
I = 350mA
LED
T = 25°C, V = V , 5 LEDs,
L = 33 H,
C = 100µF
AINAUX
IN
µ R9 = 120k R10 = 36k
Ω, Ω
56 9 1415 1881216171310 117
0
100
200
300
400
500
600
700
800
900
1000
I = 500mA
LED
SWI
T
C
H
IN
G
F
R
E
Q
U
EN
C
Y
(
k
H
z)
I = 150mA
LED
I = 500mA
LED
I = 350mA
LED
T = 25°C, V = V , 5 LEDs
C = 100µF
AINAUX
IN
L = 33µH, R9 = 120k R10 = 36k
Ω, Ω
56 9 1415 1881216171310 117
90
EFFI
C
IE
N
C
Y
%
40
85
45
80
50
75
55
70
60
65
ZXLD1371
ZXLD1371
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Applications Information
The ZXLD1371 is a high accuracy hysteretic inductive buck/boost/buck-boost controller designed to be used with an
external NMOS switch for current-driving single or multiple series-connected LEDs. The device can be configured to
operate in buck, boost, or buck-boost modes by suitable configuration of the external components as shown in the
schematics shown in the device operation description.
DEVICE DESCRIPTION
a) Buck mode – the most simp le buck circuit is shown in Figu re 1
Control of the LED current buck mode is achieved by
sensing the coil current in th e sense resistor Rs, connecte d
between the two inputs of a current monitor within the
control loop block. An output from the control loop drives
the input of a comparator which drives the gate of the
external NMOS switch transistor Q1 via the internal Gate
Driver. When the switch is on, the drain voltage of Q1 is
near zero. Current flows from VIN, via Rs, LED, coil and
switch to ground. This current ramps up until an upper
threshold value is reached (see Figure 2). At this point
GATE goes low, the switch is turned off and the drain
voltage increases to VIN plus the forward voltage, VF, of the
schottky diode D1. Current flows via Rs, LED, coil and D1
back to VIN. When the coil current has ramped down to a
lower threshold value, GATE goes high, the switch is
turned on again and the cycle of events repeats, resulting
in continuous oscillation. The feedback loop adjusts the
NMOS switch duty cycle to stabilize the LED current in
response to changes in external conditions, including input
voltage and load voltage.
Figure 1. Buck configuration
The average current in the sense resistor, LED and coil is
equal to the average of the maximum and minimum
threshold currents. The ripple current (hysteresis) is equal
to the difference between the thresholds. The control loop
maintains the average LED current at the set level by
adjusting the switch duty cycle continuously to force the
average sense resistor current to the value demanded by
the voltage on the ADJ pin. This minimizes variation in
output current with changes in operating co nditions.
The control loop also regulates the switching frequency by
varying the level of hysteresis . The hysteres is has a defined
minimum (typ 5%) and a maximum (typ 30%). The
frequency may deviate from nominal in some conditions.
This depends upon the desired LED current, the coil
inductance and the voltages at the input and the load. Loop
compensation is achieved b y a single external capacitor C2,
connected between SHP and SGND.
The control loop sets the duty cycle so that the sense
voltage is
VSENSE= 0.218VADJ
VREF
Therefore,
I
LED= 0.218
RSVADJ
VREF (Buck mode)
Equation 1
If the ADJ pin is connected to the REF pin, this simplifies to
ILED= 0.218
RS (Buck mode).
Figure 2. Operating waveforms (Buck mode)
GATE
voltage
+11V to
15V typ.
0V
Q1
Drain
voltage
VIN + VF
0V
Coil &
LED
current
0A
IPK
Sense
voltage
VIN -V
ISM Mean = 218mV
tOFF tON
ZXLD1371
ZXLD1371
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Applications Information (cont.)
b) Boost and Buck-Boost modes – the most simple boost/buck-boost circuit is shown in Figure 3
Control in Boost and Buck-boost mode is achieved by
sensing the coi l current in the series resistor Rs, connected
between the two inputs of a current monitor within the
control loop block. An output from the control loop drives
the input of a comparator which drives the gate of the
external NMOS switch transistor Q1 via the internal Gate
Driver. When the switch is on, the drain voltage of Q1 is
near zero. Current flows from VIN, via Rs, coil and switch
to ground. This current ramps up until an upper threshold
value is reached (see Figure 4). At this point GATE goes
low, the switch is turned off and the drain voltage i ncreases
to either:
1) the load voltage VLEDS plus the forward
voltage of D1 in Boost configuration,
or 2) the load voltage VLE DS p lus the forward voltage
of D1 plus VIN in Buck-boost configuration.
Current flows via Rs, coil, D1 and LED back to VIN (Buck-
boost mode), or GND (Boost mode). When the coi l current
has ramped down to a lower threshold value, GATE goes
high, the switch is turned on again and the cycle of events
repeats, resulting in continuous oscillation.
Figure 3. Boost and Buck-boost configuration
The feeback loop adjusts the NMOS switch duty cycle to
stabilize the LED current in respons e to chan ges in e xternal
conditions, including input voltage and load voltage. Loop
compensation is achieved by a single external capacitor
C2, connected between SHP and SGND. Note that in
reality, a load capacitor COUT is used, so that the LED
current waveform shown is smoothed.
The average current in the sense resistor and coil, IRS, is
equal to the average of the maximum and minimum
threshold currents and the ripple current (hysteresis) is
equal to the difference between the thresholds.
The average current in the LED, ILED, is always less than
IRS. The feedback control loop adjusts the switch duty
cycle, D, to achieve a set point at the sense resistor. This
controls IRS. During the interval tOFF, the coil current flows
through D1 and the LED load. During tON, the coil current
flows through Q1, not the LEDs. Therefore the set point is
modified by D using a gating function to control ILED
indirectly. In order to com pensate internally for the effect of
the gating function, a control factor, GI_ADJ is used.
GI_ADJ is set by a pair of external resistors, RGI1 and RGI2.
(Figure 3.) This allows the sense volt age to be a djusted to
an optimum level for power efficiency without significant
error in the LED controlled current.
GI_ADJ = RGI1
RGI1 +RGI2 Equation 2
(Boost and Buck-boost modes)
The control loop sets the duty cycle so that the sense
resistor current is
I
RS= 0.225
RS GI_ADJ
1-D VADJ
VREF Equation 3
(Boost and Buck-boost modes)
Figure 4. Operating waveforms (Boos t and
Buck-boost modes)
IRS equals the coil current. The coil is connected onl y to the switch and the sc hottky dio de. T he schott ky diode p asses the
LED current. Therefore the average LED current is the coil current multiplied by the schottky diode duty cycle, 1-D.
ZXLD1371
ZXLD1371
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Applications Information (cont.)
I
LED = IRS 1-D = 0.225
RS GI_ADJ VADJ
VREF (Boost and Buck-boost) Equation 4
This shows that the LED current depends on the ADJ pin voltage, the reference voltage and 3 resistor values (RS, RGI1
and RGI2). It is independent of the input and output voltages.
If the ADJ pin is connected to the REF pin, this simplifies to
I
LED = 0.225
RS GI_ADJ (Boost and Buck-boost)
Now ILED is dependent only on the 3 resistor values.
Considering power diss ipation and accur acy, it is useful to k no w how the mean s ense volt age v aries with inp ut voltage a nd
other parameters.
VRS= IRS RS = 0.225 GI_ADJ
1-D VADJ
VREF (Boost and Buck-boost) Equation 5
This shows that the sense voltage varies with duty cycle in Boost and Buck-boost configurations.
ZXLD1371
ZXLD1371
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Applications Information (cont.)
APPLICATION CIRCUIT DESIGN
External component selection is driven by the characteristics of the load and the input supply, since this will determine the
kind of topology being used for the system. Component selection begins with the current setting procedure, the
inductor/frequency setting and the MOSFET selection. Finally after selecting the freewheeling diode and the output
capacitor (if needed), the application section will cover the PWM dimming and thermal feedback. The full procedure is
greatly accelerated by the web Calculator spreadsheet, which includes fully automated component selection, and is
available on the Diodes web site. However the full calculation is also given here.
Please note the follo wing part icular featur e o f the web Calc ulator. The GI ratio can be s et for Automatic calcul ation, or it can
be fixed at a chosen value. When optimizing a design, it is best first to optimize for the chosen voltage range of most
interest, using the Automatic setting. In order to subsequentl y evaluate performance of the circu it over a wider input voltag e
range, fix the GI ratio in the Calculator inpu t field, and then set the desired input voltage range.
Some components depend upon the switching frequency and the duty cycle. The switching frequency is regulated by the
ZXLD1371 to a large extent, depending upon conditions. This is discussed in a later paragraph dealing with coil selection.
Duty Cycle Calculation and Topology Selection
The duty cycle is a function of the input and output voltages. Approximately, the MOSFET switching duty cycle is
D
BUCK VOUT
VIN for Buck
D
BOOST VOUT - VIN
VOUT for Boost
D
BB VOUT
VOUT + VIN for Buck-Boost
Equation 6
Because D must always be a positive number less than 1, these equations show that
V
OUT < VIN for Buck (voltage step-down)
V
OUT > VIN for Boost (voltage step-up)
V
OUT > or = or < VIN for Buck-boost (voltage step-down or step-up)
This allows us to select the topology for the required voltage range.
More exact equations are used in the web Calcu lator. These are:
D
BUCK = VOUT + VF + IOUTRS+RCOIL
VIN + VF - VDSON for Buck
D
BOOST = VOUT - VIN + IINRS+RCOIL + VF
VOUT + VF - VDSON for Boost
D
BB = VOUT + VF + IIN+IOUTRS+RCOIL
V
OU
T + VIN + VF - VD
SO
N for Buck-boost
Equation 7
where VF = schottky diode forward voltage, estimated f or the expected coil current, ICOIL
V
DSON = MOSFET drain source voltage in the ON condition (dependent on RDSON and drain current = ICOIL)
R
COIL = DC winding resistance of L1
ZXLD1371
ZXLD1371
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Applications Information (cont.)
The additional terms are relatively small, so the exact equations will only make a significant difference at lower operating
voltages at the input and outp ut, i.e. low input voltage or a small number of LEDs connected in series. The estimates o f VF
and VDSON depend on the coil current. The mean coil current, ICOIL depend s upon the topology and upon the mean term inal
currents as follows:
I
COIL = ILED for Buck
I
COIL = IIN for Boost
I
COIL = IIN + ILED for Buck-boost Equation 8
ILED is the target LED current and is already known. IIN will be calculated with some accuracy later, but can be estimated
now from the electrical power efficiency. If the expected efficiency is roughly 90%, the output power POUT is 90% of the
input power, PIN, and the coil current is estimated as follows.
P
OUT 0.9 PIN
or
I
LED N VLED 0.9 IIN VIN
where N is the number of LEDs connected in series, and VLED is the forward voltage drop of a single LED at ILED.
So IIN ILED N VLED
0.9 VIN Equation 9
Equation 9 can now be used to find ICOIL in Equation 8, which can then be used to estimate the sma ll terms in Equation 7.
This completes the calculation of Duty Cycle and the selection of Buck, Boost or Buck-boost topology.
An initial estimate of duty cycle is required before we can choose a coil. In Equation 7, the following approximations are
recommended:
V
F = 0.5V
I
IN × (RS+RCOIL) = 0.5V
I
OUT × (RS+RCOIL) = 0.5V
V
DSON = 0.1V
(IIN+IOUT)(RS+RCOIL) = 1.1V
Then Equation 7 becomes
D
BUCK VOUT + 1
VIN + 0.4 for Buck
D
BOOST VOUT - VIN + 1
VOUT + 0.4 for Boost
D
BB VOUT + 1.6
V
OU
T + VIN + 0.4 for Buck-boost
Equation 7a
Setting the LED Current
The LED current requirement determines the choic e of the sense resistor R s. This also depends o n the voltage on the A DJ
pin and the voltage on the GI pin, according to the topolog y required.
The ADJ pin may be connected directly to the internal 1.25V referenc e (VREF) to define the nominal 10 0% LED current. T he
ADJ pin can also b e driven with an external dc voltage between 125mV and 1.25V to adjust the LED current proporti onally
between 10% and 100 % of the nominal value.
For a divider ratio GI_ADJ greater than 0.65V, the Z XLD1371 operates i n Buck mode when VADJ = 1.25V. If GI_ADJ is less
than 0.65V (typical), the device operates in Boost or buck-Boost mode, according to the load connection. This 0.65V
threshold varies in proportion to VADJ, i.e., the Buck mode t hresh old voltage is 0.65 VADj /1.25 V.
ADJ and GI are high impedance inputs within their normal operating voltage ranges. An internal 1.3V clamp protects the
device against excessive input voltage and limits the maximum output current to approximately 4% above the maximum
current set by VREF if the maximum input voltage is exceeded.
ZXLD1371
ZXLD1371
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Buck topology
In Buck mode, GI is connected to ADJ as in Figure 5. The LED
current depends only upon RS, VADJ and VREF. From Equation 1
above,
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
=V
V
I218.0
RREF
ADJ
LED
SBUCK Equation 10
If ADJ is directly connected to VREF, this becomes:
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
=I218.0
RLED
SBUCK
Figure 5. Setting LED Current in Buck
Configuration
Boost and Buck-boost topology
For Boost and Buck-boost topologies, the LED current depends
upon the resistors, RS, RGI1, and RGI2 as in Equations 4 and 2
above. There is more th an one degree of freedom. That is to say,
there is not a unique solution. From Equation 4,
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
=I225.0
RLED
SBoostBB ⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
V
V
ADJ_GI REF
ADJ Equation 11
If ADJ is connected to REF, this becomes
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
=I225.0
RLED
SBoostBB ADJ_GI
GI_ADJ is given by Equation 2, repeated here for convenience:
⎟
⎠
⎞
⎜
⎝
⎛
+
=2RGI1RGI 1RGI
ADJ_GI
Figure 6. Setting LED current in Boost and
Buck-boost configurations
Note that from consi derations of ZXLD1371 input bias current, the recommended limits for RGI1 are:
22k < RGI1 < 100k Equation 12
The additional degree of freedom allows us to select GI_ADJ within limits but this may affect overall performance a little.
As mentioned above, the working voltage range at the GI pin is restricted. The permitted range of GI_ADJ in Boost or
Buck-boost configuration is 0.2 < GI_ADJ < 0.5 Equation 13
The mean voltage across the sense resistor is
VRS = ICOIL RS Equation 14
Note that if GI_ADJ is made larger, these equations show that RS is increased and VRS is increased. Therefore, for the
same coil current, the dissipation in RS is increased. So, in some cases, it is better to minimize GI_ADJ. However,
consider Equation 5. If ADJ is connected to REF, this becomes
225.0
VRS
=
⎟
⎠
⎞
⎜
⎝
⎛
−D1 ADJ_GI
This shows that VRS becomes smaller than 225mV if GI_ADJ < 1 - D. If also D is small, VRS can become too small. For
example if D = 0.2, and GI_ADJ is the minimum value of 0.2, then VRS becomes 0.225* 0.2 / 0.8 = 56.25 mV. This will
increase the LED current error due to small offsets in the system, such as mV drop in the copper printed wiring circuit, or
offset uncertainty in the ZXLD1371. If now, GI_ADJ is increased to 0.4 or 0.5, VRS is increased to a value greater than
100mV.
ZXLD1371
ZXLD1371
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This will give sm all enough I LED error for most practical purposes. S atisfact ory operatio n will be obt ained if VRS is more than
about 80mV. This means GI_ADJ should be greater than (1-DMIN) * 80/225 = (1- DMIN) * 0.355.
There is also a maximum limit on VRS which gives a maximum limit for GI_ADJ. If VRS exceeds approximately 300mV, or
133% of 225mV, the STATUS output may indicate an over-current condition. This will happen for larger DMAX. Therefore,
together with the requirement of Equation 13, the recommended range for GI_ADJ is
0.355 ( 1-DMIN) < GI_ADJ < 1.33 ( 1-DMAX ) Equation 15
An optimum compromise for GI_ADJ has be en suggested, i.e.
GI_ADJAUTO = 1 - DMAX Equation 16
This value has bee n used for the “Aut omatic” setting of the web Calculator . If 1-D MAX is less than 0. 2, then GI_ADJ is set to
0.2. If 1- DMAX is greater than 0.5 then GI_ADJ is set to 0.5.
Once GI_ADJ has been select ed, a value of RGI1 can be selected from Equation 12. Then RGI2 is calculated as foll ows,
rearranging Equation 2:
R
GI2 = RGI1 1-GI_ADJ
GI_ADJ Equation 17
For example to drive 12 LEDS at a current of 350mA from a 12V supply requires Boost configuration. Each LED has a
forward voltage of 3.2V at 350mA, so Vout = 3.2*12 = 38.4V. From Equatio n 6, the duty cycle is appr oximately
VOUT-VIN
VOUT = 38.4-12
38.4 = 0.6875
From Equation 16, we set GI_ADJ to 1 – D = 0.3125.
IF RGI1 = 33k, then fr om Equation 17, RGI2 = 33000 * ( 1 -0.3125 ) / 0.3125 = 72.6k. Let us choose the preferred value
RGI2 = 75k. Now GI_ADJ is adjusted to the new value, using Equation 2.
GI_ADJ = RGI1
RGI1 +RGI2 = 33k
33k +75k =0.305
Now we calculate Rs from Equation 11. Assume ADJ is connected to REF.
RSBoostBB = 0.225
ILED GI_ADJVADJ
VREF = 0.225
0.35 * 0.305 = 0.196
A preferred value of RSBoostBB = 0.2 will give the desired LED current with an error of 2% due to the preferred value
selection.
Table 1 shows typical res ist or values used to determine the GI_ADJ ratio with E24 series resist ors.
Table 1
GI ratio RGI1 RG2
0.2 30kΩ 120kΩ
0.25 33kΩ 100kΩ
0.3 39kΩ 91kΩ
0.35 30kΩ 56kΩ
0.4 100kΩ 150kΩ
0.45 51kΩ 62kΩ
0.5 30kΩ 30kΩ
This completes the LED current setting.
ZXLD1371
ZXLD1371
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Inductor Selection and frequency Control
The selection o f the inductor coil, L1, requires knowledge of the switching frequenc y and current ripple, and also depe nds on
the duty cycle to some extent. In the hysteretic converter, the frequency depends upon the input and output voltages and
the switching thresholds of the current monitor. The peak-to-peak coil current is adjusted by the ZXLD1371 to control the
frequency t o a fixe d value. T his is don e by cont rolling t he s witching t hresholds within p art icular limits. This ef fectivel y m uch
reduces the overall frequency range for a given input voltage range. Where the input voltage range is not excessive, the
frequency is regul ated to approximate ly 390kHz. This is hel pful in terms of EMC and othe r system requirements. Figure 7
shows practical results of switching frequency driving 8 LED s at 350mA.
Figure 7. Frequency vs. VIN for Boos t LED Driver with
350mA LED Current and Various Indu ctor Values
For larger input voltage vari ation, or when the choic e of coil inductance is not optimum, the switching f requency may depart
from the regulated valu e, but t he regulat ion o f LED current remai ns succes sful. If desired, t he freque nc y can to some e xten t
be increased by using a smaller inductor, or decreased using a larger inductor. The web Calculator will evaluate the
frequency across t he input voltage range and the effect of this upon power efficiency and junction t emperatures.
Determination of the input voltage range for which the frequency is regulated may be required. This calculation is very
involved, and is not given her e. Ho wever the performa nce in this res pect can b e evaluat ed within the web Calculat or for the
chosen inductance.
The inductance is give n as follows in terms of peak-to-peak ripple current in the coil, IL and the MOSFET on t ime, tON.
L1 = VIN - N VLED - IOUT RDSON + RCOIL + RS tON
IL for Buck
L1 = VIN - IINRDSON + RCOIL + RS tON
IL for Boost
L1 = VIN - (IIN + IOUT ) RDSON + RCOIL + RS tON
IL for Buck-boost
Equation 18
Therefore In order to calculate L1, we need to find IIN, tON, and IL. The effects of the resistances are small and will be
estimated.
IIN is estimated from Equation 9.
tON is related to switching frequency, f, and duty cycle, D, as follows:
t
ON = D
f Equation 19
As the regulated frequency is known, and we have alread y found D from Equation 7 or the approximation Equation 7b, this
allows calculation of tON.
65781091112131415 16 17 18 19 20
V (V)
IN
T = 25 C, V = V
8 LEDs, R = 150m ,
R9 = 120k , R10 = 36k ,
C = 100µF
AAUXIN
S
IN
°
Ω
ΩΩ
L = 33µH
0
50
100
150
200
250
300
350
400
450
500
SWITCHING FREQUENCY (kHz)
L = 100µH
L = 68µH
ZXLD1371
ZXLD1371
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The ZXLD1371 set s the ripple current, IL, to bet ween nom inally 10 % and 30% of the m ean coil current , ICOIL, which is found
from Equation 8. The device adjusts the ripple current within this range in order to regulate the switching frequency. We
therefore need to use a IL value of 20% of ICOIL to find an inductance which is optimized for the input voltage range. The
range of ripple current control is also modulated by other circuit parameters as follows.
ILMAX = 0.06 +0.24VADJ
VREF 1-D
GI_ADJ ICOIL
ILMIN = 0.02 +0.08VADJ
VREF 1-D
GI
_
ADJ ICOIL Equation 20
ILMID = 0.04 +0.16VADJ
VREF 1-D
GI_ADJ ICOIL
If ADJ is connected to REF, this simplifies to
ILMAX = 0.3 1-D
GI_ADJ ICOIL
ILMIN = 0.1 1-D
GI
_
ADJ ICOIL Equation 20a
ILMID = 0.2 1-D
GI_ADJ ICOIL
where ILMID is the value we must use in Equation 18. We have now established the inductance value.
The chosen coil should sat urate at a current great er than the peak sens ed current. This saturation current is the DC current
for which the inductance has decreased by 10% compared to the lo w current value.
Assuming ±10% ripple current, we can find this peak current from Equation 8, adjusted for ripple current:
I
COILPEAK = 1.1 ILED for Buck
I
COILPEAK = 1.1 IINMAX for Boost Equation 21
I
COILPEAK = 1.1 IINMAX + ILED for Buck-boost
where IINMAX is the value of IIN at minimum VIN.
The mean current rating is also a factor, but normally the saturation current is the limiting fact or.
The following websites may be useful in finding suitable components
www.coilcraft.com
www.niccomp.com
www.wuerth-elektronik.de
MOSFET Selection
The ZXLD1371 requires an external NMOS FET as the main power switch with a voltage rating at least 15% higher than
the maximum circuit voltage to ensure safe operation during the overshoot and ringing of the switch node. The current
rating is recommend ed to be at least 10% higher th an the average transist or current. The power rating is then verifi ed by
calculating the resistive and switchin g power losses.
Resistive power losses
The resistive power losses are calculated using the RMS t ransistor current and the MOSFET on-resistance.
Calculate the current f or t he different topol ogies as follows:
Buck mode
Boost / Buck-boost mode
switching
P
resistive
PP +=
LED
I
MOSFETMAX
I=
MAX
D1 LED
I
MOSFETMAX
I−
=
ZXLD1371
ZXLD1371
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During the on-time, the MOSFET switch current is equal to the coil current. The rms MOSFET current is ICOIL D where
ICOIL is the mean coil current. T herefore the appro x imate RMS current in the MOSFET during tON is:
Buck mode
Boost / Buck-boost mode
The resistive power dissipation of the MOSFET is:
Switching power losses
Calculating the switching MOSFET's switching loss depends on many factors that influence both turn-on and turn-off.
Using a first order rough approximation, the switching power dissipation of the MOSFET is:
where
CRSS is the MOSFET's reverse-transfer capacitance (a data sheet parameter),
fSW is the switching frequency,
IGATE is the MOSFET gate-driver's sink/source current at the MOSFET's turn-on threshold.
Matching the MOSFET with the controller i s primarily based on the rise and fall t ime of the gate voltage. The best rise/fall
time in the application is based on many requirements, suc h as EMI (conducted and radiated), switching losses, lead/circuit
inductance, switching frequency, etc. How fast a MOSFET can be turned on and off is related to how fast the gate
capacitance of the MOSFET can be charged and discharged. The relationship between C (and the relative total gate
charge Qg), turn-on/turn- of f time and the MOSF ET driver current rating can be writt en as:
where
dt = turn-on/turn-off time
dV = gate voltage
C = gate capacitance = Qg/V
I = drive current – constant current source (for the given voltage value)
Here the constant current source” I ” usually is approximat ed with the peak drive curre nt at a given driver input voltage.
Example 1)
Using the DMN6068 MOSFET (VDS(MAX) = 60V, ID(MAX) = 8.5A):
Æ QG = 10.3nC at VGS = 10V
ZXLD1371 IPEAK = I GATE = 300mA
Assuming that cumulatively the rise time and fall time can account for a maximum of 10% of the period, the maximum
frequency allowed in this condition is:
tPERIOD = 20*dt Æ f = 1/ tPERIOD = 1.43MHz
This frequency is well above the max frequency the device can handle, therefore the DNM6068 can be used with the
ZXLD1371 in the whole spectrum of fr equencies recommended for the device (from 300kHz to 1MHz).
DII LEDMOSFETRMS =
LEDMOSFETRMS Ix
D1 D
I−
=
)ON(DS
Rx
2
MOSFETRMS
I
resistive
P=
GATE
ILOAD
Ix
sw
fx
IN
2
Vx
RSS
C
switching
P=
I
Qg
ICdV
dt =
⋅
=
ns35
mA300 nC3.10
PEAK
Ig
Q
dt ===
ZXLD1371
ZXLD1371
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Example 2)
Using the ZXMN6A09K (VDS(MAX) = 60V, ID(MAX) = 12. 2A):
Æ QG = 29nC at VGS = 10V
ZXLD1371 IPEAK = 300mA
Assuming that cumulatively the rise time and fall time can account for a maximum of 10% of the period, the maximum
frequency allowed in this condition is:
tPERIOD = 20*dt Æ f = 1/ tPERIOD = 515kHz
This frequency is within the recommended frequency range the device can handle, therefore the ZXMN6A09K is
recommended to be used with the ZXLD1371 for f r equencies from 300kHz t o 500kHz).
The recommended total gate charge for the MOSFET used in conjunction with the ZXLD1371 is less than 30nC.
Junction Temperature Estimation
Finally, the Z X LD1371 junction temperature can be estimated using the following equations:
Total supply current of ZXLD1371:
IQTOT IQ + f • QG
Where IQ = total quiescent current IQ-IN + IQ-AUX
Power consumed by ZXLD1371
PIC = VIN • (IQ + f • Qg)
Or in case of separate voltage supply, with VAUX < 15V
PIC = VIN • IQ-IN + Vaux • (IQ-AUX + f • Qg)
TJ = T A + PIC • θJA =
TA + PIC • (θJC + θCA)
Where the total quiescent current IQTOT consists of the static supply current (IQ) and the current required to charge and
discharge the gate of the power MOSFET. Moreover the part of thermal resistance between case and ambient depends on
the PCB characteristics.
Figure 8. Power derating curve for ZXLD13 70
mounted on test board according to JESD51
ns97
mA300nC29
PEAK
Ig
Q
dt ===
0
0.5
1
1.5
2
2.5
-40 -25 -10 5 20 35 50 65 80 95 110 125
AMBIENT TEMPERA TURE (°C)
P
O
WE
R
DISSIPATI
O
N (mW)
ZXLD1371
ZXLD1371
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Diodes Selection
For maximum efficiency and performance, the rectifier (D1) should be a fast low capacitance Schottky diode* with low
reverse leakage at the maximum operating voltage and temperature. The Schottky diode also provides better efficiency
than silicon PN diodes, due to a combination of lower forward voltage and reduced recovery time.
It is important to select parts with a peak current rating above the peak coil current and a continuous current rating higher
than the maximum output load current. In particular, it is recommended to have a voltage rating at least 15% higher than
the maximum transistor voltage to ensur e safe operation during the ringing of the switch node and a current rating at least
10% higher than the average diode current. The power rating is verified by calculating the power loss through t he diode.
The higher forward voltage and overshoot due to reverse recovery time in silicon diodes will increase the peak voltage on
the Drain of the external MOSFET. If a silicon di ode is us ed, care shou ld be taken to en sure that the total voltage app eari ng
on the Drain of t he external MOSFET, includi ng supply ripple, does not exceed the specified maximum value.
*A suitable Schottky diode for a switching current of up to about 1.5A would be PDS3100 ( Diodes Inc).
Output Capacitor
An output capacitor may be required to limit interference or for specific EMC purposes. For boost and buck-boost
regulators, the output capacitor provides energy to the load when the freewheeling diode is reverse biased during the first
switching subinterval. An output capacitor in a buck topology will simply reduce the LED current ripple below the inductor
current ripple. In other words, this capacit or changes the current waveform through the LED(s) fr om a triangular ramp to a
more sinusoidal version without altering the mean current value.
In all cases, the outp ut capacitor is chosen to provide a desired curr ent ripple of the LED current (usu ally recommended to
be less than 40% of the avera ge LED current).
Buck:
Boost and Buck-boost
PPLEDLEDSW
PPL
OUTPUT Ixrxf IxD
C
−
−
Δ
Δ
=
where:
• ΔIL-PP is the ripple of the inductor current , usually ± 20% of the average sensed curr ent
• ΔILED-PP is the ripple of the LED current , it should be <40% of the LEDs average current
• f
sw is the switching frequency (From graphs and calculator)
• r
LED is the dynamic resistance of the LEDs string (n times the dynamic resistance of the single LED from the
datasheet of the LED ma nufacturer).
The output capacitor sho uld be chosen to account for derati ng due to temperature a nd operating voltag e. It must also hav e
the necessary RMS current rat ing. The minimum RMS current for t he output capacitor is calcul ated as follows:
Buck
Boost and Buck-boost
Ceramic capacitors with X7R dielectric are the best choice due to their high ripple current rating, long lifetime, and
performance over the voltage and temperature ranges.
PPLEDLEDSW
PPL
OUTPUT Ixrxfx8 I
C−
−
Δ
Δ
=
12
I
IPPLED
RMS
COUTPUT −
=
MAX
MAX
LEDCOUTPUTRMS D1D
II −
=
ZXLD1371
ZXLD1371
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Input Capacitor
The input capacitor can be calculated knowing the input volt age ripple ΔVIN-PP as follows:
Buck
Use D = 0.5 as worst case
Boost
Buck-boost
Use D = DMAX as worst case
The minimum RMS current for t he output capacitor is calculat ed as follows:
Buck
use D=0.5 as worst case
Boost
Buck-boost
Use D=DMAX as worst case
LED Current Dimmi ng
The ZXLD1371 has 3 dimmi ng methods for reducing t he average LED current
1. DC dimming using the ADJ pi n
2. PWM dimming using the PWM pin
3. DC dimming for thermal prote c tion using the TADJ pin.
DC Dimming
The ZXLD1371 has a clamp on the ADJ pin to prevent over-driving of the LED current which results in the maximum
voltage being applied to internal circuitry is the reference voltage. This provides a 10:1 dynamic range of dc LED current
adjustment.
The equation for DC dimming of the LED current is approximately:
ILED_DIM=ILED_NOM VADJ
VREF
Where
ILED_DIM is the dimmed LED current
ILED_NOM is the LED current with V ADJ = 1.25V
One consequence of DC dimming is that as the ADJ pin
voltage is reduced the sense voltage will also be reduced
which has an impact on accuracy and switching frequenc y
especially at lower ADJ pin voltages.
Figure 9. LED Current and switching frequency vs.
ADJ Voltage
PPINSW
LED
IN Vxf Ix)D1(xD
C−
Δ
−
=
PPINSW
PPL
IN Vxfx8 I
C−
−
Δ
Δ
=
PPIN
Vx
SW
fLED
IxD
IN
C−
Δ
=
)D1(DxxII LEDRMSCIN −=
−
12
I
IPPL
RMS
CIN −
−=
)D1( D
xII LEDRMSCIN −
=
−
0
150
300
450
600
750
0
150
300
450
600
750
0 0.25 0.5 0.75 1 1.25
ADJ VOL TAGE (V)
LED CURRENT (mA)
SWITCHING FREQUENCY (kHz)
Switching
Frequency
T=25°C
V=V=12V
2 LEDs
L=33µH
R=300m
A
AUX IN
S
Ω
ZXLD1371
ZXLD1371
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PWM Output Current Control & Dim m i ng
The ZXLD1371 has a ded icated PWM dimming input that a llows a wide dimming frequen cy range from 100Hz to 1kHz with
up to 1000:1 resolution; however higher dimming frequencies can be used – at the expense of dimming dynamic range and
accuracy.
Typically, for a PWM frequency of 1kHz, the error on the current linearity is lower than 5%; in particular the accuracy is
better than 1% for PWM fr om 5% to 100 %. This is shown in the grap h below:
Figure 10. LED Current Linearity and Accu racy with PWM Dimming at 1kHz
For a PWM frequenc y of 1 00Hz, the error on the current li nearit y is lo wer than 2.5 %; it becomes negligi ble for PWM greater
than 5%. This is shown in the graph below:
Figure 11. LED Current Linearity and Accuracy with PWM Dimming at 100Hz
The PWM pin is designed to be driven by both 3.3V and 5V logic levels and as such doesn’t require open collector/drain
drive. It can also be dr iven by an open drain/collect or transist or. In this case the d esigner can eith er use the int ernal pull -up
network or an external pull-up network in order to speed-up PWM tr ansitions, as shown in the Boost/ Buck-Boost section.
Buck mode - L=33uH - Rs = 150m - P WM @ 1k H z
0.00
250.00
500.00
750.00
1000.00
1250.00
1500.00
0102030405060708090100
PWM
LED current [mA]
0%
1%
2%
3%
4%
5%
6%
7%
8%
9%
10%
Error
PWM @ 1kH z Error
Buck mode - L=33uH - Rs = 150m - PWM @ 100Hz
0.00
250.00
500.00
750.00
1000.00
1250.00
1500.00
0102030405060708090100
PWM
LED current [mA]
0%
1%
2%
3%
4%
5%
6%
7%
8%
9%
10%
Erro r
PWM @ 100H z Error
ZXLD1371
ZXLD1371
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LED current can be adjusted digitally, by applying a low
frequency PWM logic signal to the PWM pin to turn the
controller on and off. This will produce an average output
current proportion al to the duty c ycle of the cont rol signal.
During PWM operation, the device remains powered up
and only the output switch is gated by the control signal.
The PWM signal can achieve very high LED current
resolution. In fact, dimming down from 100% to 0, a
minimum pulse width of 2µs can be achieved resulting in
very high accuracy. While the maximum recommended
pulse is for the PWM signal is10ms.
Figure 12. PWM Dimming Minimum and
Maximum Pulse
The device can be put i n standb y by taking t he PW M pin to groun d, or pull ing it to a vo lta ge belo w 0.4V with a su itabl e open
collector NPN or open drain NMOS transistor, for a time exceeding 15ms (nominal). In the shutdown state, most of the
circuitry inside the device is switched off and residual quiescent current will be typically 90µA. In particular, the Status pin
will go down to GND while the FLAG and REF pins will stay at their nominal values.
Figure 13. Stand-by State From PWM Signal
Thermal Control of LED Current
For thermal control of the LEDs, the ZXLD1371 monitors the voltage on the TADJ pin and reduces output current if the
voltage on this pin falls b elo w 625mV. An external NTC ther mistor and res istor can theref ore be connect ed as sho wn belo w
to set the voltage on th e TADJ pin to 625mV at the required temperature threshold. This will give 100% LED current belo w
the threshold temperature and a falling current above it as shown in the graph. The temp erature threshold can be alter ed by
adjusting the value of Rth and/or the thermist or to suit the requirements of t he chosen LED.
The Thermal Control feature can be disa bled by connecting TADJ directly to REF.
Here is a simple procedur e to design the thermal feedback circuit:
1) Select the temperature threshold Tthreshold at which the current must start to decrease
2) Select the Thermistor TH1 (both resistive value at 25˚C and beta)
3) Select the value of the resistor Rth as Rth = TH at Tthreshold
PWM
0V
< 10 m s
0V
2µs
Gate < 10 ms
2
µs
ZXLD1371
ZXLD1371
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Applications Information (cont.)
Figure 14. Thermal Feedback Net work
The thermistor resistance, RT, at a temperature of T degrees Kelvin is given by
R
T= RR eB1
T - 1
TR
Where
R
R is the thermistor resistance at the referenc e temperature, TR
T
R is the reference temperature, in Kelvin, normally 273 + 25 = 298K (25°C)
B is the “beta” value of the thermistor.
For example,
1) Temperature threshold T threshold = 273 + 70 = 343K (70˚C)
2) TH1 = 10k at 25˚C and B = 3900 Æ RT = 1.8k @ 70˚C
3) Rth = RT at Tthreshold = 1.8k
Over-Temperature Shutdown
The ZXLD1371 incorp orates an over-temperature shut down circuit to protec t against damage caused by excessive die
temperature. A warning signal is generated on the STATUS output when die temperature e xcee ds 125°C nominal and the
output is disabl ed when die temperature exceeds 150°C nominal. Normal operation resumes when the device cools back
down to 125°C .
ZXLD1371
ZXLD1371
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Applications Information (cont.)
FLAG/STATUS Outputs
The FLAG/STATUS outputs provide a warning of extreme operating or fault conditions. FLAG is an open-drain logic
output, which is normally off, but switches low to indicate that a warning, or fault condition exists. STATUS is a DAC
output, which i s normally high (4. 5V), but switches to a lower voltage to indicate the nature of the warning/fault.
Conditions monitored, the method of detection and the nominal STATUS output voltage are given in the following table
(Note 15):
Table 2
Warning/Fault condition Severity
(Note 16) Monitored
parameters FLAG Nominal STATUS voltage
Normal operation H 4.5V
Supply under-voltage 1 VAUX < 5.0V L 4.5V
2 VIN < 5.6V L < 3.6V
Output current out of regulation
(Note 17) 2 VSHP outside normal
voltage range L 3.6V
Driver stalled with switch ‘on’, or
‘off’ (Note 18) 2 tON, or tOFF > 100µs L 3.6V
Device temperature above
maximum recommended
operating value 3 TJ > 125°C L 1.8V
Sense resistor current IRS above
specified maximum 4 VSENSE > 0.3V L 0.9V
Notes: 15. These STATUS pin voltages apply for an input voltage,VIN, of 7.5V < VIN < 60V. Below 7.5V the STATUS pin voltage levels reduce and therefore
may not report the correct status. For 5.4V < VIN < 7.5V the flag pin still reports an error by going low. At low VIN in Boost and Buck-boost modes
an over-current status may be indicated when operating at high boost ratios -– this due to the feedback loop increasing the sense voltage.
16. Severity 1 denotes lowest severity.
17. This warning will be indicated if the output power demand is higher than the available input power; the loop may not be able to maintain
regulation.
18. This warning will be indicated if the gate pin stays at the same level for greater than 100µs (e.g. the output transistor cannot pass enough current
to reach the upper switching threshold ).
Figure 15. Status levels
ZXLD1371
ZXLD1371
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In the event of more than one fault/warning condition occurring, the higher severity condition will take precedence. E.g.
‘Excessive coil current ’ and ‘Out of regulation’ occurring together will produce an output of 0.9V on t he STATUS pin.
If VADJ>1.7V, VSENSE may be greater than the excess coil current threshold in normal operation and an error will be
reported. Hence, STATUS and FLAG are only guarant eed for VADJ<=VREF.
Diagnostic signals sho uld be ignored durin g the device
start – up for 100s. T he dev ice st art u p seq uenc e will
be initiated bot h duri ng t he fir st po wer on of t he device
or after the PWM signal is kept low for more than
15ms, initiating the standby state of the device.
In particular, during the first 100s the diagnostic is
signaling an over-current then an out-of-regulation
status. These two events are due to the charging of
the inductor and are not true fault conditions.
Figure 16. Diagnostic during Start-up
Reduced Input Voltage Operation
To facilitate operation in automotive and other applications, that have large transient reductions in system supply voltage,
the ZXLD1371 is now capable of op erating down to input voltages as low as 5. 0V. Care must be take n when operating at
these lower supply voltages to ensure that the external MOSFET is correctly enhanced and that the boosting ratio is not
increased to excessive amounts where both the duty cycle and peak-switch current limits are not exceeded. The device
will operate down to 5.0V, but for reliable start up VIN must be higher than 5.4V. The designer should also take into
account any noise that may occur on the supply lines.
In Buck-boost and Boost modes (most common topologies for applications likely to require transient operation down to
supply voltages approaching 5.0V) as the input voltage reduces then the peak switch current will increase the ZXLD1371
compensates for this by allowing t he sense voltage t o increase while maintaini ng regulation of t he LED current. However if
the boost ratio (switch output voltage/input voltage) is increased too much then the sense voltage could be increased too
much causing an over-current flag to be trigg ered and/or loss of regulation.
In addition to this, increased power dissipation will occur in the external MOSFET switch – especially if the external
MOSFET has a large threshold. One way of overcoming this is to apply a boot-strap network to the VAUX pin – see next
section.
If the ZXLD1371 is used in buck mode at low voltages then the boot-strap network cannot be implemented and so a low
threshold MOSFET with low gate capacitance should be used. Some loss of regulation is expected to occur at voltages
below 6V – see Buck mode Typical Characteristics Section.
When using th e ZXLD1371 in app lications with tr ansient input volta ge excursions we recommend using the web calculator
to optimize operat ion over the normal oper ati ng band. T hen chan ge the inp ut range to i nclude the t ransie nt excursio n while
keeping the optimized component selection to check expected f unction during the transient input voltage conditions.
VREF
0V
Over
Current
225mV/R1
0A
FLAGSTATUSCoil current
Out of
regulation
100us
ZXLD1371
ZXLD1371
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Applications Information (cont.)
Boosting VAUX Supply Voltage in Boost and Buck-Boos t Mode
This means that depending on the characteristics of the external MOSFET, the gate voltage may not be enough to fully
enhance the po wer MOSFET. A boot-strap boosting tech nique can be used to incre ase the gate drive volt age at low input
voltage. See figure 17 for circuit diagram. This can be particularly importan t for extended use at low input voltages as this is
when the switch current will be at its great est – resulting in great est heat generation within t he MOSFET.
Figure 17. Bootstrap Circuit for Boost and Buck-Boost Low Voltage Operations
The Bootstrap circuit guarantees that the MOSFET is fully enhanced reducing both the power dissipation and the risk of
thermal runaway of the MOSFET itself. The bootstrap circuit consists of an extra diode D2 and decoupling capacitor C3
which are used to gen erate a boosted voltage at VAUX. This enables the device to operat e with full output current when VIN
is at the minimum value of 5V . The resist or R2 can be us e d t o limit the cu rrent in the boot st rap circuit in order t o reduc e th e
impact of the circuit itself on the LED accuracy. A typical value would be 100 ohms. The impact on the LED current is
usually a decrease of maximum 5% compared t o t he nominal current value set by the sense resistor.
The Zener diode D3 is use d to limit the voltag e on the VAUX pin to less than 60V.
Due to the increased number of components and the loss of current accuracy, the bootstrap circuit is recommended only
when the system has t o operate continuousl y in conditions of lo w input voltage (bet ween 5 and 8V) and hig h load current.
Other circumstances such as low input voltage at low load current, or tran sient low input voltag e at high current should be
evaluated keeping account of the external MOSFET’s power dissipation.
Figure 18. Effect of Bootstrap on LED Current in Buck-Boost Mode
6578109 1112131415161718
V (V)
IN
T = 25 C, L = 33µH
R = 150m , R9 = 120k
R10 = 36k
A
S
°
ΩΩ
Ω
0.25
0.27
0.29
0.33
0.31
0.35
0.37
0.39
0.41
0.43
0.4
5
LED
C
U
R
R
E
N
T
(A)
5 LEDs
5 LEDs Bootstrap
ZXLD1371
ZXLD1371
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Applications Information (cont.)
Over-Voltage Protection
The ZXLD1371 is inhere ntly protected agai nst open-circuit load when used in Buck confi guration. Ho wever care has to be
taken with open-circuit l oad conditions in Buck-Boost or Boost configurations. This is because in t hese configurations there
is no internal o pen-circuit protect ion mechanism for the ext ernal MOSFET. In this case an Over-Voltage-Protection (OVP)
network should be provided externally to the MOSFET to avoid damage due to open circuit conditions. This is shown in
figure 19 below, highlighted in the dotted blue box.
Figure 19. OVP Circuit
The zener voltage is determined according t o: Vz = VLEDMAX +10% where VLEDMAX is maximum LED chain voltage.
If the LEDA voltage e xceeds VZ the gate of MOSFET Q2 will rise turnin g Q2 on. This will pull th e PWM pin low and switc h
off Q1 until the voltage on the drain of Q1 falls below Vz. If the voltage at LEDA remains above VZ for longer than 20ms
then the ZXLD1371 will enter into a shutdown state.
Care should be taken such that the maximum gate voltage of the Q2 MOSFET is not exceeded.
Take care of the max voltag e drop on the Q2 MOSFET gat e. Typical devices for Z1 and Q2 are BZ X84C and 2N7002
ZXLD1371
ZXLD1371
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PCB Layout Considerations
PCB layout is a fundamental to device performance in all configurations. Figure 20 shows a section of a proven
ZXLD1371 PCB layout.
Figure 20. Circuit Layout
Here are some considerations useful for the PCB la yout using ZXLD1371 in Buck, Boost and Buck-boost configurations:
In order to avoid ringing due to stra y inductances, the induct or L1, the anode of D1 and the drain of Q1 should b e
placed as close togeth er as possible.
The shaping capacitor C1 is fundamental for the stability of the control loop. To this end it should be placed no
more than 5mm from the SHP pin.
Input voltage pins, VIN and VAUX, need to be decoupled. It is recommended to use two ceramic capacitors of
2.2uF, X7R, 100V (C3 and C4). In addition to these capacitors, it is suggested to add two ceramic capacitors of
1uF, X7R, 100V each (C2, C8), as well as a further decoupling capacitor of 100nF close to the VIN/VAUX pins
(C9). VIN and VAUX pins can be short-circuited when the device is used in buck mode, or can be driven from a
separate supply.
The underside of the PCB should be a solid copper ground plane, electrically bonded to top ground copper at
regular intervals using pl ated-thro via holes. The ground plane sh ould be unbroken as far as possible, particularly
in the area of t he switching circuit including the Z XLD1371, L1, Q1 D, C 3 and C4. Plate d via holes are necessar y
to provide a short elect rical p ath t o minimize stray inductanc e. Critica l posi tions of vi a holes inc lude the decoupl ing
capacitors, the source connection of the MOSFET and the ground connections of the ZXLD1371, including the
centre paddle. These via hol es also serve to conduct heat a way from the semiconductor s and minimize t he device
junction temper atures.
Evaluation Boards
To support easier eva luation of the Z XLD1 371 three evaluat ion boards have been developed which available via your
Diodes sales representat ive for qualified opportunities:
ZXLD1371EV1 Buck configuration
ZXLD1371EV2 Buck-boost configuration
ZXLD1371EV3 Boost configuration
SHP pin
VIN / VAUX
decou
p
lin
g
Inductor, Switch
and
Freewheeling
diode
ZXLD1371
ZXLD1371
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Ordering Information
Device (Note 19) Packaging Status Part Marking Reel
Quantity Tape Width Reel
Size
ZXLD1371EST16TC TSSOP-16EP Preview ZXLD
1371
YYWW 2500 16mm 13”
ZXLD1371QESTTC TSSOP-16EP Preview ZXLD
1371
YYWW 2500 16mm 13”
Note: 19. For Automotive grade with AEC-Q100 qualification the ZXLD1371QESTTC should be ordered.
Where YY is last two digits of year and WW is two digit week number
Package Outline Dimensions (All Dimensions in mm)
Suggested Pad Layout
TSSOP-16EP
Dim Min Max
A 4.9 5.10
B 4.30 4.50
C ⎯ 1.2
D 0.8 1.05
F 1.00 Ref.
G 0.65 Ref.
K 0.19 0.30
L 6.40 Ref.
a1 7°
a2 0° 8°
All Dimensions in mm
Dimensions Value
(in mm)
C 0.650
X 0.450
X1 3.290
X2 5.000
Y 1.450
Y1 3.290
Y2 4.450
Y3 7.350
A
BL
K
G
C
D
F
a1
a2
Pi n 1 In de nt
Detail “A”
ga uge pla ne
seati ng plane
Detail “A
”
Y2
Y 16x
Y3
C
Y1
X2
X1
X 16x
ZXLD1371
ZXLD1371
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in the labelin g can be reasonably expected to result i n significant injury to the user.
B. A critical component is any component in a life support devi ce or system whose failure t o perform can be reasonably expected
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Custom ers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or
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Incorp orated products in such safety-crit ic al, life support devices or systems.
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