4-65
Product Description
Ordering In formation
Typical Applications
Features
Functional Block Diagram
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Optimum Technology Matching® Applied
Si BJT GaAs MESFETGaAs HBT
Si Bi-CMOS SiGe HBT Si CMOS
InGaP/HBT GaN HEMT SiGe Bi-CMOS
1
9
6 5
7
84
32
Pin 1
Indicator
RF OUT Ground
RF IN
Ground
NBT-168
MICROWAVE InGaP/GaAs DISCRETE HBT
DC TO 12GHz
Active Amplifier in VCO Circuit
Buffer Amplifier Gain Stage
The NBT-168 discrete HBT is ideal for low-cost amplifier
and oscillator applications up to 12GHz. Low noise figure ,
high gain, high current capabili ty, and medium output give
this device high dynamic range and excellent linearity for
cascaded amplifier designs. This device is also ideally
suited for VCO/buffer amplifier applications. The NBT-168
is packaged in a low-cost, surface-mount ceramic pack-
age, providing ease of assembly for high-volume tape-
and-reel requirements. It is available in either packaged
or chip (NBT-168-D) form, where its gold metallization is
ideal for hybrid circuit designs.
Reliable, Low-Cost HBT Design
26.0dB Gain@1.0GHz
Positive Power Supply Operation
4-Finger Device for High-Current
Capability
Low Noise Figure, 1.7dB@2.0GHz
NBT-168 Microwave InGaP/GaAs Discrete HBT DC to 12GHz
NBT-168-T1 or -T3Tape & Reel, 1000 or 3000 Pieces (respectively)
NBT-168-D NBT-168 Chip Form (100 pieces minimum order)
NBT-168-E Fully Assembled Evaluation Board
0
Rev A3 021004
Notes:
1. Solder pads are coplanar to within ±0.025 mm.
2. Lid will be centered relative to frontside metallization with a tolerance of ±0.13 mm.
3. Mark to include two characters and dot to reference pin 1.
HT
2.39 min
2.59 max
Lid ID
1.70 min
1.91 max
2.94 min
3.28 max
Pin 1
Indicator
1.00 min
1.50 max
0.025 min
0.125 max
0.38 nom
Pin 1
Indicator
RF OUT
0.98 min
1.02 max
RF OUT
Ground
0.50 nom
0.50 nom
All Dimensions in Millimeters 0.37 min
0.63 max
Ground
Package Style: MPGA, Bowtie, 3x3, Ceramic
!
4-66
NBT-168
Rev A3 021004
Absolute Maximum Ratings
Parameter Rating Unit
RF Input Power +10 dBm
Power Dissipation 250 mW
VCBO 8
VCEO 6
VEBO 1.5 V
Collector Current 42 mA
Junction Temperature 200 °C
Operating Temperature -45 to +85 °C
Storage Temperature -65 to +150 °C
Exceeding any one or a combination of these limits may cause permanent damage.
Parameter Specification Unit Condition
Min. Typ. Max.
Overall VC=+3.9V, ICC=25mA, Z0=50, TA=+25°C
Collector Cutoff Current, ICBO 0.1 µAV
CB=5.0V, IE=0
Emitter Cutoff Current, IEBO 0.1 µAV
EB=1.0V, IC=0
DC Current Gain, hFE 90 110 130 VCE=4.0V, IC=25mA
Current Gain, H21 20 dB VCE=4.0V, IC=25mA, 2GHz
Small Signal Power Gain, S21 24 26 dB f=1.0GHz
Noise Figure, NF 1.7 dB f=2.0GHz
Reverse Isolation, S12 -30 -32 dB f=1.0GHz
MTTF versus Temperature
@ VCE=3.9V, ICC=25mA
Case Temperature 85 °C
Junction Temperature 112 °C
MTTF >1,000,000 hours
Thermal Resistance
θJC 277 °C/W Thermal Resistance, at any temperature (in
°C/W att) can be estimated by the following
equation: θJC (°C/Watt)=277[TJ(°C)/112]
Caution! ESD sensitive device .
RF Micro Device s believ es the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
4-67
NBT-168
Rev A3 021004
Pin Function Description Interface Schematic
1 EMITTER For best high frequency performance, this should be grounded. For
best performance, keep traces physically short and connect immedi-
ately to ground plane.
2 EMITTER Same as pin 2.
3 EMITTER Same as pin 2.
4BASE
RF input pin. This pin is NOT internally DC blocked. A DC blocking
capacitor, suitable for the frequency of operation, should be used in
most applications. Base bias network should provide 1.3V to the base
and be a current source sufficient to supply the correct base current
for the collector current set.
5 EMITTER Same as pin 2.
6 EMITTER Same as pin 2.
7 EMITTER Same as pin 2.
8 COLLECTOR Collector bias. Must provide collector voltage and current. Biasing is
accomplished with an external series resistor and choke inductor to
VCC. The resistor is selected to set the DC current into this pin at the
desired level. The resistor value is determined by th e following equa-
tion:
Care should be taken to ensure the current through the devices nev er
exceeds the maximum datasheet setting. Additionally, care should be
taken to ensure the voltages between the collector and emitter (pins
3, 2 and 4), VCE is typically 3.5V to 4.0V. Because DC is present on
this pin, a DC blocking capacitor, suitable for the frequency of opera-
tion, should be used in most applications. The supply side of the bias
network should also be well bypassed.
9 EMITTER Same as pin 2.
RVCC VC
()
ICC
----------------------------
=BASE COLLECTOR
EMITTER
4-68
NBT-168
Rev A3 021004
T ypical Bias Configuration
Application notes related to biasing circuit, device footprint, and thermal considerations ar e available on request.
Sales Criteria - Unpackaged Die
Die Sales Information
All segmented die are sold 100% DC-tested. Testing parameters for wafer-level sales of die mate rial shall be nego-
tiated on a c ase-by-case basis.
Segmented die are selected for customer shipment in accordance with RFMD Document #6000152 - Die Product
Final Visual Inspection Criteria1.
Segmented die has a minimum sales volume of 100 pieces per order. A maximum of 400 die per carrier is allow-
able.
Die Packa ging
All die are packaged in GelPak ESD protective containers with the following specification:
O. D.=2"X2", Capacity=400 Die (20X20 segments), Retention Level=H i gh(X8).
GelPak ESD protective containers are placed in a static shield bag. RFMD recommends that once the bag is
opened the GelPak/s should be stored in a co ntrolled nitrogen environment. Do not press on the cover of a closed
GelPak, handle by the edges only. Do not vacuum seal bags containing GelPak containers.
Precaution must be taken to minimize vibration of packaging during handling, as die can sh ift during transit 2.
Package Storage
Unit packages should be kept in a dry nitrogen environment for optimal assembly, performance, and reliability.
Precaution must be taken to minimize vibration of packaging during handling, as die can sh ift during transit2.
Die Handling
Proper ESD precautions must be taken when handling die ma terial.
Die should be handled using vacuum pick-up equipment, or handled along the long side with a sharp pair of twee-
zers. Do not touch die with any par t of the body.
When using a utomated pic k-up and placeme nt equipment, ens ure that force impact is set correctly. Excessiv e force
may damage GaAs devices.
C block
C block
In Out
L choke
(optional)
RB1
VBB
Note: RF bypass circuitry omitted for simplicity.
RB2
NBT-168
L choke
(optional)
RCC
VCC
VBE VCE
4-69
NBT-168
Rev A3 021004
Die Attach
The die attach pr ocess mechanically atta ches the die to the circuit sub strate . In addition, the utili zation of proper die
attach processes electrically connect the ground to the trace on whic h the chip is mounted. It also establishes the
thermal path by which heat can leave the chip.
Die should be mounted to a clean, flat surface. Epoxy or eu tectic die attach are both acceptable attachment meth-
ods. Top and bottom metallization are gold. Conductive silver-filled epoxies are recommended. This procedure
involves the use of epoxy to form a joint between the backside gold of the chip and the metallized area of the sub-
strate.
All connections should be made on the topside of the die. It is essential to performance that the backside be well
grounded and that the length of topside interconnects be minimized.
Some die utilize vias for effective g rounding. Care must be e x ercised when mounting die to preclude ex cess run-out
on the topside.
Die Wire Bonding
Electrical connections to the chip are made through wire bonds. Either wedge or ball bonding methods are accept-
able practices for wire bonding.
All bond wires sh ou ld be made as sho rt as possible.
Notes
1RFMD Document #6000152 - Die Product Final Visual Inspection Criteria. This document provides guidance for die
inspection personn el to determine final visual accept ance of die product prior to shipping to cu stomers.
2RFMD takes precautions to ensure that die product is shipped in accordance with quality standards established to min-
imize material shift. However, due to the physical size of die-level product, RFMD does n ot guarantee that material w ill
not shift dur ing transit, espec ially under extreme handling circums tances. Product replacement due to material sh ift will
be at the discretion of RFMD.
4-70
NBT-168
Rev A3 021004
Tape and Reel Dimensions
All Dimensions in Millimeters
A
D
B
F
T
O
S
330 mm (13") REEL Micro-X, MPGA
SYMBOL SIZE (mm)ITEMS SIZE (inches)
FLANGE B
T
F
330 +0.25/-4.0
18.4 MAX
12.4 +2.0
Diameter
Thickness
Space Between Flange
13.0 +0.079/-0.158
0.724 MAX
0.488 +0.08
HUB
O
S
A
102.0 REF
13.0 +0.5/-0.2
1.5 MIN
Outer Diameter
Spindle Hole Diameter
Key Slit Width D20.2 MINKey Slit Diameter
4.0 REF
0.512 +0.020 /-0.008
0.059 MIN
0.795 MIN
PIN 1
User Direction of Feed
Ao = 3.6 MM
Bo = 3.6 MM
Ko = 1.7 MM
NOTES:
1. 10 sprocket hole pitch cumulative tolerance ±0.2.
2. Camber not to exceed 1 mm in 100 mm.
3. Material: PS+C
4. Ao an d Bo measure d on a plane 0.3 mm abov e the bottom of the pocket.
5. Ko measured from a plane on the inside bottom of the pocket to the surface of the carrier.
6. Poc ket pos i tion relat i ve to sp rocket ho l e measured as true position of pocket, not pocket hole.
All di m ensions in mm
SECTI ON A-A
R0.3 MAX.
Ko
0.30 ± 0.05
5.50 ± 0.05
See Note 6 12.00
± 0.30
1.75
A
AR0.5 TY P
1.5 MIN.
Bo
Ao 8.0
2.00 ± 0.05
See Note 6
4.0
See Note 1 +0.1
-0.0
1.5
4-71
NBT-168
Rev A3 021004
Collector Current versus Base to Emitter Voltage
(NBT-168)
-5.0
0.0
5.0
10.0
15.0
20.0
25.0
30.0
35.0
-0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
Base t o Em itt er Volt age (VBE)
Collector Current, IC (mA)
Current Voltage Characteristics
(NBT-168)
-0.005
0.000
0.005
0.010
0.015
0.020
0.025
0.030
0.035
0.040
0.045
0.000 1.000 2.000 3.000 4.000 5.000 6.000
VCE (V)
IC (A)
Pout ( d Bm ) Gain (dB)
Series3 Series7
Series4 Series5
Frequency versus Noise Figure
(NBT-168)
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
1.01.52.02.53.0
Fr equency (GHz)
Noise Figure (dB)
Insertion Power Gain versus Frequency
(NBT-168)
0.0
5.0
10.0
15.0
20.0
25.0
30.0
35.0
0.1 1.0 10.0 100.0
Fre quency (GHz)
Insertion Power Gain (dB)
4-72
NBT-168
Rev A3 021004