November 2011
FDP20N50F / FDPF20N50FT N-Channel MOSFET
©2011 Fairchild Semiconductor Corporation
FDP20N50F / FDPF20N50FT Rev. C1
www.fairchildsemi.com1
UniFET
TM
FDP20N50F / FDPF20N50FT
N-Channel MOSFET, FRFET
500V, 20A, 0.26Ω
Features
•R
DS(on) = 0.22Ω ( Typ.)@ VGS = 10V, ID = 10A
Low gate charge ( Typ. 50nC)
Low Crss ( Typ. 27pF)
Fast reverse recovery switching of built-in diode
Fast switching
100% avalanche tested
Improve dv/dt capability
RoHS compliant
Description
These N-Channel enhancement mode power field effect transis-
tors are produced using Fairchild’s proprietary, planar stripe,
DMOS technology.
This advance technology has been especially tailored to mini-
mize on-state resistance, provide superior switching perfor-
mance, and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high effi-
cient switching mode power supplies and active power factor
correction.
TO-220
FDP Series
G
S
D
D
G
S
TO-220F
FDPF Series
G S
D
MOSFET Maximum Ratings TC = 25oC unless otherwise noted
Thermal Characteristics
Symbol Parameter FDP20N50F FDPF20N50FT Units
VDSS Drain to Source Voltage 500 V
VGSS Gate to Source Voltage ±30 V
IDD r a i n C u r r e n t -Continuous (TC = 25oC) 20 20* A
-Continuous (TC = 100oC) 12.9 12.9*
IDM D r a i n C u r r e n t - P u l s e d (Note 1) 80 80* A
EAS Single Pulsed Avalanche Energy (Note 2) 1110 mJ
IAR Avalanche Current (Note 1) 20 A
EAR Repetitive Avalanche Energy (Note 1) 25 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 20 V/ns
PDPower Dissipation (TC = 25oC) 250 38.5 W
- Derate above 25oC2.00.3W/
oC
TJ, TSTG Operating and Storage Temperature Range -55 to +150 oC
TL
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds 300 oC
Symbol Parameter FDP20N50F FDPF20N50FT Units
RθJC Thermal Resistance, Junction to Case 0.5 3.3
oC/WRθCS Thermal Resistance, Case to Sink Typ. 0.5 -
RθJA Thermal Resistance, Junction to Ambient 62.5 62.5
*Drain current limited by maximum junction temperature
FDP20N50F / FDPF20N50FT N-Channel MOSFET
FDP20N50F / FDPF20N50FT Rev. C1
www.fairchildsemi.com
2
Package Marking and Ordering Information TC = 25oC unless otherwise noted
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Device Marking Device Package Reel Size Tape Width Quantity
FDP20N50F FDP20N50F TO-220 - - 50
FDPF20N50FT FDPF20N50FT TO-220F - - 50
Symbol Parameter Test Conditions Min. Typ. Max. Units
BVDSS Drain to Source Breakdown Voltage ID = 250μA, VGS = 0V, TJ = 25oC 500 - - V
ΔBVDSS
/ ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 250μA, Referenced to 25oC-0.7-V/
oC
IDSS Zero Gate Voltage Drain Current VDS = 500V, VGS = 0V - - 10 μA
VDS = 400V, TC = 125oC - - 100
IGSS Gate to Body Leakage Current VGS = ±30V, VDS = 0V - - ±100 nA
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250μA3.0-5.0V
RDS(on) Static Drain to Source On Resistance VGS = 10V, ID = 10A - 0.22 0.26 Ω
gFS Forward Transconductance VDS = 20V, ID = 10A (Note 4) -25-S
Ciss Input Capacitance VDS = 25V, VGS = 0V
f = 1MHz
- 2550 3390 pF
Coss Output Capacitance - 350 465 pF
Crss Reverse Transfer Capacitance - 27 40 pF
Qg(tot) Total Gate Charge at 10V
VDS = 400V, ID = 20A
VGS = 10V
(Note 4, 5)
-5065nC
Qgs Gate to Source Gate Charge - 14 - nC
Qgd Gate to Drain “Miller” Charge - 20 - nC
td(on) Turn-On Delay Time
VDD = 250V, ID = 20A
RG = 25Ω
(Note 4, 5)
- 45 100 ns
trTurn-On Rise Time - 120 250 ns
td(off) Turn-Off Delay Time - 100 210 ns
tfTurn-Off Fall Time - 60 130 ns
ISMaximum Continuous Drain to Source Diode Forward Current - - 20 A
ISM Maximum Pulsed Drain to Source Diode Forward Current - - 80 A
VSD Drain to Source Diode Forward Voltage VGS = 0V, ISD = 20A - - 1.5 V
trr Reverse Recovery Time VGS = 0V, ISD = 20A
dIF/dt = 100A/μs (Note 4)
- 154 - ns
Qrr Reverse Recovery Charge - 0.5 - μC
Notes:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L = 5mH, IAS = 20A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C
3. ISD 20A, di/dt 200A/μs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test: Pulse width 300μs, Duty Cycle 2%
5. Essentially Independent of Operating Temperature Typical Characteristics
FDP20N50F / FDPF20N50FT N-Channel MOSFET
FDP20N50F / FDPF20N50FT Rev. C1
www.fairchildsemi.com
3
Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperature
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
0.1 1 10
1
10
20
0.3
*Notes:
1. 250μs Pulse Test
2. TC = 25oC
VGS = 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
ID,Drain Current[A]
VDS,Drain-Source Voltage[V]
80
45678
1
10
100
150oC
*Notes:
1. VDS = 20V
2. 250μs Pulse Test
25oC
ID,Drain Current[A]
VGS,Gate-Source Voltage[V]
0.0 0.5 1.0 1.5 2.0 2.5
1
10
100
*Notes:
1. VGS = 0V
2. 250μs Pulse Test
150oC
IS, Reverse Drain Current [A]
VSD, Body Diode Forward Voltage [V]
25oC
400
0255075
0.1
0.2
0.3
0.4
0.5
*Note: TJ = 25oC
VGS = 20V
VGS = 10V
RDS(ON) [Ω],
Drain-Source On-Resistance
ID, Drain Current [A]
0.1 1 10
0
1500
3000
4500
6000
Coss
Ciss
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
*Note:
1. VGS = 0V
2. f = 1MHz
Crss
Capacitances [pF]
VDS, Drain-Source Voltage [V]
50
0 102030405060
0
2
4
6
8
10
*Note: ID = 20A
VDS = 100V
VDS = 250V
VDS = 400V
VGS, Gate-Source Voltage [V]
Qg, Total Gate Charge [nC]
FDP20N50F / FDPF20N50FT N-Channel MOSFET
FDP20N50F / FDPF20N50FT Rev. C1
www.fairchildsemi.com
4
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation Figure 8. Maximum Safe Operating Area
vs. Temperature - FDP20N50F
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
- FDPF20N50FT vs. Case Temperature
Figure 11. Transient Thermal Response Curve - FDP20N50F
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
*Notes:
1. VGS = 0V
2. ID = 1mA
BVDSS, [Normalized]
Drain-Source Breakdown Voltage
TJ, Junction Temperature [oC]
25 50 75 100 125 150
0
5
10
15
20
25
ID, Drain Current [A]
TC, Case Temperature [oC]
110100
0.01
0.1
1
10
100
200
40μs
100μs
1ms
10ms
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
Operation in This Area
is Limited by R DS(on)
*Notes:
1. TC = 25oC
2. TJ = 150oC
3. Single Pulse
800
DC
10-5 10-4 10-3 10-2 10-1 100101
0.01
0.1
1
0.002
t
1
P
DM
t
2
Thermal Response [ZθJC]
Rectangular Pulse Duration [sec]
*Notes:
1. ZθJC(t) = 0.5oC/W Max.
2. Duty Factor, D= t1/t2
3. TJM - TC = PDM * ZθJC(t)
single pulse
0.5
0.02
0.2
0.05
0.1
0.01
t
1
P
DM
t
2
FDP20N50F / FDPF20N50FT N-Channel MOSFET
FDP20N50F / FDPF20N50FT Rev. C1
www.fairchildsemi.com
5
Typical Performance Characteristics (Continued)
Figure 12. Transient Thermal Response Curve - FDPF20N50FT
10-4 10-3 10-2 10-1 100101102103
0.01
0.1
1
0.01
0.1
0.2
0.05
0.02 *Notes:
1. ZθJC(t) = 3.3oC/W Max.
2. Duty Factor, D= t1/t2
3. TJM - TC = PDM * ZθJC(t)
0.5
Single pulse
Thermal Response [ZθJC]
Rectangular Pulse Duration [sec]
5
t
1
P
DM
t
2
FDP20N50F / FDPF20N50FT N-Channel MOSFET
FDP20N50F / FDPF20N50FT Rev. C1
www.fairchildsemi.com
6
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
FDP20N50F / FDPF20N50FT N-Channel MOSFET
FDP20N50F / FDPF20N50FT Rev. C1
www.fairchildsemi.com
7
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
FDP20N50F / FDPF20N50FT N-Channel MOSFET
FDP20N50F / FDPF20N50FT Rev. C1
www.fairchildsemi.com
8
Mechanical Dimensions
4.50
±0.20
9.90
±0.20
1.52
±0.10
0.80
±0.10
2.40
±0.20
10.00
±0.20
1.27
±0.10
ø3.60
±0.10
(8.70)
2.80
±0.10
15.90
±0.20
10.08
±0.30
18.95MAX.
(1.70)
(3.70)(3.00)
(1.46)
(1.00)
(45°)
9.20
±0.20
13.08
±0.20
1.30
±0.10
1.30
+0.10
–0.05
0.50
+0.10
–0.05
2.54TYP
[2.54
±0.20
]2.54TYP
[2.54
±0.20
]
TO-220
FDP20N50F / FDPF20N50FT N-Channel MOSFET
FDP20N50F / FDPF20N50FT Rev. C1
www.fairchildsemi.com
9
Mechanical Dimensions
Dimensions in Millimeters
TO-220F Potted
* Front/Back Side Isolation Voltage : AC 2500V
FDP20N50F / FDPF20N50FT N-Channel MOSFET
FDP20N50F / FDPF20N50FT Rev. C1
www.fairchildsemi.com
10
TRADEMARKS
The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and
is not intended to be an exhaustive list of all such trademarks.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF
THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE
UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF
FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE
PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury to the user.
2. A critical component in any component of a life support,
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
ACEx®
Build it Now™
CorePLUS™
CROSSVOLT
CTL™
Current Transfer Logic™
EcoSPARK®
Fairchild®
Fairchild Semiconductor®
FACT Quiet Series™
FACT®
FAST®
FastvCore
FPS™
FRFET®
Global Power ResourceSM
Green FPS™
Green FPS™ e-Series™
GTO™
i-Lo
IntelliMAX™
ISOPLANAR™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MillerDrive™
Motion-SPM™
OPTOLOGIC®
OPTOPLANAR®
®
PDP-SPM™
Power220®
Power247®
POWEREDGE®
Power-SPM
PowerTrench®
Programmable Active Droop™
QFET®
QS™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
SMART START™
SPM®
STEALTH™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
The Power Franchise®
TinyBoost™
TinyBuck™
TinyLogic®
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
µSerDes™
UHC®
UniFET™
VCX™
®
Datasheet Identification Product Status Definition
Advance Information Formative or In Design This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary First Production
This datasheet contains preliminary data; supplementary data will be pub-
lished at a later date. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve design.
No Identification Needed Full Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
Obsolete Not In Production
This datasheet contains specifications on a product that has been discontin-
ued by Fairchild Semiconductor. The datasheet is printed for reference
information only
Rev. I31