2N7002KW 60V N-Channel Enhancement Mode MOSFET - ESD Protected FEATURES * RDS(ON), VGS@10V,IDS@500mA=3 * RDS(ON), VGS@4.5V,IDS@200mA=4 * Advanced Trench Process Technology * High Density Cell Design For Ultra Low On-Resistance * Very Low Leakage Current In Off Condition * Specially Designed for Battery Operated Systems, Solid-State Relays Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc. * ESD Protected 2KV HBM * In compliance with EU RoHS 2002/95/EC directives MECHANICALDATA * Case: SOT-323 Package * Terminals : Solderable per MIL-STD-750,Method 2026 * Marking : K72 Maximum RATINGS and Thermal Characteristics (TA=25OC unless otherwise noted ) PA RA M E TE R S ym b o l Li mi t Uni ts D r a i n- S o ur c e Vo lta g e V DS 60 V Ga te - S o ur c e Vo lta g e V GS +20 V ID 11 5 mA ID M 800 mA PD 200 120 mW T J ,T S TG - 5 5 to + 1 5 0 R J A 625 C o nti nuo us D r a i n C ur r e nt P uls e d D r a i n C ur r e nt 1) O M a xi m um P o we r D i s s i p a ti o n Op e r a ti ng J unc ti o n a nd S to r a g e Te mp e r a tur e Ra ng e Junction-to Ambient Thermal Resistance(PCB mounted)2 TA= 2 5 C TA = 7 5 OC O O C C /W Note: 1. Maximum DC current limited by the package 2. Surface mounted on FR4 board, t < 5 sec PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE May 21.2010-REV.01 PAGE . 1 2N7002KW ELECTRICALCHARACTERISTICS P a ra me te r S ym b o l Te s t C o nd i ti o n M i n. Typ . M a x. Uni ts D ra i n-S o urc e B re a k d o wn Vo lta g e B V DSS V GS =0 V, ID =1 0 uA 60 - - V G a te Thr e s ho ld Vo lta g e V GS ( th) V D S =V GS , ID =2 5 0 uA 1 - 2 .5 V R D S ( o n) VGS=4.5V, I D=200mA - - 4 .0 R D S ( o n) VGS=10V, I D=500mA - - 3.0 ID S S VDS=60V, VGS=0V - - 1 uA Gate Body Leakage I GS S V GS = +2 0 V, V D S =0 V - - +1 0 uA Forward Transconductance g fS V D S =1 5 V, ID = 2 5 0 m A 100 - - mS To ta l Ga te C ha r g e Qg V D S =1 5 V, ID = 2 0 0 m A VGS=4.5V - - 0 .8 nC Tur n- On D e la y Ti m e ton - - 20 Tur n- Off D e la y Ti m e toff - - 40 Inp ut C a p a c i ta nc e C iss - - 35 O utp ut C a p a c i ta nc e C oss - - 10 Re ve r s e Tra ns fe r C a p a c i ta nc e C rss - - 5 S ta ti c D ra i n-S o urc e On-S ta te Re s i s ta nc e D ra i n-S o urc e On-S ta te Re s i s ta nc e Ze r o Ga te Vo lta g e D ra i n C ur re nt Dynamic VDD=30V , RL=150 ID=200mA , VGEN=10V RG=10 V D S =2 5 V, V GS =0 V f=1 .0 M H Z ns pF S o urc e - D r a i n D i o d e D i o d e F o rwa r d Vo lta g e C o nti nuo us D i o d e F o r wa r d C ur re nt P uls e d D i o d e F o r wa rd C ur re nt Switching Test Circuit V SD IS =2 0 0 mA , V GS = 0 V - 0 .8 2 1 .3 V Is - - - 11 5 mA Is M - - - 800 mA Gate Charge Test Circuit VDD VIN RL VDD VGS RL VOUT RG 1mA RG May 21.2010-REV.01 PAGE . 2 2N7002KW O ID - Drain-to-Source Current (A) 1.2 V VGS GS= = 6.0~10V 10V ~ 6.0V ID - Drain Source Current (A) Typical Characteristics Curves (TA=25 C,unless otherwise noted) 5.0V 5.0V 1 4.0V 0.8 4.0V 0.6 0.4 3.0V 0.2 3.0V 0 0 1 2 3 4 1.2 V DS=10V 1 0.8 0.6 0.4 T J=25 0.2 0 0 5 Fig. 1-TYPICAL FORWARD CHARACTERISTIC FIG.1- Output Characteristic 3 4 5 6 5 R DS(ON) - On-Resistance ( W ) R DS(ON) - On-Resistance ( W ) 2 FIG.2- Transfer Characteristic 5 4 3 V GS = 4.5V 2 1 V GS=10V 0 4 3 ID =500m A 2 IIDD=200m A =200mA 1 0 0 0.2 0.4 0.6 0.8 1 2 3 4 5 6 7 8 9 10 V GS - Gate-to-Source Voltage (V) ID - Drain Current (A) FIG.3- On Resistance vs Drain Current RDS(ON) - On-Resistance(Normalized) 1 VGS - Gate-to-Source Voltage (V) VDS - Drain-to-Source Voltage (V) FIG.4- On Resistance vs Gate to Source Voltage 1.8 VGS =10V 1.6 ID =500mA 1.4 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100 125 150 o TJ - Junction Temperature ( C) FIG.5- On Resistance vs Junction Temperature May 21.2010-REV.01 PAGE . 3 V GS - Gate-to-Source Voltage (V) 2N7002KW Vgs Qg Qsw Vgs(th) 10 V DS=10V I D=250mA 8 6 4 2 0 0 Qg(th) Qgs Qg Qgd ID =250mA 1.1 1 0.9 0.8 -25 0 25 50 75 100 125 150 o 1 88 86 ID = 250uA 84 82 80 78 76 74 72 -50 -25 0 25 50 75 100 125 150 TJ - Junction Temperature ( C) Fig.8 - Threshold Voltage vs Temperature IS - Source Current (A) 0.8 o TJ - Junction Temperature ( C) 10 0.6 Fig.7 - Gate Charge BVDSS - Breakdown Voltage (V) Vth - G-S Threshold Voltage (NORMALIZED) 1.2 0.4 Qg - Gate Charge (nC) Fig.6 - Gate Charge Waveform 0.7 -50 0.2 Fig.9 - Breakdown Voltage vs Junction Temperature V GS=0V 1 0.1 25 T J=125 -55 0.01 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 VSD - Source-to-Drain Voltage (V) Fig.10 - Source-Drain Diode Forward Voltage May 21.2010-REV.01 PAGE . 4 2N7002KW MOUNTING PAD LAYOUT SOT-323 Unitinch(mm) 0.073 (1.85) 0.034 (0.86) 0.026 (0.66) 0.026 (0.65) 0.026 (0.65) ORDER INFORMATION * Packing information T/R - 12K per 13" plastic Reel T/R - 3K per 7" plastic Reel LEGAL STATEMENT Copyright PanJit International, Inc 2011 The information presented in this document is believed to be accurate and reliable. The specifications and information herein are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit does not convey any license under its patent rights or rights of others. May 21.2010-REV.01 PAGE . 5