SGLS162A - APRIL 2003 - REVISED JULY 2004 FEATURES D Qualification in Accordance With AEC-Q100 D Qualified for Automotive Applications D Customer-Specific Configuration Control Can D D D D D D D D D D Be Supported Along With Major-Change Approval ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) 200-mA Low-Dropout Regulator With EN Available in 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3-V, 3.3-V, 4.75-V, and Adjustable High PSRR (70 dB at 10 kHz) Ultralow Noise (32 V) Fast Start-Up Time (50 s) Stable With a 2.2-F Ceramic Capacitor Excellent Load/Line Transient Very Low Dropout Voltage (112 mV at Full Load, TPS79330) 5-Pin SOT23 (DBV) Package DESCRIPTION The TPS793xx family of low-dropout (LDO) low-power linear voltage regulators features high power supply rejection ratio (PSRR), ultralow noise, fast start-up, and excellent line and load transient responses in a small outline, SOT23, package. Each device in the family is stable, with a small 2.2-F ceramic capacitor on the output. The TPS793xx family uses an advanced, proprietary BiCMOS fabrication process to yield extremely low dropout voltages (e.g., 112 mV at 200 mA, TPS79330). Each device achieves fast start-up times (approximately 50 s with a 0.001-F bypass capacitor) while consuming very low quiescent current (170 A typical). Moreover, when the device is placed in standby mode, the supply current is reduced to less than 1 A. The TPS79328 exhibits approximately 32 VRMS of output voltage noise with a 0.1-F bypass capacitor. Applications with analog components that are noise sensitive, such as portable RF electronics, benefit from the high PSRR and low-noise features as well as the fast response time. Contact factory for details. Q100 qualification data available on request. APPLICATIONS D VCOs D RF D Bluetooth, Wireless LAN DBV PACKAGE (TOP VIEW) IN 1 GND 2 EN 3 5 OUT 4 BYPASS Fixed Option DBV PACKAGE (TOP VIEW) IN 1 6 OUT GND 2 5 FB EN 3 4 BYPASS Adjustable Option Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Bluetooth is a trademark owned by Bluetooth SIG, Inc. !"#$%&'!$" !( )*%%+"' &( $# ,*-.!)&'!$" /&'+0 %$/*)'( )$"#$% '$ (,+)!#!)&'!$"( ,+% '1+ '+%( $# +2&( "('%*+"'( ('&"/&%/ 3&%%&"'40 %$/*)'!$" ,%$)+((!"5 /$+( "$' "+)+((&%!.4 !").*/+ '+('!"5 $# &.. ,&%&+'+%(0 Copyright 2003 - 2004, Texas Instruments Incorporated www.ti.com SGLS162A - APRIL 2003 - REVISED JULY 2004 TPS79328 TPS79328 RIPPLE REJECTION vs FREQUENCY OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY Hz 100 90 V/ IO = 200 mA Output Spectral Noise Density - Ripple Rejection - dB 80 70 60 50 40 IO = 10 mA 30 20 VI = 3.8 V Co = 10 F C(byp) = 0.01 F 10 0 10 100 1k 10 k 100 k 1M 10 M 0.3 VI = 3.8 V Co = 2.2 F C(byp) = 0.1 F 0.25 0.2 0.15 IO = 1 mA 0.1 IO = 200 mA 0.05 0 100 f - Frequency - Hz 1k 10 k f - Frequency - Hz 100 k AVAILABLE OPTIONS TJ VOLTAGE PACKAGE 1.2 to 5.5 V 1.8 V 2.5 V 2.8 V -40C to 125C 2.85 V SOT23 (DBV) 3V 3.3 V 4.75 V The DBVR indicates tape and reel of 3000 parts. Product preview 2 PART NUMBER SYMBOL TPS79301DBVRQ1 TPS79318DBVRQ1 PGV1 TPS79325DBVRQ1 TPS79328DBVRQ1 PGW1 TPS793285DBVRQ1 TPS79330DBVRQ1 TPS793333DBVRQ1 TPS793475DBVRQ1 PHH1 PGX1 PHI1 PGY1 PHU1 PHJ1 www.ti.com SGLS162A - APRIL 2003 - REVISED JULY 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 6 V Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VI + 0.3 V Voltage on OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 6 V Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV ESD rating, CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 V Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 150C Operating ambient temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 85C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (1) All voltage values are with respect to network ground terminal. DISSIPATION RATING TABLE RJA DERATING FACTOR ABOVE TA = 25C TA 25C POWER RATING TA = 70C POWER RATING TA = 85C POWER RATING 63.75 C/W 256 C/W 3.906 mW/C 391 mW 215 mW 156 mW 63.75 C/W 178.3 C/W 5.609 mW/C 561 mW 308 mW BOARD PACKAGE RJC Low K DBV High K DBV 224 mW The JEDEC low K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top of the board. The JEDEC high K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board. 3 www.ti.com SGLS162A - APRIL 2003 - REVISED JULY 2004 electrical characteristics over recommended operating free-air temperature range EN = VI, TJ = -40 to 125 C, VI = VO(typ) + 1 V, IO = 1 mA, Co = 10 F, C(byp) = 0.01 F (unless otherwise noted) PARAMETER TEST CONDITIONS VI IO Input voltage (see Note 2) TJ Operating junction temperature Continuous output current (see Note 3) V 200 mA -40 125 C 0.98 VO 1.02 VO V TJ = 25C 0 A< IO < 200 mA, 2.8 V < VI < 5.5 V 1.764 TPS79325 TJ = 25C 0 A< IO < 200 mA, 3.5 V < VI < 5.5 V 2.45 TPS79328 TJ = 25C 0 A< IO < 200 mA, 3.8 V < VI < 5.5 V 2.744 TPS793285 TJ = 25C 0 A< IO < 200 mA, 3.85 V < VI < 5.5 V 2.793 TPS79330 TJ = 25C 0 A< IO < 200 mA, 4 V < VI < 5.5 V TPS79333 TJ = 25C 0 A IO < 200 mA, 4.3 V < VI < 5.5 V 3.234 TPS793475 TJ = 25C 0 A< IO < 200 mA, 5.25 V < VI < 5.5 V 4.655 0 A< IO < 200 mA, TJ = 25C 1.8 1.836 2.5 2.55 2.8 2.856 2.85 2.907 3 2.94 3.06 3.3 3.366 4.75 4.845 220 0 A< IO < 200 mA, Output voltage line regulation (VO/VO) (see Note 5) VO + 1 V < VI 5.5 V, VO + 1 V < VI 5.5 V Output noise voltage (TPS79328) BW = 200 Hz to 100 kHz, IO = 200 mA, TJ = 25 25C C Time, start-up (TPS79328) Output current limit TJ = 25C Standby current VO = 0 V, EN = 0 V, High level enable input voltage 2.7 V < VI < 5.5 V Low level enable input voltage 2.7 V < VI < 5.5 V Input current (EN) EN = 0 TJ = 25C TJ = 25C 5 0.12 55 C(byp) = 0.01 F C(byp) = 0.1 F 33 C(byp) = 0.001 F C(byp) = 0.0047 F 50 C(byp) = 0.01 F See Note 4 V V V V V V A mV 0.05 C(byp) = 0.001 F C(byp) = 0.0047 F V A 170 0 A< IO < 200 mA Load regulation UNIT 0 TPS79318 RL = 14 , Co = 1 F, MAX 5.5 TPS79301 Quiescent current (GND current) TYP 2.7 0 A< IO < 200 mA, (see Note 4 ) Output voltage 1.22 V VO 5.2 V, MIN 36 %/V VRMS 32 s 70 100 285 2.7 V < VI < 5.5 V 0.07 600 mA 1 A 2 -1 V 0.7 V 1 A Input current (FB) (TPS79301) FB = 1.8 V 1 A (1))To calculate the minimum input voltage for your maximum output current, use the following formula: VI(min) = VO(max) + VDO (max load) (2))Continuous output current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the device operate under conditions beyond those specified in this table for extended periods of time. (3))The minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. The maximum IN voltage is 5.5 V. The maximum output current is 200 mA. (4))If VO 2.5 V then VImin = 2.7 V, VImax = 5.5 V: Line Reg. (mV) + %V V O V Imax * 2.7 V 100 If VO 2.5 V then VImin = VO + 1 V, VImax = 5.5 V. 4 1000 www.ti.com SGLS162A - APRIL 2003 - REVISED JULY 2004 electrical characteristics over recommended operating free-air temperature range EN = VI, TJ = -40 to 125 C, VI = VO(typ) + 1 V, IO = 1 mA, Co = 10 F, C(byp) = 0.01 F (unless otherwise noted) (continued) PARAMETER TEST CONDITIONS f = 100 Hz, Power supply ripple rejection Dropout voltage (see Note 6) UVLO threshold MIN TYP TJ = 25C, TJ = 25C, IO = 10 mA IO = 200 mA 70 f = 10 kHz, TJ = 25C, f = 100 kHz, TJ = 25C, IO = 200 mA IO = 200 mA 70 TPS79328 IO = 200 mA, IO = 200 mA TJ = 25C 120 TPS793285 IO = 200 mA, IO = 200 mA TJ = 25C 120 TPS79330 IO = 200 mA, IO = 200 mA TJ = 25C TPS79333 IO = 200 mA, IO = 200 mA TJ = 25C TPS793475 IO = 200 mA, IO = 200 mA TJ = 25C TPS79328 f = 100 Hz, MAX 68 UNIT dB 43 200 200 mV 112 200 102 180 77 125 VCC rising 2.25 2.65 UVLO hysteresis TJ = 25C VCC rising 100 (1) IN voltage equals VO(typ) - 100 mV; The TPS79325 dropout voltage is limited by the input voltage range limitations. mV mV V mV 5 www.ti.com SGLS162A - APRIL 2003 - REVISED JULY 2004 FUNCTIONAL BLOCK DIAGRAM--ADJUSTABLE VERSION VOUT VIN UVLO Current Sense SHUTDOWN ILIM R1 _ GND + FB EN R2 UVLO Thermal Shutdown External to the Device Bandgap Reference VIN 250 k Vref Bypass FUNCTIONAL BLOCK DIAGRAM--FIXED VERSION VIN VOUT UVLO Current Sense GND SHUTDOWN ILIM _ R1 + EN UVLO R2 Thermal Shutdown Bandgap Reference VIN 250 k Vref Bypass Terminal Functions TERMINAL I/O DESCRIPTION NAME ADJ FIXED BYPASS 4 4 EN 3 3 I The EN terminal is an input which enables or shuts down the device. When EN goes to a logic high, the device will be enabled. When the device goes to a logic low, the device is in shutdown mode. FB 5 N/A I This terminal is the feedback input voltage for the adjustable device. GND 2 2 IN 1 1 I The IN terminal is the input to the device. OUT 6 5 O The OUT terminal is the regulated output of the device. 6 An external bypass capacitor, connected to this terminal, in conjunction with an internal resistor, creates a low-pass filter to further reduce regulator noise. Regulator ground www.ti.com SGLS162A - APRIL 2003 - REVISED JULY 2004 TYPICAL CHARACTERISTICS TPS79328 TPS79328 TPS79328 OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs JUNCTION TEMPERATURE GROUND CURRENT vs JUNCTION TEMPERATURE 2.805 2.805 VI = 3.8 V Co = 10 F TJ = 25 C VI = 3.8 V Co = 10 F 2.801 2.8 2.799 2.798 2.797 2.795 2.79 IO = 200 mA 2.785 2.775 0 50 100 150 200 -40 -25 -10 5 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 20 35 50 65 80 95 110 125 TJ - Junction Temperature - C Figure 2 Figure 3 TPS79328 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY Hz 0.3 0.25 V/ VI = 3.8 V Co = 2.2 F C(byp) = 0.1 F 0.2 0.15 IO = 1 mA 0.1 IO = 200 mA 0.05 0 100 1k 10 k f - Frequency - Hz 100 k 0.3 VI = 3.8 V Co = 10 F C(byp) = 0.1 F 0.25 0.2 IO = 1 mA 0.15 0.1 IO = 200 mA 0.05 0 100 1k Hz TPS79328 1.6 V/ TPS79328 Output Spectral Noise Density - Hz 100 TJ - Junction Temperature - C Figure 1 V/ IO = 200 mA 150 VI = 3.8 V Co = 10 F IO - Output Current - mA Output Spectral Noise Density - IO = 1 mA 200 50 2.78 2.796 2.795 Ground Current - A 2.802 IO = 1 mA 1.4 Output Spectral Noise Density - V O - Output Voltage - V 2.803 250 2.8 V O - Output Voltage - V 2.804 10 k 100 k VI = 3.8 V IO = 200 mA Co= 10 F 1.2 C(byp) = 0.001 F 1 C(byp) = 0.0047 F 0.8 C(byp) = 0.01 F 0.6 C(byp) = 0.1 F 0.4 0.2 0 100 1k f - Frequency - Hz Figure 5 Figure 4 10 k 100 k f - Frequency - Hz Figure 6 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE OUTPUT IMPEDANCE vs FREQUENCY 60 180 2.5 50 40 30 20 10 BW = 100 Hz to 100 0 kHz 0.001 0.01 C(byp) - Bypass Capacitance - F Figure 7 2 VI = 3.8 V Co = 10 F TJ = 25 C 160 V DO - Dropout Voltage - mV VO = 2.8 V IO = 200 mA Co = 10 F Z o - Output Impedance - RMS - Root Mean Squared Output Noise - V (RMS) TPS79328 ROOT MEAN SQUARED OUTPUT NOISE vs BYPASS CAPACITANCE 1.5 IO = 1 mA 1 IO = 100 mA 0.5 VI = 2.7 V Co = 10 F 140 120 IO = 200 mA 100 80 60 40 IO = 10 mA 20 0.1 0 10 100 1k 10 k 100 k f - Frequency - Hz Figure 8 1M 10 M 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TJ - Junction Temperature - C Figure 9 7 www.ti.com SGLS162A - APRIL 2003 - REVISED JULY 2004 TYPICAL CHARACTERISTICS TPS79328 TPS79328 TPS79328 RIPPLE REJECTION vs FREQUENCY RIPPLE REJECTION vs FREQUENCY RIPPLE REJECTION vs FREQUENCY 100 90 Ripple Rejection - dB Ripple Rejection - dB 80 70 60 50 40 IO = 10 mA 30 20 VI = 3.8 V Co = 10 F C(byp) = 0.01 F 10 0 10 100 1k 100 VI = 3.8 V Co = 2.2 F C(byp) = 0.01 F 90 IO = 200 mA 80 IO = 200 mA 70 60 50 80 IO = 10 mA 40 30 100 k 1M 60 50 IO = 10 mA 40 30 20 20 10 10 10 M IO = 200 mA 70 0 0 10 k VI = 3.8 V Co = 2.2 F C(byp) = 0.1 F 90 Ripple Rejection - dB 100 10 100 1k 10 k 100 k 1M 10 M 10 100 1k 10 k 100 k f - Frequency - Hz f - Frequency - Hz f - Frequency - Hz Figure 10 Figure 11 Figure 12 1M 10 M VI = 3.8 V VO = 2.8 V IO = 200 mA Co = 2.2 F TJ = 25C V - Output Voltage - V O 0 C(byp) = 0.001 F 3 2 C(byp) = 0.0047 F 1 C(byp) = 0.01 F 0 0 20 40 60 80 100 120 140 160 180 200 t - Time - s TPS79328 LOAD TRANSIENT RESPONSE 4.8 3.8 IO = 200 mA Co = 2.2 F C(byp) = 0.01 F 20 V - Change In O Output Voltage - mV 2 TPS79328 LINE TRANSIENT RESPONSE dv 0.4 V + s dt 0 -20 0 10 20 30 40 50 60 70 80 90 100 VI = 3.8 V Co = 10 F 20 0 -20 I O - Output Current - mA 4 V I - Input Voltage - mV Enable Voltage - V OUTPUT VOLTAGE, ENABLE VOLTAGE vs TIME (START-UP) V O - Output Voltage - mV TPS79328 -40 di 0.02A + s dt 300 200 1mA 100 0 0 50 100 150 200 250 300 350 400 450 500 t - Time - s Figure 13 Figure 14 POWER UP / POWER DOWN DC DROPOUT VOLTAGE vs OUTPUT CURRENT t - Time - s Figure 15 TPS79301 DROPOUT VOLTAGE vs INPUT VOLTAGE 200 250 VO 1s/div Figure 16 8 200 TJ = 125C 150 TJ = 25C 100 TJ = -55C 50 V DO - Dropout Voltage - mV VI DC Dropuoy Voltage - mV 500 mV/div VO = 3 V RL = 15 TJ = 125C 150 TJ = 25C 100 50 TJ = -40C IO = 200 mA 0 0 0 20 40 60 80 100 120 140 160 180 200 IO - Output Current - mA Figure 17 2.5 3 3.5 4 VI - Input Voltage - V Figure 18 4.5 5 www.ti.com SGLS162A - APRIL 2003 - REVISED JULY 2004 TYPICAL CHARACTERISTICS TYPICAL REGIONS OF STABILITY TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) EQUIVALENT SERIES RESISTANCE (ESR) vs vs OUTPUT CURRENT OUTPUT CURRENT TJ = 125C TJ = 25C TJ = -40C 3 2.8 2 1.5 1.75 2 2.25 2.5 2.75 3 VO - Output Voltage - V Figure 19 3.25 3.5 100 Co = 2.2 F VI = 5.5 V, VO 1.5 V TJ = -40C to 125C IO = 200 mA ESR - Equivalent Series Resistance - 4 ESR - Equivalent Series Resistance - V I - Minimum Required Input Voltage - V MINIMUM REQUIRED INPUT VOLTAGE vs OUTPUT VOLTAGE 10 Region of Instability 1 0.1 Region of Stability 0.01 0 0.02 0.04 0.06 0.08 IO - Output Current - A Figure 20 0.2 100 Co = 10 F VI = 5.5 V TJ = -40C to 125C 10 Region of Instability 1 0.1 Region of Stability 0.01 0 0.02 0.04 0.06 0.08 0.2 IO - Output Current - A Figure 21 9 www.ti.com SGLS162A - APRIL 2003 - REVISED JULY 2004 APPLICATION INFORMATION supply currents to less than 1 A when the regulator is turned off. The TPS793xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive battery-operated equipment. The device features extremely low dropout voltages, high PSRR, ultralow output noise, low quiescent current (170 A typically), and enable-input to reduce A typical application circuit is shown in Figure 22. TPS793xx VI 1 IN BYPASS OUT 0.1 F 4 5 VO 3 0.01 F EN + GND 2.2 F 2 Figure 22. Typical Application Circuit EXTERNAL CAPACITOR REQUIREMENTS A 0.1-F or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS793xx, is required for stability and will improve transient response, noise rejection, and ripple rejection. A higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source. Like all low dropout regulators, the TPS793xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 2.2 F. Any 2.2 F or larger ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature. The internal voltage reference is a key source of noise in 10 an LDO regulator. The TPS793xx has a BYPASS pin which is connected to the voltage reference through a 250-k internal resistor. The 250-k internal resistor, in conjunction with an external bypass capacitor connected to the BYPASS pin, creates a low pass filter to reduce the voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate properly, the current flow out of the BYPASS pin must be at a minimum, because any leakage current will create an IR drop across the internal resistor thus creating an output error. Therefore, the bypass capacitor must have minimal leakage current. For example, the TPS79328 exhibits only 32 VRMS of output voltage noise using a 0.1-F ceramic bypass capacitor and a 2.2-F ceramic output capacitor. Note that the output starts up slower as the bypass capacitance increases due to the RC time constant at the BYPASS pin that is created by the internal 250-k resistor and external capacitor. www.ti.com SGLS162A - APRIL 2003 - REVISED JULY 2004 APPLICATION INFORMATION BOARD LAYOUT RECOMMENDATION TO IMPROVE PSRR AND NOISE PERFORMANCE To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device. temperature of 125C; the maximum junction temperature should be restricted to 125C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum-power-dissipation limit is determined using the following equation: POWER DISSIPATION AND JUNCTION TEMPERATURE Specified regulator operation is assured to a junction P Where: T max * T A + J D(max) R JA (1) TJmax is the maximum allowable junction temperature. RJA is the thermal resistance junction-to-ambient for the package, see the dissipation rating table. TA is the ambient temperature. The regulator dissipation is calculated using: + V *V I D I O O Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal protection circuit. P (2) is programmed using an external resistor divider as shown in Figure 23. The output voltage is calculated using: PROGRAMMING THE TPS79301 ADJUSTABLE LDO REGULATOR The output voltage of the TPS79301 adjustable regulator V O +V ref 1 ) R1 R2 (3) Where: Vref = 1.2246 V typ (the internal reference voltage) 11 www.ti.com SGLS162A - APRIL 2003 - REVISED JULY 2004 APPLICATION INFORMATION PROGRAMMING THE TPS79301 ADJUSTABLE LDO REGULATOR (CONTINUED) Resistors R1 and R2 should be chosen for approximately 50-A divider current. Lower value resistors can be used for improved noise performance, but the solution consumes more power. Higher resistor values should be V O *1 R2 ref In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be placed between OUT and FB. For voltages <1.8 V, the (3 x 10 -7) x (R1 ) R2) C1 + (R1 x R2) The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is not used (such as in a unity-gain configuration) or if an output voltage <1.8 V is chosen, then the minimum recommended output capacitor is 4.7 F instead of 2.2 F. R1 + V avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially increases/decreases the feedback voltage and thus erroneously decreases/increases VO. The recommended design procedure is to choose R2 = 30.1 k to set the divider current at 50 A, C1 = 15 pF for stability, and then calculate R1 using: (4) value of this capacitor should be 100 pF. For voltages >1.8 V, the approximate value of this capacitor can be calculated as: (5) TPS79301 VI OUTPUT VOLTAGE PROGRAMMING GUIDE IN 1 F 2V EN OUT VO C1 R1 0.7 V 0.01 F BYPASS FB GND 1 F OUTPUT VOLTAGE R1 R2 C1 2.5 V 31.6 k 30.1 k 22 pF 3.3 V 51 k 30.1 k 15 pF 3.6 V 59 k 30.1 k 15 pF R2 Figure 23. TPS79301 Adjustable LDO Regulator Programming REGULATOR PROTECTION The TPS793xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The TPS793xx features internal current limiting and thermal protection. During normal operation, the TPS793xx limits output current to approximately 400 mA. 12 When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package or the absolute maximum voltage ratings of the device. If the temperature of the device exceeds approximately 165C, thermal-protection circuitry shuts it down. Once the device has cooled down to below approximately 140C, regulator operation resumes. PACKAGE OPTION ADDENDUM www.ti.com 25-Feb-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS79301DBVRQ1 ACTIVE SOT-23 DBV 6 3000 None Call TI Level-1-220C-UNLIM TPS79318DBVRQ1 ACTIVE SOT-23 DBV 5 3000 None Call TI Level-1-220C-UNLIM TPS79325DBVRQ1 ACTIVE SOT-23 DBV 5 3000 None Call TI Level-1-220C-UNLIM TPS79333DBVRQ1 ACTIVE SOT-23 DBV 5 3000 None Call TI Level-1-220C-UNLIM TPS793475DBVRQ1 ACTIVE SOT-23 DBV 5 3000 None Call TI Level-1-220C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. 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