MM
D
70
R
600
P Data
sheet
Jun.
2014
Revision 1
.0
Magna
Chip Semi
conductor Ltd
.
1
Parameter
V
alue
Unit
V
DS
@
T
j,max
750
V
R
DS(on),max
0.6
Ω
V
TH
,typ
3
V
I
D
7.3
A
Q
g,typ
23
nC
Order Code
Marking
T
emp. Range
Package
Packing
RoHS Status
MM
D
70
R6
00
PRH
70R600P
-55 ~ 150
℃
TO
-
25
2
Reel
Halogen Free
MM
D
70
R600P
700
V 0.6
Ω
N-channel MOS
FET
Description
MMD70R
600
P is pow
er MOSFE
T using magnac
hip
’
s advanced super
junction techn
ology that ca
n
realize v
ery low on-resistance and ga
te charge. It
will provide
much high ef
ficiency by usi
ng
optimized char
ge coupling technolo
gy
. These u
ser friendl
y devices give an
advantage of Low
EMI to
designers as w
ell as low
switching loss.
Features
Low Pow
er Loss by High Speed Sw
itching
and Lo
w
On
-Resistance
100%
Av
alanche
T
es
ted
Green Packa
ge
–
Pb Free Plating, Halo
g
en Free
Key Parameters
Ordering Informatio
n
Applications
PFC Pow
er Supply Stages
Switching
Applications
Adapter
Motor Control
DC
–
DC Converters
D
G
S
G
D
S
Package & Internal
Circui
t
MM
D
70
R
600
P Data
sheet
Jun.
2014
Revision 1
.0
Magna
Chip Semi
conductor Ltd
.
2
Parameter
Symbol
Rating
Unit
Note
Drain
–
Source vol
tage
V
DSS
700
V
Gate
–
Source vol
tage
V
GSS
±
30
V
Continuous drain
current
I
D
7.3
A
T
C
=25
℃
4.6
A
T
C
=100
℃
Pulsed drain cu
rrent
(1)
I
DM
21.9
A
Power dissi
pation
P
D
71
W
Single - pulse aval
anche energy
E
AS
142
mJ
MOSFE
T dv/dt rugged
ness
dv/dt
50
V/ns
Diode dv
/dt ruggedness
dv/dt
15
V/ns
Storage tempera
ture
T
stg
-55 ~150
℃
Maximum operatin
g junction
temperature
T
j
150
℃
1)
Pulse width t
P
limited by T
j,m
ax
2)
I
SD
≤
I
D
, V
DS peak
≤
V
(BR)DSS
Parameter
Symbol
V
alue
Unit
Thermal resistanc
e, junction-case max
R
thjc
1.75
℃
/W
Thermal resistanc
e, junction-ambient max
R
thja
62.5
℃
/W
Thermal Character
istics
Absolute Maximum
Rating (T
c
=25
℃
unl
ess otherw
ise specified)
MM
D
70
R
600
P Data
sheet
Jun.
2014
Revision 1
.0
MagnaChip Semi
conductor Ltd
.
3
Parameter
Symbol
Min.
T
yp.
Max.
Unit
T
est Condition
Drain
–
Source
Breakdow
n voltage
V
(BR)D
SS
700
-
-
V
V
GS
= 0V
,
I
D
=0.25mA
Gate
Threshold V
oltage
V
GS
(th)
2
3
4
V
V
DS
= V
GS,
I
D
=0.25mA
Zero Gate V
oltage
Drain Current
I
D
SS
-
-
1
μ
A
V
DS
=
700
V
,
V
GS
= 0V
Gate Leakage
Current
I
GSS
-
-
100
nA
V
GS
=
±3
0V
,
V
DS
=0V
Drain-Source On
State Resistance
R
DS(ON)
-
0.54
0.
6
Ω
V
GS
= 10V
, I
D
=
2.1A
Parameter
Symbol
Min.
T
yp.
Max.
Unit
T
est Condition
Input Capacitance
C
iss
-
681
-
pF
V
DS
= 25V
, V
GS
= 0V
,
f = 1.0M
Hz
Output Capacitance
C
oss
-
34.9
-
Reverse
T
ransfer Capacitance
C
rss
-
470
-
Effectiv
e Output Capaci
tance
Energy Related
(3)
C
o(er)
-
22
-
V
DS
= 0V to 5
60
V
,
V
GS
= 0V
,f = 1.0M
Hz
T
urn On
Delay
Time
t
d(on)
-
14.4
-
ns
V
GS
= 10V
, R
G
= 25Ω,
V
DS
=
3
50
V
, I
D
=
7.3A
Rise
T
ime
t
r
-
27.6
-
T
urn Of
f
Delay
T
ime
t
d(off)
-
68
-
Fall
T
ime
t
f
-
26
-
T
o
tal Gate Char
ge
Q
g
-
23
-
nC
V
GS
= 10V
, V
DS
=5
60V
I
D
=
7.3A
Gate
–
Source Cha
rge
Q
gs
-
4.3
-
Gate
–
Drain Char
ge
Q
gd
-
13
-
Gate Resistance
R
G
-
3.2
-
Ω
V
GS
= 0V
, f = 1.0M
Hz
3) C
o(er)
is a capacitance that gives the same stored energy as C
OSS
while V
DS
is
rising from 0V to 80% V
(BR)DSS
Static Characterist
ics (T
c
=25
℃
unle
ss otherw
ise specified)
Dynamic Characteri
stics (T
c
=25
℃
unl
ess otherw
ise specified)
MM
D
70
R
600
P Data
sheet
Jun.
2014
Revision 1
.0
MagnaChip Semi
conductor Ltd
.
4
Parameter
Symbol
Min.
T
yp.
Max.
Unit
T
est Condition
Continuous Diod
e Forward
Current
I
SD
-
-
7.3
A
Diode Forw
ard Voltage
V
SD
-
-
1.4
V
I
SD
=
7.3 A, VGS = 0 V
Reverse Recov
ery Time
t
rr
-
344
-
ns
I
SD
=
7.3 A
di/dt = 100 A/μs
V
DD
= 100 V
Reverse Recov
ery Charge
Q
rr
-
4.3
-
μ
C
Reverse Recov
ery Current
I
rrm
-
13.
4
-
A
Reverse Diode Ch
aracteristics (
T
c
=25
℃
unless otherw
ise specified)
MM
D
70
R
600
P Data
sheet
J
u
n
.
20
14
R
e
v
is
ion
1
.0
M
a
g
n
a
C
h
ip
S
e
mi
c
o
n
d
u
c
t
o
r
L
t
d
.
5
MM
D
70
R
600
P Data
sheet
J
u
n
.
20
14
R
e
v
is
ion
1
.0
M
a
g
n
a
C
h
ip
S
e
mi
c
o
n
d
u
c
t
o
r
L
t
d
.
6
MM
D
70
R
600
P Data
sheet
J
u
n
.
20
14
R
e
v
is
ion
1
.0
M
a
g
n
a
C
h
ip
S
e
mi
c
o
n
d
u
c
t
o
r
L
t
d
.
7
MM
D
70
R
600
P Data
sheet
Jun.
2014
Revision 1
.0
MagnaChip Semi
conductor Ltd
.
8
Circuit
V
DS
10V
1mA
DUT
100K
Ω
10V
Same type as DUT
+
-
V
DD
DUT
+
-
Same type as DUT
V
DS
+
-
I
S
R
g
10K
Ω
V
gs
±
15V
L
I
F
V
DD
DUT
+
-
I
D
V
DS
V
gs
t
p
R
L
V
DD
DUT
+
-
I
AS
V
DS
R
g
V
gs
t
p
L
10V
V
GS
Charge
Q
g
Q
gs
Q
gd
V
DS
V
GS
90%
10%
T
d(on)
t
r
t
on
T
d(off)
t
f
t
off
V
DD
t
p
t
AV
V
DS(t)
BV
DSS
I
AS
Rds(on) * I
AS
t
rr
t
a
t
b
I
FM
I
RM
d
i
/d
t
0.25 I
RM
0.75 I
RM
0.5 I
RM
V
R
V
RM(REC)
Fig15-1. Gate charge measurement circuit
Fig15-2. Gate charge waveform
Fig16-1. Diode reverse recovery test circuit
Fig16-1. Diode reverse recovery test waveform
Fig17-1. Switching time test circuit for resistive load
Fig17-2. Switching time waveform
Fig18-1. Unclamped inductive load test circuit
Fig18-2. Unclamped inductive waveform
R
g
25
Ω
Characteristic Gra
ph
MM
D
70
R
600
P Data
sheet
Jun.
2014
Revision 1
.0
MagnaChip Semi
conductor Ltd
.
9
Physical Dimensions
TO
-252 (D-P
A
K) , 3L
Dimensions are in mil
limeters, unles
s otherwise
specified
W
orld
w
ide
S
a
l
e
s
S
uppo
rt Loca
tions
MM
D
70
R
600
P Data
sheet
Jun.
2014
Revision 1
.0
MagnaChip Semi
conductor Ltd
.
10
DISCLAIMER:
The
Products
are
not
designed
for
use
in
hostile
environments,
including,
without
limitation,
aircraft,
nuclear
pow
er
generation,
medical
appliances,
and
devices
or
systems
in
which
malfunction
of
any
Product
can
reasonably
be
expected
to
result
in
a
personal
in
jury.
Seller’s
customers
using
or
selling
Seller’s
products
for
use
in
such
applications do so at their own risk and agree to fully defend and indemnify Seller.
MagnaC
hip reserves
the
right t
o change the
specifications and c
ircuitry without notice
at
any time.
Magn
aChip does
not
consid
er
responsibility
for
use
o
f
any
circ
uitry
other
than
circuitry
entirely
included
in
a
Magna
Chip
product.
is
a
registered
trademark
of
MagnaChip
Semiconductor
Ltd.
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