Device Operating
Temperature Range Package
SEMICONDUCTOR
TECHNICAL DATA
DUAL, LOW NOISE
OPERATIONAL AMPLIFIER
ORDERING INFORMATION
MC33077D
MC33077P TA = – 40° to +85°CSO–8
Plastic DIP
Order this document by MC33077/D
4
2
VEE
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
P SUFFIX
PLASTIC PACKAGE
CASE 626
1
1
8
8
PIN CONNECTIONS
1
3
5
6
7
8V
CC
Output 2
Inputs 2
Inputs 1
(Dual, Top View)
–
+1
–
+
2
Output 1
1
MOTOROLA ANALOG IC DEVICE DATA
The MC33077 is a precision high quality, high frequency, low noise
monolithic dual operational amplifier employing innovative bipolar design
techniques. Precision matching coupled with a unique analog resistor trim
technique is used to obtain low input offset voltages. Dual–doublet frequency
compensation techniques are used to enhance the gain bandwidth product
of the amplifier. In addition, the MC33077 offers low input noise voltage, low
temperature coefficient of input offset voltage, high slew rate, high AC and
DC open loop voltage gain and low supply current drain. The all NPN
transistor output stage exhibits no deadband cross–over distortion, large
output voltage swing, excellent phase and gain margins, low open loop
output impedance and symmetrical source and sink AC frequency
performance.
The MC33077 is tested over the automotive temperature range and is
available in plastic DIP and SO–8 packages (P and D suf fixes).
•Low Voltage Noise: 4.4 nV/ Hz
Ǹ
@ 1.0 kHz
•Low Input Offset Voltage: 0.2 mV
•Low TC of Input Offset Voltage: 2.0 µV/°C
•High Gain Bandwidth Product: 37 MHz @ 100 kHz
•High AC Voltage Gain: 370 @ 100 kHz
High AC Voltage Gain: 1850 @ 20 kHz
•Unity Gain Stable: with Capacitance Loads to 500 pF
•High Slew Rate: 11 V/µs
•Low Total Harmonic Distortion: 0.007%
•Large Output Voltage Swing: +14 V to –14.7 V
•High DC Open Loop Voltage Gain: 400 k (112 dB)
•High Common Mode Rejection: 107 dB
•Low Power Supply Drain Current: 3.5 mA
•Dual Supply Operation: ±2.5 V to ±18 V
Q1
R1 R6 R8 R11 R16
Q17
Q19
Q13
Q11
D3
R9
C3
Q8
R3
Q6
C1
J1
Q1
D1
Q5
R2
R4 R7
R5 C2
PosQ7 Q9
Q10 Q12
VCC
Q21
Vout
R19
Q22
R20
Q20
C8
C7
D7
R17 R18
D6
Q14
D4
R13
C6 R14
Q16
Z1
Neg
Q4
D2
R10 R12 D5 R15
VEE
Bias Network
Representative Schematic Diagram (Each Amplifier)
Q2
Motorola, Inc. 1996 Rev 0
MC33077
2 MOTOROLA ANALOG IC DEVICE DATA
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage (VCC to VEE) VS+36 V
Input Differential Voltage Range VIDR (Note 1) V
Input Voltage Range VIR (Note 1) V
Output Short Circuit Duration (Note 2) tSC Indefinite sec
Maximum Junction Temperature TJ+150 °C
Storage Temperature Tstg –60 to +150 °C
Maximum Power Dissipation PD(Note 2) mW
NOTES: 1.Either or both input voltages should not exceed VCC or VEE (See Applications Information).
2.Power dissipation must be considered to ensure maximum junction temperature (TJ) is not
exceeded (See power dissipation performance characteristic, Figure 1).
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.)
Characteristics Symbol Min Typ Max Unit
Input Offset Voltage (RS = 10 Ω, VCM = 0 V, VO = 0 V)
TA = +25°C
TA = –40° to +85°C
|VIO|—
—0.13
—1.0
1.5
mV
Average Temperature Coefficient of Input Offset Voltage
RS = 10 Ω, VCM = 0 V, VO = 0 V, TA = –40° to +85°C∆VIO/∆T — 2.0 — µV/°C
Input Bias Current (VCM = 0 V, VO = 0 V)
TA = +25°C
TA = –40° to +85°C
IIB —
—280
—1000
1200
nA
Input Offset Current (VCM = 0 V, VO = 0 V)
TA = +25°C
TA = –40° to +85°C
IIO —
—15
—180
240
nA
Common Mode Input Voltage Range (∆VIO ,= 5.0 mV, VO = 0 V) VICR ±13.5 ±14 — V
Large Signal Voltage Gain (VO = ±1.0 V, RL = 2.0 kΩ)
TA = +25°C
TA = –40° to +85°C
AVOL 150 k
125 k 400 k
——
—
V/V
Output Voltage Swing (VID = ±1.0 V)
RL = 2.0 kΩ
RL = 2.0 kΩ
RL = 10 kΩ
RL = 10 kΩ
VO+
VO–
VO+
VO–
+13.0
—
+13.4
—
+13.6
–14.1
+14.0
–14.7
—
–13.5
—
–14.3
V
Common Mode Rejection (Vin = ±13 V) CMR 85 107 — dB
Power Supply Rejection (Note 3)
VCC/VEE = +15 V/ –15 V to +5.0 V/ –5.0 V PSR 80 90 — dB
Output Short Circuit Current (VID = ±1.0 V, Output to Ground)
Source
Sink
ISC +10
–20 +26
–33 +60
+60
mA
Power Supply Current (VO = 0 V, All Amplifiers)
TA = +25°C
TA = –40° to +85°C
ID—
—3.5
—4.5
4.8
mA
NOTE: 3. Measured with VCC and VEE simultaneously varied.
MC33077
3
MOTOROLA ANALOG IC DEVICE DATA
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.)
Characteristics Symbol Min Typ Max Unit
Slew Rate (Vin = –10 V to +10 V, RL = 2.0 kΩ, CL = 100 pF, AV = +1.0) SR 8.0 11 — V/µs
Gain Bandwidth Product (f = 100 kHz) GBW 25 37 — MHz
AC Voltage Gain (RL = 2.0 kΩ, VO = 0 V)
f = 100 kHz
f = 20 kHz
AVO —
—370
1850 —
—
V/V
Unity Gain Frequency (Open Loop) fU— 7.5 — MHz
Gain Margin (RL = 2.0 kΩ, CL = 10 pF) Am— 10 — dB
Phase Margin (RL = 2.0 kΩ, CL = 10 pF) ∅m— 55 — Degrees
Channel Separation (f = 20 Hz to 20 kHz, RL = 2.0 kΩ, VO = 10 Vpp)CS — –120 — dB
Power Bandwidth (VO = 27p–p, RL = 2.0 kΩ, THD ≤ 1%) BWp— 200 — kHz
Distortion (RL = 2.0 kΩ)
AV = +1.0, f = 20 Hz to 20 kHz
VO = 3.0 V rms
AV = 2000, f = 20 kHz
VO = 2.0 Vpp
VO = 10 Vpp
AV = 4000, f = 100 kHz
VO = 2.0 Vpp
VO = 10 Vpp
THD
—
—
—
—
—
0.007
0.215
0.242
0.3.19
0.316
—
—
—
—
—
%
Open Loop Output Impedance (VO = 0 V, f = fU)|ZO| — 36 — Ω
Differential Input Resistance (VCM = 0 V) Rin —270 — kΩ
Differential Input Capacitance (VCM = 0 V) Cin —15 — pF
Equivalent Input Noise Voltage (RS = 100 Ω)
f = 10 Hz
f = 1.0 kHz
en—
—6.7
4.4 —
—
nV/ Hz√
Equivalent Input Noise Current (f = 1.0 kHz)
f = 10 Hz
f = 1.0 kHz
in—
—1.3
0.6 —
—
pA/ Hz√
PD(MAX), MAXIMUM POWER DISSIPATION (mW)
Figure 1. Maximum Power Dissipation
versus Temperature Figure 2. Input Bias Current
versus Supply Voltage
TA, AMBIENT TEMPERATURE (
°
C)
MC33077P
MC33077D
VCC, |VEE|, SUPPLY VOLTAGE (V)
, INPUT BIAS CURRENT (nA)IIB
VCM = 0 V
TA = 25
°
C
2400
2000
1600
1200
800
400
0
800
600
400
200
0
–60 –40 –20 0 20 40 60 80 100 120 140 160 180 0 2.5 5.0 7.5 10 12.5 15 17.5 20
MC33077
4 MOTOROLA ANALOG IC DEVICE DATA
Figure 3. Input Bias Current
versus Temperature Figure 4. Input Offset Voltage
versus Temperature
Figure 5. Input Bias Current versus
Common Mode Voltage Figure 6. Input Common Mode Voltage Range
versus Temperature
Figure 7. Output Saturation Voltage versus
Load Resistance to Ground Figure 8. Output Short Circuit Current
versus Temperature
TA, AMBIENT TEMPERATURE (
°
C)
VCC = +15 V
VEE = –15 V
VCM = 0 V
, INPUT BIAS CURRENT (nA)IIB
V , INPUT OFFSET VOLTAGE (mV)
IO
TA, AMBIENT TEMPERATURE (
°
C)
VCC = +15 V
VEE = –15 V
RS = 10
Ω
VCM = 0 V
AV = +1.0
VCM, COMMON MODE VOLTAGE (V)
, INPUT BIAS CURRENT (nA)IIB
VCC = +15 V
VEE = –15 V
TA = 25
°
C
TA, AMBIENT TEMPERATURE (
°
C)
Input
Voltage
Range
VCC = +3.0 V to +15 V
VEE = –3.0 V to –15 V
∆
VIO = 5.0 mV
VO = 0 V
+VCM
–VCM
VICR , INPUT COMMON MODE VOTAGE RANGE (V)
RL, LOAD RESISTANCE TO GROUND (k
Ω
)
V , OUTPUT SATURATION VOLTAGE (V)
sat
VCC = +15 V
VEE = –15 V
125
°
C
25
°
C
–55
°
C
125
°
C25
°
C
–55
°
CSink
Source
TA, AMBIENT TEMPERATURE (
°
C)
|I |, OUTPUT SHOR T CIRCUIT CURRENT (mA)
SC
VCC = +15 V
VEE = –15 V
VID =
±
1.0 V
RL < 100
Ω
1000
800
600
400
200
0
1.0
0.5
0
–0.5
–1.0
600
500
400
300
200
100
0
VCC 0.0
VCC –0.5
VCC –1.0
VCC –1.5
VEE +1.5
VEE +1.0
VEE +0.5
VEE +0.0
VCC 0
VCC –2
VCC –4
VEE +4
VEE +2
VEE 0
50
40
30
20
10
–55 –25 0 25 50 75 100 125 –55 –25 0 25 50 75 100 125
–15 –10 –5.0 0 5.0 10 15 –55 –25 0 25 50 75 100 125
0 0.5 1.0 1.5 2.0 2.5 3.0 –55 –25 0 25 50 75 100 125
MC33077
5
MOTOROLA ANALOG IC DEVICE DATA
Figure 9. Supply Current
versus Temperature Figure 10. Common Mode Rejection
versus Frequency
Figure 11. Power Supply Rejection
versus Frequency Figure 12. Gain Bandwidth Product
versus Supply Voltage
Figure 13. Gain Bandwidth Product
versus Temperature Figure 14. Maximum Output Voltage
versus Supply Voltage
±
15 V
I , SUPPLY CURRENT (mA)
CC
TA, AMBIENT TEMPERATURE (
°
C)
±
5.0 V
VCM = 0 V
RL =
∞
VO = 0 V
CMR, COMMON MODE REJECTION (dB)
f, FREQUENCY (Hz)
VCC = +15 V
VEE = –15 V
VCM = 0 V
∆
VCM =
±
1.5 V
TA = 25
°
C
f, FREQUENCY (Hz)
PSR, POWER SUPPLY REJECTION (dB)
–PSR
+PSR
+PSR = 20Log
∆
VO/ADM
∆
VCC –PSR = 20Log
∆
VO/ADM
∆
VEE RL = 10 k
Ω
CL = 0 pF
f = 100 kHz
TA = 25
°
C
GBW, GAIN BANDWIDTH PRODUCT (MHz)
VCC, |VEE|, SUPPLY VOLTAGE (V)
TA, AMBIENT TEMPERATURE (
°
C)
GBW, GAIN BANDWIDTH PRODUCT (MHz)
VCC = +15 V
VEE = –15 V
f = 100 kHz
RL = 10 k
Ω
CL = 0 pF
Vp +
Vp –
VCC, |VEE|, SUPPLY VOLTAGE (V)
VO,OUTPUT VOLTAGE (V )
p
RL = 10 k
Ω
RL = 10 k
Ω
RL = 2.0 k
Ω
RL = 2.0 k
Ω
TA = 25
°
C
5.0
4.0
3.0
2.0
1.0
0
120
100
80
60
40
20
0
120
100
80
60
40
20
0
48
44
40
36
32
28
24
50
46
42
38
34
30
26
20
15
10
5.0
0
–5.0
–10
–15
–20
–55 –25 0 25 50 75 100 125 100 1.0 k 10 k 100 k 1.0 M 10 M
100 1.0 k 10 k 100 k 1.0 M 0 5 10 15 20
–55 –25 0 25 50 75 100 125 0 5.0 10 15 20
CMR = 20Log
–
+
ADM
∆
VCM
∆
VO
∆
VO
∆
VCM
×
ADM
VCC = +15 V
VEE = –15 V
TA = 25
°
C
–
+
∆
VO
ADM
VEE
VCC
MC33077
6 MOTOROLA ANALOG IC DEVICE DATA
VO, OUTPUT VOLTAGE (V )
pp
Figure 15. Output Voltage
versus Frequency Figure 16. Open Loop Voltage Gain
versus Supply Voltage
Figure 17. Open Loop Voltage Gain
versus Temperature Figure 18. Output Impedance
versus Frequency
Figure 19. Channel Separation
versus Frequency Figure 20. Total Harmonic Distortion
versus Frequency
f, FREQUENCY (Hz) VCC, |VEE|, SUPPLY VOLTAGE (V)
OPEN LOOP VOLTAGE GAIN (X1000 V/V)AVOL,
RL = 2.0 k
Ω
f = 10 Hz
∆
VO = 2/3 (VCC –VEE)
TA = 25
°
C
OPEN LOOP VOLTAGE GAIN (X1000 V/V)AVOL,
TA, AMBIENT TEMPERATURE (
°
C)
VCC = +15 V
VEE = –15 V
RL = 2.0 k
Ω
f = 10 Hz
∆
VO = –10 V to +10 V
f, FREQUENCY (Hz)
CS, CHANNEL SEP ARATION (dB)
∆
VOD
∆
Vin
CS = 20 Log
Drive Channel
VCC = +15 V
VEE = –15 V
RL = 2.0 k
Ω
∆
VOD = 20 Vpp
TA = 25
°
CAV = +10
AV = +100
AV = +1000
THD, TOTAL HARMONIC DIST OR TION (%)
f, FREQUENCY (Hz)
AV = 1000 AV = 100
AV = 10
AV = 1.0
f, FREQUENCY (Hz)
| Z |, OUTPUT IMPEDANCE ( )
O
Ω
30
25
20
15
10
5.0
0
1200
1000
800
600
400
200
0
600
550
500
450
400
350
300
160
150
140
130
120
110
100
1.0
0.1
0.01
0.001
80
70
60
50
40
30
20
10
0
100 1.0 k 10 k 100 k 1.0 M 0 5.0 10 15 20
–55 –25 0 25 50 75 100 125
10 100 1.0 k 10 k 100 k 10 100 1.0 k 10 k 100 k
100 1.0 k 10 k 100 k 1.0 M 10 M
VCC = +15 V
VEE = –15 V
RL = 2.0 k
Ω
AV =+1.0
THD
≤
1.0%
TA = 25
°
C
VCC = +15 V
VEE = –15 V
VO = 0 V
TA = 25
°
C
∆
Vin
∆
VO
–
+
Measurement Channel
VCC = +15 V VO = 2.0 Vpp
VEE = –15 V TA = 25
°
C
Vin VO
–
+
2.0 k
Ω
RA
100 k
Ω
AV = +1.0
MC33077
7
MOTOROLA ANALOG IC DEVICE DATA
AV = +1000
AV = +100
AV = +10
AV = +1.0
Figure 21. Total Harmonic Distortion
versus Frequency Figure 22. Total Harmonic Distortion
versus Output Voltage
Figure 23. Slew Rate versus Supply Voltage Figure 24. Slew Rate versus Temperature
Figure 25. Voltage Gain and Phase
versus Frequency Figure 26. Open Loop Gain Margin and Phase
Margin versus Output Load Capacitance
VCC = +15 V
VEE = –15 V
V0 = –10 Vpp
TA = 25
°
C
THD, TOTAL HARMONIC DIST OR TION (%)
f, FREQUENCY (Hz) VO, OUTPUT VOLTAGE (Vpp)
THD, TOTAL HARMONIC DIST OR TION (%)
VCC = +15 V
VEE = –15 V
f = 20 kHz
TA = 25
°
C
VCC, |VEE|, SUPPLY VOLTAGE (V)
SR, SLEW RATE (V/ s)
µ
Vin = 2/3 (VCC –VEE)
TA = 25
°
C
SR, SLEW RATE (V/ s)
µ
TA, AMBIENT TEMPERATURE (
°
C)
VCC = +15 V
VEE = –15 V
∆
Vin = 20 V
f, FREQUENCY (Hz)
0
40
80
120
160
200
240
φ
, EXCESS PHASE (DEGREES)
OPEN–LOOP VOLT AGE GAIN (dB)AVOL,
A , OPEN LOOP GAIN MARGIN (dB)
m
0
10
20
30
40
50
60
φ
, PHASE MARGIN (DEGREES)
m
70
CL, OUTPUT LOAD CAPACITANCE (pF)
VCC = +15 V
VEE = –15 V
VO = 0 V
Phase
Gain
125
°
C
25
°
C
–55
°
C
–55
°
C25
°
C
125
°
C
Gain
Phase
VCC = +15 V
VEE = –15 V
RL = 2.0 k
Ω
TA = 25
°
C
1.0
0.1
0.01
0.001
1.0
0.5
0.1
0.05
0.01
0.005
0.001
16
12
8.0
4.0
0
40
30
20
10
0
180
140
100
60
20
–20
–60
14
12
10
8.0
6.0
4.0
2.0
0
10 100 1.0 k 10 k 100 k 0 2.0 4.0 6.0 8.0 10 12
0 2.5 5.0 7.5 10 12.5 15 17.5 20 –25 0 25 50 75 100 125–55
10 100 1.0 k 10 k 100 k 1.0 M 10 M 100 M 1.0 10 100 1000
Vin VO
–
+
2.0 k
Ω
RA
100 k
Ω
AV = +1000
AV = +100
AV = +10
AV = +1.0
Vin VO
–
+
2.0 k
Ω
RA
100 k
Ω
∆
Vin VO
100 pF
2.0 k
Ω
–
+
VO
100 pF
2.0 k
Ω
–
+
∆
Vin
Vin VO
CL
2.0 k
Ω
–
+
MC33077
8 MOTOROLA ANALOG IC DEVICE DATA
VCC = +15 V
VEE = –15 V
RT = R1 + R2
VO = 0 V
TA = 25
°
C
Gain
Phase
125
°
C and 25
°
C–55
°
C
VCC = +15 V
VEE = –15 V
∆
Vin = 100 mV
Figure 27. Phase Margin versus
Output Voltage Figure 28. Overshoot versus
Output Load Capacitance
Figure 29. Input Referred Noise Voltage
and Current versus Frequency Figure 30. Total Input Referred Noise Voltage
versus Source Resistant
Figure 31. Phase Margin and Gain Margin
versus Differential Source Resistance Figure 32. Inverting Amplifer Slew Rate
VO, OUTPUT VOLTAGE (V)
VCC = +15 V
VEE = –15 V
TA = 25
°
C
CL = 0 pF
CL = 100 pF
CL = 300 pF
CL = 500 pF
φ
, PHASE MARGIN (DEGREES)
m
CL, OUTPUT LOAD CAPACITANCE (pF)
os, OVERSHOOT (%)
f, FREQUENCY (Hz)
e , INPUT REFERRED NOISE VOLTAGE ( )
n
10
5.0
3.0
2.0
1.0
0.5
0.3
0.2
0.1
i ,INPUT REFERRED NOISE CURRENT (pA)
n
nV/ Hz√
V , TOTAL REFERRED NOISE VOLTAGE ( )
n
VCC = +15 V f = 1.0 kHz
VEE = –15 V TA = 25
°
C
Vn (total) =
RS, SOURCE RESISTANCE (
Ω
)
nV/ Hz√
0
10
20
30
40
50
60
70
φ
m,PHASE MARGIN (DEGREES)
RT, DIFFERENTIAL SOURCE RESISTANCE (
Ω
)
A , GAIN MARGIN (dB)
m
V , OUTPUT VOLT AGE (5.0 V/DIV)
O
t, TIME (2.0
µ
s/DIV)
V
70
60
50
40
30
20
10
0
100
80
60
40
20
0
100
50
30
20
10
5.0
3.0
2.0
1.0
1000
100
10
1.0
14
12
10
8.0
6.0
4.0
2.0
0
–10 –5.0 0 5.0 10 1 10 100 1000
1.0 10 100 1.0 k 10 k 100 k 10 100 1.0 k 10 k 100 k 1.0 M
1.0 10 100 1.0 k 10 k
Vin VO
CL
2.0k
Ω
–
+
VO
100 pF
2.0 k
Ω
–
+
∆
Vin
VCC = +15 V
VEE = –15 V
TA = 25
°
C
Voltage
Current
R2
VO
–
+
Vin
R
1
(inRs)2
)
en2
)
4KTRS
Ǹ
VCC = +15 V
VEE = –15 V
AV = –1.0
RL = 2.0 k
Ω
CL = 100 pF
TA = 25
°
C
MC33077
9
MOTOROLA ANALOG IC DEVICE DATA
Figure 33. Noninverting Amplifier Slew Rate Figure 34. Noninverting Amplifier Overshoot
Figure 35. Low Frequency Noise Voltage
versus Time
V , OUTPUT VOLTAGE (5.0 V/DIV)
O
t, TIME (2.0
µ
s/DIV) t, TIME (200 ns/DIV)
e , INPUT NOISE VOLTAGE (100nV/DIV)
n
t, TIME (1.0 sec/DIV)
V , OUTPUT VOLTAGE (5.0 V/DIV)
O
VCC = +15 V
VEE = –15 V
AV = +1.0
RL = 2.0 k
Ω
TA = 25
°
CCL = 0 pF
CL = 100 pF
VCC = +15 V
VEE = –15 V
BW = 0.1 Hz to 10 Hz
TA = 25
°
C
See Noise Circuit
(Figure 36)
VCC = +15 V
VEE = –15 V
AV = +1.0
RL = 2.0 k
Ω
CL = 100 pF
TA = 25
°
C
MC33077
10 MOTOROLA ANALOG IC DEVICE DATA
APPLICATIONS INFORMATION
The MC33077 is designed primarily for its low noise, low
offset voltage, high gain bandwidth product and large output
swing characteristics. Its outstanding high frequency
gain/phase performance make it a very attractive amplifier for
high quality preamps, instrumentation amps, active filters
and other applications requiring precision quality
characteristics.
The MC33077 utilizes high frequency lateral PNP input
transistors in a low noise bipolar differential stage driving a
compensated Miller integration amplifier. Dual–doublet
frequency compensation techniques are used to enhance the
gain bandwidth product. The output stage uses an all NPN
transistor design which provides greater output voltage swing
and improved frequency performance over more
conventional stages by using both PNP and NPN transistors
(Class AB). This combination produces an amplifier with
superior characteristics.
Through precision component matching and innovative
current mirror design, a lower than normal temperature
coefficient of input of fset voltage (2.0 µV/°C as opposed to 10
µV/°C), as well as low input offset voltage, is accomplished.
The minimum common mode input range is from 1.5 V
below the positive rail (VCC) to 1.5 V above the negative rail
(VEE). The inputs will typically common mode to within 1.0 V
of both negative and positive rails though degradation in
offset voltage and gain will be experienced as the common
mode voltage nears either supply rail. In practice, though not
recommended, the input voltage may exceed VCC by
approximately 30 V and decrease below the VEE by
approximately 0.6 V without causing permanent damage to
the device. If the input voltage on either or both inputs is less
than approximately 0.6 V, excessive current may flow, if not
limited, causing permanent damage to the device.
The amplifier will not latch with input source currents up to
20 mA, though in practice, source currents should be limited
to 5.0 mA to avoid any parametric damage to the device. If
both inputs exceed VCC, the output will be in the high state
and phase reversal may occur. No phase reversal will occur
if the voltage on one input is within the common mode range
and the voltage on the other input exceeds VCC. Phase
reversal may occur if the input voltage on either or both inputs
is less than 1.0 V above the negative rail. Phase reversal will
be experienced if the voltage on either or both inputs is less
than VEE.
Through the use of dual–doublet frequency compensation
techniques, the gain bandwidth product has been greatly
enhanced over other amplifiers using the conventional single
pole compensation. The phase and gain error of the amplifier
remains low to higher frequencies for fixed amplifier gain
configurations.
With the all NPN output stage, there is minimal swing loss
to the supply rails, producing superior output swing, no
crossover distortion and improved output phase symmetry
with output voltage excursions (output phase symmetry
being the amplifiers ability to maintain a constant phase
relation independent of its output voltage swing). Output
phase symmetry degradation in the more conventional PNP
and NPN transistor output stage was primarily due to the
inherent cut–off frequency mismatch of the PNP and NPN
transistors used (typically 10 MHz and 300 MHz,
respectively), causing considerable phase change to occur
as the output voltage changes. By eliminating the PNP in the
output, such phase change has been avoided and a very
significant improvement in output phase symmetry as well as
output swing has been accomplished.
The output swing improvement is most noticeable when
operation is with lower supply voltages (typically 30% with
±5.0 V supplies). With a 10 k load, the output of the amplifier
can typically swing to within 1.0 V of the positive rail (VCC),
and to within 0.3 V of the negative rail (VEE), producing a 28.7
Vpp signal from ±15 V supplies. Output voltage swing can be
further improved by using an output pull–up resistor
referenced to the VCC. Where output signals are referenced
to the positive supply rail, the pull–up resistor will pull the
output to VCC during the positive swing, and during the
negative swing, the NPN output transistor collector will pull
the output very near VEE. This configuration will produce the
maximum attainable output signal from given supply
voltages. The value of load resistance used should be much
less than any feedback resistance to avoid excess loading
and allow easy pull–up of the output.
Output impedance of the amplifier is typically less than
50 Ω at frequencies less than the unity gain crossover
frequency (see Figure 18). The amplifier is unity gain stable
with output capacitance loads up to 500 pF at full output
swing over the –55° to +125°C temperature range. Output
phase symmetry is excellent with typically 4°C total phase
change over a 20 V output excursion at 25°C with a 2.0 kΩ
and 100 pF load. With a 2.0 kΩ resistive load and no
capacitance loading, the total phase change is approximately
one degree for the same 20 V output excursion. With a
2.0 kΩ and 500 pF load at 125°C, the total phase change is
typically only 10°C for a 20 V output excursion (see Figure
27).
As with all amplifiers, care should be exercised to insure
that one does not create a pole at the input of the amplifier
which is near the closed loop corner frequency. This
becomes a greater concern when using high frequency
amplifiers since it is very easy to create such a pole with
relatively small values of resistance on the inputs. If this does
MC33077
11
MOTOROLA ANALOG IC DEVICE DATA
occur , the amplifier’s phase will degrade severely causing the
amplifier to become unstable. Effective source resistances,
acting in conjunction with the input capacitance of the
amplifier , should be kept to a minimum to avoid creating such
a pole at the input (see Figure 31). There is minimal effect on
stability where the created input pole is much greater than the
closed loop corner frequency. Where amplifier stability is
affected as a result of a negative feedback resistor in
conjunction with the amplifier’s input capacitance, creating a
pole near the closed loop corner frequency, lead capacitor
compensation techniques (lead capacitor in parallel with the
feedback resistor) can be employed to improve stability. The
feedback resistor and lead capacitor RC time constant
should be larger than that of the uncompensated input pole
frequency. Having a high resistance connected to the
noninverting input of the amplifier can create a like instability
problem. Compensation for this condition can be
accomplished by adding a lead capacitor in parallel with the
noninverting input resistor of such a value as to make the RC
time constant larger than the RC time constant of the
uncompensated input resistor acting in conjunction with the
amplifiers input capacitance.
For optimum frequency performance and stability, careful
component placement and printed circuit board layout should
be exercised. For example, long unshielded input or output
leads may result in unwanted input output coupling. In order
to reduce the input capacitance, the body of resistors
connected to the input pins should be physically close to the
input pins. This not only minimizes the input pole creation for
optimum frequency response, but also minimizes extraneous
signal “pickup” at this node. Power supplies should be
decoupled with adequate capacitance as close as possible to
the device supply pin.
In addition to amplifier stability considerations, input
source resistance values should be low to take full advantage
of the low noise characteristics of the amplifier. Thermal
noise (Johnson Noise) of a resistor is generated by
thermally–charged carriers randomly moving within the
resistor creating a voltage. The rms thermal noise voltage in
a resistor can be calculated from:
Enr = 4k TR × BW
/
where:
k = Boltzmann’s Constant (1.38 × 10–23 joules/k)
T = Kelvin temperature
R = Resistance in ohms
BW = Upper and lower frequency limit in Hertz.
By way of reference, a 1.0 kΩ resistor at 25°C will produce
a 4.0 nV/ Hz√ of rms noise voltage. If this resistor is
connected to the input of the amplifier, the noise voltage will
be gained–up in accordance to the amplifier’s gain
configuration. For this reason, the selection of input source
resistance for low noise circuit applications warrants serious
consideration. The total noise of the amplifier, as referred to
its inputs, is typically only 4.4 nV/ Hz√ at 1.0 kHz.
The output of any one amplifier is current limited and thus
protected from a direct short to ground, However , under such
conditions, it is important not to allow the amplifier to exceed
the maximum junction temperature rating. T ypically for ±15 V
supplies, any one output can be shorted continuously to
ground without exceeding the temperature rating.
Figure 36. Voltage Noise Test Circuit
(0.1 Hz to 10 Hzp–p)
Note: All capacitors are non–polarized.
+
–
0.1
µ
F
10
Ω
100 k
Ω
2.0 k
Ω
4.7
µ
F
Voltage Gain = 50,000
Scope
×
1
Rin = 1.0 M
Ω
1/2
MC33077
–
+
D.U.T.
100 k
Ω
0.1
µ
F
2.2
µ
F
22
µ
F
24.3 k
Ω
4.3 k
Ω
110 k
Ω
MC33077
12 MOTOROLA ANALOG IC DEVICE DATA
P SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE R
OUTLINE DIMENSIONS
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
58
F
NOTE 2 –A–
–B–
–T–
SEATING
PLANE
H
J
GDK
N
C
L
M
M
A
M
0.13 (0.005) B M
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.40 10.16 0.370 0.400
B6.10 6.60 0.240 0.260
C3.94 4.45 0.155 0.175
D0.38 0.51 0.015 0.020
F1.02 1.78 0.040 0.070
G2.54 BSC 0.100 BSC
H0.76 1.27 0.030 0.050
J0.20 0.30 0.008 0.012
K2.92 3.43 0.115 0.135
L7.62 BSC 0.300 BSC
M––– 10 ––– 10
N0.76 1.01 0.030 0.040
__
SEATING
PLANE
14
58
A0.25 MCBSS
0.25 MBM
h
q
C
X 45
_
L
DIM MIN MAX
MILLIMETERS
A1.35 1.75
A1 0.10 0.25
B0.35 0.49
C0.18 0.25
D4.80 5.00
E1.27 BSCe3.80 4.00
H5.80 6.20
h
0 7
L0.40 1.25
q
0.25 0.50
__
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETERS.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
D
EH
A
Be
B
A1
CA
0.10
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
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MC33077/D
*MC33077/D*
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