IPU06N03LB OptiMOS(R)2 Power-Transistor IPS06N03LB Product Summary Features * Ideal for high-frequency dc/dc converters * Qualified according to JEDEC1) for target applications V DS 30 V R DS(on),max 5.8 m ID 50 A * N-channel - Logic level * Excellent gate charge x R DS(on) product (FOM) * Very low on-resistance R DS(on) PG-TO251-3-11 * Superior thermal resistance PG-TO251-3 * 175 C operating temperature * dv /dt rated * Pb-free lead plating; RoHS compliant Type Package Marking IPU06N03LB PG-TO251-3 06N03LB IPS06N03LB PG-TO251-3-11 06N03LB Maximum ratings, at T j=25 C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value T C=25 C2) 50 T C=100 C 50 Pulsed drain current I D,pulse T C=25 C3) 200 Avalanche energy, single pulse E AS I D=50 A, R GS=25 210 Reverse diode dv /dt dv /dt I D=50 A, V DS=20 V, di /dt =200 A/s, T j,max=175 C 6 Gate source voltage4) V GS Power dissipation P tot Operating and storage temperature T j, T stg T C=25 C IEC climatic category; DIN IEC 68-1 1) Rev. 0.4 Unit A mJ kV/s 20 V 94 W -55 ... 175 C 55/175/56 J-STD20 and JESD22 page 1 2008-04-23 IPU06N03LB Parameter IPS06N03LB Values Symbol Conditions Unit min. typ. max. - - 1.6 minimal footprint - - 62 6 cm2 cooling area5) - - 40 30 - - Thermal characteristics Thermal resistance, junction - case R thJC SMD version, device on PCB R thJA K/W Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA Gate threshold voltage V GS(th) V DS=V GS, I D=40 A 1.2 1.6 2 Zero gate voltage drain current I DSS V DS=30 V, V GS=0 V, T j=25 C - 0.1 1 V DS=30 V, V GS=0 V, T j=125 C - 10 100 I GSS V GS=20 V, V DS=0 V - 10 100 nA R DS(on) V GS=4.5 V, I D=50 A - 7.3 9.1 m V GS=10 V, I D=50 A - 4.9 5.8 - 1.2 - 41 83 - S Gate-source leakage current Gate resistance RG Transconductance g fs |V DS|>2|I D|R DS(on)max, I D=50 A 2) Current is limited by bondwire; with an R thJC=1.6 K/W the chip is able to carry 95 A. 3) See figure 3 4) T j,max=150 C and duty cycle D <0.25 for V GS<-5 V V A 5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. Rev. 0.4 page 2 2008-04-23 IPU06N03LB Parameter IPS06N03LB Values Symbol Conditions Unit min. typ. max. - 2400 3200 - 860 1150 Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 110 170 Turn-on delay time t d(on) - 7 10 Rise time tr - 6 9 Turn-off delay time t d(off) - 27 40 Fall time tf - 4.2 6.3 Gate to source charge Q gs - 7.4 9.9 Gate charge at threshold Q g(th) - 3.9 5.1 Gate to drain charge Q gd - 4.9 7.3 Switching charge Q sw - 8.4 12 Gate charge total Qg - 19 25 Gate plateau voltage V plateau - 3.1 - Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 5 V - 16 22 Output charge Q oss V DD=15 V, V GS=0 V - 19 26 - - 50 - - 200 V GS=0 V, V DS=15 V, f =1 MHz V DD=15 V, V GS=10 V, I D=25 A, R G=2.7 pF ns Gate Charge Characteristics 6) V DD=15 V, I D=25 A, V GS=0 to 5 V nC V nC Reverse Diode Diode continous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=50 A, T j=25 C - 0.92 1.2 V Reverse recovery charge Q rr V R=15 V, I F=I S, di F/dt =400 A/s - - 10 nC 6) Rev. 0.4 T C=25 C A See figure 16 for gate charge parameter definition page 3 2008-04-23 IPU06N03LB 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS10 V 100 IPS06N03LB 60 90 50 80 70 40 I D [A] P tot [W] 60 50 30 40 20 30 20 10 10 0 0 0 50 100 150 200 0 50 100 T C [C] 150 200 T C [C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 1000 10 limited by on-state resistance 1 s 1 0.5 10 s 100 0.2 Z thJC [K/W] I D [A] 100 s DC 1 ms 0.1 0.1 0.05 0.02 0.01 single pulse 10 ms 10 0.01 1 0.001 0.1 1 10 100 -5 10 0 100-4 10-30 10-20 10-1 0 100 1 t p [s] V DS [V] Rev. 0.4 -6 010 page 4 2008-04-23 IPU06N03LB IPS06N03LB 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 C R DS(on)=f(I D); T j=25 C parameter: V GS parameter: V GS 25 150 10 V 4.5 V 3V 3.2 V 3.8 V 3.5 V 4.1 V 130 20 4.1 V 110 R DS(on) [m] 90 I D [A] 3.8 V 70 50 3.5 V 30 3.2 V 15 10 4.5 V 10 V 5 3V 10 2.8 V 0 -10 0 1 2 3 0 20 40 V DS [V] 60 80 100 120 I D [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 C parameter: T j 100 120 90 100 80 70 80 g fs [S] I D [A] 60 50 60 40 40 30 20 20 175 C 10 25 C 0 0 0 1 2 3 4 5 Rev. 0.4 0 20 40 60 80 I D [A] V GS [V] page 5 2008-04-23 IPU06N03LB IPS06N03LB 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=50 A; V GS=10 V V GS(th)=f(T j); V GS=V DS parameter: I D 12 2.5 11 10 2 9 400 A 7 98 % 1.5 V GS(th) [V] R DS(on) [m] 8 6 typ 5 40 A 1 4 3 0.5 2 1 0 0 -60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180 T j [C] T j [C] 11 Typ. Capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 10000 1000 Ciss Coss 1000 25 C 100 175 C I F [A] C [pF] 175C 98% Crss 100 10 25C 98% 10 1 0 5 10 15 20 25 30 V DS [V] Rev. 0.4 0.0 0.5 1.0 1.5 2.0 V SD [V] page 6 2008-04-23 IPU06N03LB IPS06N03LB 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 V GS=f(Q gate); I D=25 A pulsed parameter: Tj(start) parameter: V DD 100 12 15 V 10 25 C 5V 150 C 100 C 20 V V GS [V] I AV [A] 8 10 6 4 2 1 0 1 10 100 1000 0 10 20 30 40 Q gate [nC] t AV [s] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 38 V GS 36 Qg 34 V BR(DSS) [V] 32 30 28 V g s(th) 26 24 Q g(th) 22 Q sw Q gs 20 -60 -20 20 60 100 140 Q g ate Q gd 180 T j [C] Rev. 0.4 page 7 2008-04-23 IPU06N03LB IPS06N03LB PG-TO251-3: Outline Packaging: Rev. 0.4 page 8 2008-04-23 IPU06N03LB IPS06N03LB PG-TO251-3-11: Outline Packaging: Rev. 0.4 page 9 2008-04-23 IPU06N03LB IPS06N03LB Published by Infineon Technologies AG 81726 Munich, Germany (c) 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user Rev. 0.4 page 10 2008-04-23