Revised March 2002 CD40192BC * CD40193BC Synchronous 4-Bit Up/Down Decade Counter * Synchronous 4-Bit Up/Down Binary Counter General Description Features The CD40192BC and CD40193BC up/down counters are monolithic complementary MOS (CMOS) integrated circuits. The CD40192BC is a BCD counter, while the CD40193BC is a binary counter. Wide supply voltage range: Counting up and counting down is performed by two count inputs, one being held HIGH while the other is clocked. The outputs change on the positive-going transition of this clock. These counters feature preset inputs that are enabled when load is a logical "0" and a clear which forces all outputs to "0" when it is at logical "1". The counters also have carry and borrow outputs so that they can be cascaded using no external circuitry. 3V to 15V High noise immunity: 0.45 VDD (typ.) Low power TTL compatibility: or 1 driving 74LS Fan out of 2 driving 74L Carry and borrow outputs for easy expansion to N-bit by cascading Asynchronous clear Equivalent to: MM74C192 and MM74C193 All inputs are protected against damage due to static discharge by clamps to VDD and VSS. Ordering Code: Order Number Package Number Package Description CD40192BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide CD40193BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD40193BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Connection Diagram Cascading Packages Pin Assignments for DIP and SOIC Top View (c) 2002 Fairchild Semiconductor Corporation DS005988 www.fairchildsemi.com CD40192BC * CD40193BC Synchronous 4-Bit Up/Down Decade Counter * Synchronous 4-Bit Up/Down Binary Counter October 1987 CD40192BC * CD40193BC Block Diagrams CD40192BC Synchronous 4-Bit Up/Down Decade Counter CD40193BC Synchronous 4-Bit Up/Down Binary Counter www.fairchildsemi.com 2 Recommended Operating Conditions (Note 2) (Note 2) -0.5 to +18 VDC DC Supply Voltage (VDD) DC Supply Voltage (V DD) -0.5 to VDD +0.5 VDC Input Voltage (VIN) 700 mW Small Outline 500 mW Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The "Recommended Operating Conditions" and Electrical Characteristics tables provide conditions for actual device operation. Lead Temperature (TL) 260C (Soldering, 10 seconds) DC Electrical Characteristics Symbol IDD VOL VOH VIL VIH IOL IOH IIN Parameter -55C to +125C CD40192BC, CD40193BC Power Dissipation (PD) Dual-In-Line 0 to VDD VDC Operating Temperature Range (TA) -65C to +150C Storage Temperature Range (TS) 3 to 15 VDC Input Voltage (VIN) Note 2: VSS = 0V unless otherwise specified. (Note 3) -55C Conditions Min +25C Max Min Typ +125C Max Min Max Quiescent Device VDD = 5V, VIN = VDDor VSS 5 5 150 Current VDD = 10V, VIN = VDD or VSS 10 10 300 VDD = 15V, VIN = VDD or V SS 20 20 600 LOW Level VDD = 5V 0.05 0.05 0.05 Output Voltage VDD = 10V 0.05 0.05 0.05 VDD = 15V 0.05 0.05 0.05 HIGH Level VDD = 5V 4.95 4.95 Output Voltage VDD = 10V 9.95 9.95 9.95 VDD = 15V 14.95 14.95 14.95 VDD = 5V, VO = 0.5V or 4.5V 1.5 1.5 1.5 VDD = 10V, VO = 1V or 9V 3.0 3.0 3.0 VDD = 15V, VO = 1.5V or 13.5V 4.0 4.0 4.0 HIGH Level VDD = 5V, VO = 0.5V or 4.5V 3.5 3.5 Input Voltage VDD = 10V, VO = 1V or 9V 7.0 7.0 7.0 VDD = 15V, VO = 1.5V or 13.5V 11.0 11.0 11.0 LOW Level Output VDD = 5V, VO = 0.4V 0.64 0.51 0.88 Current (Note 4) VDD = 10V, VO = 0.5V 1.6 1.3 2.25 0.9 VDD = 15V, VO = 1.5V 4.2 3.4 8.8 2.4 HIGH Level Output VDD = 5V, VO = 4.6V -0.64 -0.51 -0.88 -0.36 Current (Note 4) VDD = 10V, VO = 9.5V -1.6 -1.3 -2.25 -0.9 VDD = 15V, VO = 13.5V -4.2 -3.4 -8.8 -2.4 VDD = 15V, VIN = 0V V V LOW Level VDD = 15V, V IN = 15V A 4.95 Input Voltage Input Current Units V 3.5 V 0.36 mA mA -0.1 -10-5 -0.1 -1.0 0.1 10-5 0.1 1.0 A Note 3: AC Parameters are guaranteed by DC correlated testing. Note 4: IOH and IOL are tested one output at a time. 3 www.fairchildsemi.com CD40192BC * CD40193BC Absolute Maximum Ratings(Note 1) CD40192BC * CD40193BC AC Electrical Characteristics (Note 3) TA = 25C, CL = 50 pF, RL = 200 k, input tr = tf = 20 ns, unless otherwise specified. Symbol tPHL or tPLH tPHL or tPLH tPHL or tPLH tSU tPHL tPLH or tPHL tTLH or tTHL fCL trCL or t fCL tWH, tWL tWH tWL CIN Typ Max Propagation Delay Time Parameter VDD = 5V 250 400 from Count Up or VDD = 10V 100 160 Count Down to Q VDD = 15V 80 130 Propagation Delay Time VDD = 5V 120 200 from Count Up to Carry VDD = 10V 50 80 VDD = 15V 40 65 Propagation Delay Time VDD = 5V 120 200 from Count Down VDD = 10V 50 80 to Borrow VDD = 15V 40 65 Time Prior to Load VDD = 5V 100 160 That Data Must VDD = 10V 30 50 Be Present VDD = 15V 25 40 Propagation Delay Time VDD = 5V 130 220 from Clear to Q VDD = 10V 60 100 VDD = 15V 50 80 Propagation Delay Time VDD = 5V 300 480 from Load to Q VDD = 10V 120 190 VDD = 15V 95 150 VDD = 5V 100 200 VDD = 10V 50 100 VDD = 15V 40 80 Output Transition Time Conditions Min VDD = 5V 2.5 4 VDD = 10V 6 10 VDD = 15V 7.5 12.5 Maximum Count Rise VDD = 5V 15 or Fall Time VDD = 10V 5 VDD = 15V 1 Maximum Count Frequency ns ns ns ns ns ns s VDD = 5V 120 200 Width VDD = 10V 35 80 VDD = 15V 28 65 Minimum Clear VDD = 5V 300 480 Pulse Width VDD = 10V 120 190 VDD = 15V 95 150 Minimum Load VDD = 5V 100 160 Pulse Width VDD = 10V 40 65 VDD = 15V 32 55 Load and Data 5 7.5 10 15 Inputs (A,B,C,D) Count Up, Count ns MHz Minimum Count Pulse Average Input Capacitance Units ns ns ns pF Down and Clear CPD Power Dissipation Capacity (Note 5) 100 pF Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics application note, AN-90. www.fairchildsemi.com 4 CD40192BC * CD40193BC Timing Diagrams CD40192BC Sequence: 1. Clear outputs to zero. 2. Load (preset) to BCD seven. 3. Count up to eight, nine, carry, zero, one and two. 4. Count down to one, zero, borrow, nine, eight and seven. CD40193BC Sequence: 1. Clear outputs to zero. 2. Load (preset) to binary thirteen. 3. Count up to fourteen, fifteen, carry, zero, one and two. 4. Count down to one, zero, borrow, fifteen, fourteen and thirteen. 5 www.fairchildsemi.com CD40192BC * CD40193BC Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A www.fairchildsemi.com 6 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com CD40192BC * CD40193BC Synchronous 4-Bit Up/Down Decade Counter * Synchronous 4-Bit Up/Down Binary Counter Physical Dimensions inches (millimeters) unless otherwise noted (Continued)