1
Precision Edge®
SY89875U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
DESCRIPTION
Integrated programmable clock divider and 1:2
fanout buffer
Guaranteed AC performance over temperature and
voltage:
> 2.0GHz fMAX
< 200ps tr/tf
< 15ps within device skew
Low jitter design:
< 10psPP total jitter
< 1psRMS cycle-to-cycle jitter
Unique input termination and VT Pin for DC-coupled
and AC-coupled Inputs; CML, PECL, LVDS and
HSTL
LVDS compatible outputs
TTL/CMOS inputs for select and reset
Parallel programming capability
Programmable divider ratios of 1, 2, 4, 8 and 16
Low voltage operation 2.5V
Output disable function
–40°C to 85°C temperature range
Available in 16-pin (3mm x 3mm) MLF® package
FEATURES
2.5V, 2.0GHz ANY DIFF. IN-TO-LVDS
PROGRAMMABLE CLOCK DIVIDER AND 1:2
FANOUT BUFFER W/ INTERNAL TERMINATION
Precision Edge®
SY89875U
APPLICATIONS
SONET/SDH line cards
Transponders
High-end, multiprocessor servers
Rev.: D Amendment: /0
Issue Date: August 2007
This low-skew, low-jitter device is capable of accepting a
high-speed (e.g., 622MHz or higher) CML, LVPECL, LVDS
or HSTL clock input signal and dividing down the frequency
using a programmable divider to create a lower speed
version of the input clock. Available divider ratios are 2, 4, 8
and 16, or straight pass-through.
The differential input buffer has a unique internal
termination design that allows access to the termination
network through a VT pin. This feature allows the device to
easily interface to different logic standards. A VREF-AC
reference is included for AC-coupled applications.
The /RESET input asynchronously resets the divider. In
the pass-through function (divide by 1) the /RESET
synchronously enables or disables the outputs on the next
falling edge of IN (rising edge of /IN).
FUNCTIONAL BLOCK DIAGRAM
TYPICAL PERFORMANCE
Precision Edge is a registered trademark of Micrel, Inc.
MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc.
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Divide-by-4
C
ML/LVPECL/LVDS
622MHz
Clock In
OC-12 to OC-3
Translator/Divider
LVDS
155.5MH
z
Clock Ou
t
622MHz In
/
Q0
Q0
/IN
IN
155.5MHz Out
2
Precision Edge®
SY89875U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
PACKAGE/ORDERING INFORMATION
Pin Number Pin Name Pin Function
12, 9 IN, /IN Differential Input: Internal 50ý termination resistors to VT input. Flexible input accepts any
differential input. See “Input Interface Applications” section.
1, 2, 3, 4 Q0, /Q0 Differential Buffered LVDS Outputs: Divided by 1, 2, 4, 8 or 16. See “Truth Table.”
Q1, /Q1 Unused output pairs must be terminated with 100ý across the different pair.
16, 15, 5 S0, S1, S2 Select Pins: See “Truth Table.” LVTTL/CMOS logic levels. Internal 25ký pull-up resistor.
Logic HIGH if left unconnected (divided by 16 mode.) Input threshold is VCC/2.
6 NC No Connect.
8 /RESET, LVTTL/CMOS Logic Levels: Internal 25ký pull-up resistor. Logic HIGH if left unconnected.
/DISABLE Apply LOW to reset the divider (divided by 2, 4, 8 or 16 mode). Also acts as a disable/enable
function. The reset and disable function occurs on the next high-to-low clock input transition.
Input threshold is VCC/2.
10 VREF-AC Reference Voltage: Equal to VCC–1.4V (approx.). Used for AC-coupled applications only.
Decouple the VREF–AC pin with a 0.01µF capacitor. See “Input Interface Applications” section.
11 VT Termination Center-Tap: For CML or LVDS inputs, leave this pin floating. Otherwise, See
Figures 4a to 4f, “Input Interface Applications” section.
7, 14 VCC Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitor.
13 GND Ground. Exposed pad must be connected to the same potential as the GND pin.
Exposed
PIN DESCRIPTION
13141516
12
11
10
9
1
2
3
4
8765
Q0
/
Q0
Q1
/
Q1
IN
VT
VREF-A
C
/IN
S0
S1
VC
C
GN
D
S2
NC
VCC
/
RESET
16-Pin MLF® (MLF-16)
/RESET(1) S2 S1 S0 Outputs
1 0 X X Reference Clock (pass through)
1 1 0 0 Reference Clock ÷2
1 1 0 1 Reference Clock ÷4
1 1 1 0 Reference Clock ÷8
1 1 1 1 Reference Clock ÷16
0(1) X X X Q = LOW, /Q = HIGH
Clock Disable
Note 1. Reset/Disable function is asserted on the next clock input
(IN, /IN) high-to-low transition.
TRUTH TABLE
Ordering Information(1)
Package Operating Package Lead
Part Number Type Range Marking Finish
SY89875UMI MLF-16 Industrial 875U Sn-Pb
SY89875UMITR(2) MLF-16 Industrial 875U Sn-Pb
SY89875UMG(3) MLF-16 Industrial 875U with NiPdAu
Pb-Free bar line indicator Pb-Free
SY89875UMGTR(2, 3) MLF-16 Industrial 875U with NiPdAu
Pb-Free bar line indicator Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package is recommended for new designs.
3
Precision Edge®
SY89875U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
Note 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is
not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng
conditions for extended periods may affect device reliability.
Note 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
Note 3. Due to the limited drive capability use for input of the same package only.
Note 4. Junction-to-board resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the pcb.
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC)...................................–0.5V to +4.0V
Input Voltage (VIN) ...................................–0.5V to VCC+0.3
ECL Output Current (IOUT)
Continuous ..........................................................50mA
Surge.................................................................100mA
Input Current IN, /IN (IIN) ......................................... ±50mA
VT Current (IVT)...................................................... ±100mA
VREF-AC Sink/Source Current (IVREF-AC), Note 3 ...... ±2mA
Lead Temperature (soldering 20 sec.) ...................... 260°C
Storage Temperature (TS) ........................–65°C to +150°C
Operating Ratings(Note 2)
Supply Voltage (VCC)......................................... +2.5V ±5%
Ambient Temperature (TA) .........................–40°C to +85°C
Package Thermal Resistance
MLF® JA)
Still-Air............................................................. 60°C/W
500lfpm ........................................................... 54°C/W
MLF® JB), Note 4
Junction-to-Board............................................ 32°C/W
TA= –40°C to +85°C; Unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VCC Power Supply 2.375 2.625 V
ICC Power Supply Current No load, max. VCC 70 95 mA
RIN Differential Input Resistance 90 100 110 ý
(IN-to-/IN)
VIH Input High Voltage (IN, /IN) Note 3 0.1 VCC+0.3 V
VIL Input Low Voltage (IN, /IN) Note 3 –0.3 VIH–0.1 V
VIN Input Voltage Swing Note 4 0.1 VCC V
VDIFF_IN Differential Input Voltage Swing Note 5 0.2 V
|IIN| Input Current (IN, /IN) Note 3 ––45mA
VREF–AC Reference Voltage Note 6 VCC–1.525 VCC–1.425 VCC–1.325 V
Note 1. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Note 2. Specification for packaged product only.
Note 3. Due to the internal termination (see Figure 2a) the input current depends on the applied voltages at IN, /IN and VT inputs. Do not apply a combination
of voltages that causes the input current to exceed the maximum limit!
Note 4. See “Timing Diagram” for VIN definition. VIN (Max) is specified when VT is floating.
Note 5. See “Typical Operating Characteristics” section for VDIFF definition.
Note 6. Operating using VIN is limited to AC-coupled PECL or CML applications only. Connect directly to VT pin.
DC ELECTRICAL CHARACTERISTICS(Notes 1, 2)
4
Precision Edge®
SY89875U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
VCC = 2.5V ±5%; TA = –40°C to +85°C; Unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VIH Input HIGH Voltage 2.0 V
VIL Input LOW Voltage 0.8 V
IIH Input HIGH Current –125 20 µA
IIL Input LOW Current –300 µA
Note 1. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Note 2. Specification for packaged product only.
LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS(Notes 1, 2)
VCC = 2.5V ±5%; TA = –40°C to +85°C; Unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VOUT Output Voltage Swing Note 3, 4 250 350 400 mV
VOH Output High Voltage Note 3 1.475 V
VOL Output Low Voltage Note 3 0.925 V
VOCM Output Common Mode Voltage Note 4 1.125 1.375 V
VOCM Change in Common Mode Voltage –50 50 mV
Note 1. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Note 2. Specification for packaged product only.
Note 3. Measured as per Figure 2a, 100ý across Q and /Q outputs.
Note 4. Measured as per Figure 2b.
LVDS DC ELECTRICAL CHARACTERISTICS(Notes 1, 2)
5
Precision Edge®
SY89875U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
VCC = 2.5V ±5%; TA = –40°C to +85°C; Unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
fMAX Maximum Input Frequency Output Swing ž 200mV 2.0 2.5 GHz
tPD Differential Propagation Delay Input Swing < 400mV 590 690 870 ps
IN to Q Input Swing ž 400mV 540 690 820 ps
tSKEW Within-Device Skew (diff.) Note 3 515 ps
Part-to-Part Skew (diff.) Note 3 280 ps
tRR Reset Recovery Time Note 4 600 ps
tJITTER Cycle-to-Cycle Jitter Note 5 1ps
RMS
Total Jitter Note 6 10 psPP
tr,tfRise/Fall Time (20% to 80%) 70 120 200 ps
Note 1. Measured with 400mV input signal, 50% duty cycle, all outputs loaded with 100ý across each output pair, unless otherwise stated.
Note 2. Specification for packaged product only.
Note 3. Skew is measured between outputs under identical transitions.
Note 4. See “Timing Diagram.”
Note 5. Cycle-to-cycle jitter definition: the variation in period between adjacent cycles over a random sample of adjacent cycle pairs. Tjitter_cc =T
n–Tn+1,
where T is the time between rising edges of the output signal.
Note 6. Total jitter definition: with an ideal clock input of frequency - fMAX, no more than one output edge in 1012 output edges will deviate by more than
the specified peak-to-peak jitter value.
AC ELECTRICAL CHARACTERISTICS(Notes 1, 2)
TIMING DIAGRAM
V
ID
/
RESET
IN
/IN
/Q
Q
t
PD
t
RR
V
CC/2
V
IN
Swing
V
OUT
Swin
g
6
Precision Edge®
SY89875U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
TYPICAL OPERATING CHARACTERISTICS
VCC = 2.5V, TA = 25°C, unless otherwise stated.
0
50
100
150
200
250
300
350
0 500 1000 1500 2000 2500 3000 3500
AMPLITUDE (mV)
FREQUENCY (MHz)
Output Amplitude
vs. Frequency
500
550
600
650
700
750
800
0 200 400 600 800 1000
PROPAGATION DELAY (ps)
INPUT SWING (mV)
IN to Q Propagation Delay
vs. Input Swing
500
550
600
650
700
750
800
-60 -40 -20 0 20 40 60 80 100
PROPAGATION DELAY (ps)
TEMPERATURE (°C)
IN to Q Propagation Delay
vs. Temperature
40
45
50
55
60
0 500 1000 1500 2000 2500 3000
OUTPUT DUTY CYCLE (mV)
FREQUENCY (MHz)
Output Duty Cycle
vs. Frequency
7
Precision Edge®
SY89875U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
V
IN,
V
OU
T
350mV
(typica
l)
Figure 1a. Single-Ended Swing
700mV (typical)
V
DIFF_IN
,
V
DIFF_OU
T
Figure 1b. Differential Swing
TYPICAL OPERATING CHARACTERISTICS (Continued)
VCC = 2.5V, TA = 25°C, unless otherwise stated.
622MHz Output
TIME (300ps/div.)
Output Swing
(50mV/div.)
1.25GHz Output
TIME (140ps/div.)
Output Swing
(50mV/div.)
2.5GHz Output
TIME (80ps/div.)
Output Swing
(50mV/div.)
DEFINITION OF SINGLE-ENDED AND DIFFERENTIAL SWINGS
8
Precision Edge®
SY89875U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
INPUT INTERFACE APPLICATIONS
VCC
GND
50
50
IN
VT
/
IN
1.86
k
1.86
k
1.86k
1.86k
Figure 2a. Simplified Differential Input Buffer
V
CC
GND
S0
S1
S2
/RESET
R25k
R
Figure 2b. Simplified TTL/CMOS Input Buffer
LVDS OUTPUTS
LVDS (Low Voltage Differential Swing) specifies a small
swing of 350mV typical, on a nominal 1.25V common mode
above ground. The common mode voltage has tight limits
100
GND
vOD
vOH, vOL vOH, vOL
Figure 3a. LVDS Differential Measurement
50
GND
vOCM,
vOCM
50
Figure 3b. LVDS Common Mode Measurement
to permit large variations in ground between an LVDS driver
and receiver. Also, change in common mode voltage, as a
function of data input, is also kept tight, to keep EMI low.
9
Precision Edge®
SY89875U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
INPUT INTERFACE APPLICATIONS
CML IN
/IN
VT
NC
ND
SY89875
VCC VCC
VREF_AC
NC
Figure 4a. DC-Coupled CML
Input Interface
CML
IN
/IN
V
T
GND
5;&'&%#7
V
CC
V
CC
V
REF_AC
V
CC
0.01µF
Figure 4b. AC-Coupled CML
Input Interface
PECL
IN
/IN
VT
GND
SY89875U
VCC
VCC –2V
VCC
VREF_AC
NC
0.01µF
39
VCC
Figure 4c. DC-Coupled PECL
Input Interface
PECL
IN
/IN
V
T
GND
5;&'&%#7
V
CC
50
9
V
CC
GND V
REF_AC
V
CC
0.01µF
50
9
Figure 4d. AC-Coupled CML
Input Interface
LVDS
IN
/IN
V
T
NC
GND
5;&'&%#7
V
CC
V
CC
V
REF_AC
NC
Figure 4e. LVDS
Input Interface
HSTL
IN
/IN
V
T
GND
5;&'&%#7
V
CC
V
CC
GND
NC V
REF_AC
Figure 4f. HSTL
Input Interface
Part Number Function Data Sheet Link
SY89872U 2.5V, 2.5GHz Any Diff. In-to-LVDS http://www.micrel.com/product-info/products/sy89872u.shtml
Programmable Clock Divider/Fanout Buffer
w/ Internal Termination
MLF® Application Note http://www.amkor.com/products/notes_papers/mlf_appnote_0902.pdf
HBW Solutions New Products and Applications http://www.micrel.com/product-info/products/solutions.shtml
RELATED PRODUCT AND SUPPORT DOCUMENTATION
10
Precision Edge®
SY89875U
Micrel, Inc.
M9999-082407
hbwhelp@micrel.com or (408) 955-1690
Package
EP- Exposed Pa
d
Die
CompSide Island
Heat Dissipation
Heavy Copper Plane
Heavy Copper Plane
V
EE
V
EE
Heat Dissipation
PCB Thermal Consideration for 16-Pin MLF® Package
(Always solder, or equivalent, the exposed pad to the PCB)
16-PIN MicroLeadFrame® (MLF-16)
Package Notes:
Note 1. Package meets Level 2 moisture sensitivity classification, and are shipped in dry-pack form.
Note 2. Exposed pads must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.