MP7720
20W Class D Mono
Single Ended Audio Amplifer
12/04, Rev. 1.6 www.MonolithicPower.com 1
Monolithic Power Systems
DESCRIPTION
The MP7720 is a mono 20W Class D Audio
Amplifier. It is one of MPS’ second generation
of fully integrated audio amplifiers which
dramatically reduces solution size by integrating
the following:
180m power MOSFETs
Startup / Shutdown pop elimination
Short circuit protection circuits
Mute / Standby
The MP7720 utilizes a single ended output
structure capable of delivering 20W into 4
speakers. MPS Class D Audio Amplifiers exhibit
the high fidelity of a Class A/B amplifier at
efficiencies greater than 90%. The circuit is
based on the MPS’ proprietary variable
frequency topology that delivers excellent
PSRR, fast response time and operates on a
single power supply.
EVALUATION BOARD REFERENCE
Board Number Dimensions
EV0030 2.4”X x 3.5”Y x 1.2”Z
FEATURES
20W Output at VDD = 24V into a 4 load
THD+N = 0.04% at 1W, 8
93% Efficiency at 20W
Low Noise (190µV Typical)
Switching Frequency Up to 1MHz
9.5V to 24V Operation from a Single Supply
Integrated Startup and Shutdown Pop
Elimination Circuit
Thermal Protection
Integrated 180m Switches
Mute/Standby Modes (Sleep)
Available in Tiny 8-Pin SOIC and PDIP Packages
APPLICATIONS
Surround Sound DVD Systems
Televisions
Flat Panel Monitors
Multimedia Computers
Home Stereo Systems
, “MPS”, “Monolithic Power Systems”, and “The Future of Analog IC
Technology” are Registered Trademarks of Monolithic Power Systems, Inc.
AAM (Analog Adaptive Modulation) is a Trademark of Monolithic Power
Systems, Inc.
TYPICAL APPLICATION
+
AUDIO
INPUT
OFF ON
V
DD
MP7720
SW
BS
PGND
VDD
PIN
EN
NIN
AGND
MP7720_TAC_S01
20
10
1
0.1
0.01
THD+N (%)
0.1 1 10 30
POWER (W)
MP7720-TPC01
THD+N vs
Power (24V, 1KHz)
MP7720 – 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
12/04, Rev. 1.6 www.MonolithicPower.com 2
PACKAGE REFERENCE
PIN
NIN
AGND
EN
PGND
SW
VDD
BS
1
2
3
4
8
7
6
5
TOP VIEW
MP7720_PD01-SOIC8-PDIP8
Part Number* Package Temperature
MP7720DS SOIC8
–40°C to +85°C
MP7720DP PDIP8
–40°C to +85°C
* For Tape & Reel, add suffix –Z (eg. MP7720DS–Z)
For Lead Free, add suffix –LF (eg. MP7720DS–LF–Z)
ABSOLUTE MAXIMUM RATINGS (1)
Supply Voltage VDD...................................... 26V
BS Voltage.................. VSW 0.3V to VSW + 6.5V
Enable Voltage VEN........................ –0.3V to +6V
VSW, VPIN, VNIN ........................... –1V to VDD + 1V
AGND to PGND.......................... –0.3V to +0.3V
Junction Temperature............................... 150°C
Lead Temperature ....................................260°C
Storage Temperature ..............–65°C to +150°C
Recommended Operating Conditions (2)
Supply Voltage VDD.......................... 9.5V to 24V
Operating Temperature TA.........–40°C to +85°C
Thermal Resistance (3) θJA θJC
SOIC8.................................... 105 ..... 50... °C/W
PDIP8 ..................................... 95 ...... 55... °C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The device is not guaranteed to function outside of its
operating conditions.
3) Measured on approximately 1” square of 1 oz copper.
ELECTRICAL CHARACTERISTICS
VDD = 24V, VEN = 5V, TA = 25°C, unless otherwise noted.
Parameters Symbol Condition Min Typ Max Units
Supply Current
Standby Current VEN = 0V 1 5 µA
Quiescent Current 1.5 3.0 mA
Output Drivers
SW On Resistance Sourcing and Sinking 0.18
Short Circuit Current Sourcing and Sinking 5.0 A
Inputs
PIN, NIN Input Common Mode
Voltage Range 0 VDD
2 VDD - 1.5 V
PIN, NIN Input Current VPIN = VNIN = 12V 1 5 µA
V
EN Rising 1.4 2.0 V
EN Enable Threshold Voltage V
EN Falling 0.4 1.2 V
EN Enable Input Current V
EN = 5V 1 µA
Thermal Shutdown
Thermal Shutdown Trip Point TJ Rising 150 °C
Thermal Shutdown Hysteresis 30 °C
MP7720 – 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
12/04, Rev. 1.6 www.MonolithicPower.com 3
OPERATING SPECIFICATIONS
Circuit of Figure 1, VDD = 24V, VEN = 5V, TA = 25°C, unless otherwise noted.
Parameters Symbol Condition Min Typ Max Units
Standby Current VEN = 0V 130 µA
Quiescent Current 13 mA
f = 1KHz, THD+N = 10%,
4 Load 20 W
Power Output
f = 1KHz, THD+N = 10%,
8 Load 10 W
POUT = 1W, f = 1KHz, 4
Load 0.08 %
THD+ Noise
POUT = 1W, f = 1KHz, 8
Load 0.04 %
f = 1KHz, POUT = 1W, 4
Load 90 %
Efficiency
f = 1KHz, POUT = 1W, 8
Load 95 %
Maximum Power Bandwidth 20 KHz
Dynamic Range 93 dB
Noise Floor A-Weighted 190 µV
Power Supply Rejection f = 1KHz 60 dB
PIN FUNCTIONS
Pin # Name Description
1 PIN
Amplifier Positive Input. PIN is the positive side of the differential input to the amplifier. Use a
resistive voltage divider to set the voltage at PIN to VDD/2. See Figure 1.
2 NIN
Amplifier Negative Input. NIN is the negative side of the differential input to the amplifier. Drive
the input signal and close the feedback loop at NIN. See Figure 1.
3 AGND Analog Ground. Connect AGND to PGND at a single point.
4 EN Enable Input. Drive EN high to turn on the amplifier, low to turn it off.
5 BS
High-Side MOSFET Bootstrap Input. A capacitor from BS to SW supplies the gate drive
current to the internal high-side MOSFET. Connect a 0.1µF capacitor from SW to BS. Place a
6.2V zener diode from BS to SW to prevent overstressing of the internal circuitry.
6 VDD
Power Supply Input. VDD is the drain of the high-side MOSFET switch, and supplies the
power to the output stage and the MP7720 internal control circuitry. In addition to the main
bulk capacitor, bypass VDD to PGND with a 1µF X7R capacitor placed close to pins 6 and 8.
7 SW
Switched Power Output. SW is the output of the MP7720. Connect the LC filter between SW
and the output coupling capacitor. See Figure 1.
8 PGND Power Ground. Connect PGND to AGND at a single point.
MP7720 – 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
12/04, Rev. 1.6 www.MonolithicPower.com 4
TYPICAL PERFORMANCE CHARACTERISTICS
25
20
15
10
5
0
POUT (W)
5 101520253035
VDD (V)
MP7720-TPC10
P
OUT
vs
V
DD
100
90
80
70
60
50
40
30
20
10
0
EFFICIENCY (%)
0 5 10 15 20 25 30
OUTPUT POWER (W)
MP7720-TPC09
Efficiency vs
P
OUT
+4
+2
0
-2
-4
-6
-8
-10
AMPLITUDE (dBr)
20 10K 40K1K100
FREQUENCY (Hz)
MP7720-TPC08
Frequency Response
(Ref=2Vrms, A
V
=8.2)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
AMPLITUDE (dBr)
100 1K 10K
FREQUENCY (Hz)
MP7720-TPC07
0
-20
-40
-60
-80
-100
-120
-140
AMPLITUDE (dBV)
20 100 1K 10K
FREQUENCY (Hz)
MP7720-TPC06
THD+N (%)
FREQUENCY (Hz)
MP7720-TPC05
100
10
1
0.1
0.01
THD+N (%)
20 100 1K 10K
FREQUENCY (Hz)
MP7720-TPC04
THD+N (%)
POUT (W)
MP7720-TPC03
20
10
1
0.1
0.01
20
10
1
0.1
0.01
THD+N (%)
0.1 1 10 30 0.1 1 10 30
POUT (W)
MP7720-TPC02
f=1KHz
f=10KHz f=10KHz
f=100Hz f=100Hz
f=1KHz
100
10
1
0.1
0.01
20 100 1K 10K
MP7720 – 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
12/04, Rev. 1.6 www.MonolithicPower.com 5
OPERATION
The MP7720 is a single-ended Class D audio
amplifier. It uses the Monolithic Power Systems
patented Analog Adaptive ModulationTM to
convert the audio input signal into pulses.
These pulses drive an internal high-current
output stage and, when filtered through an
external inductor-capacitor filter, reproduce the
input signal across the load. Because of the
switching Class D output stage, power
dissipation in the amplifier is drastically reduced
when compared to Class A, B or A/B amplifiers
while maintaining high fidelity and low
distortion.
The amplifier uses a differential input to the
modulator. PIN is the positive input and NIN is
the negative input. The common mode voltage
of the input is set to half the DC power supply
input voltage (VDD/2) through the resistive
voltage divider formed by R2 and R3. The input
capacitor C1 couples the AC signal at the input.
The amplifier voltage gain is set by the
combination of R1 and R4 and is calculated by
the equation:
1R
4R
AV
=
The output driver stage uses two 180m
N-Channel MOSFETs to deliver the pulses to
the LC output filter which in turn drives the load.
To fully enhance the high-side MOSFET, the
gate is driven to a voltage higher than the
source by the bootstrap capacitor between SW
and BS. While the output is driven low, the
bootstrap capacitor is charged from VDD through
an internal circuit on the MP7720. The gate of
the high-side MOSFET is driven high from the
voltage at BS, forcing the MOSFET gate to a
voltage higher than VDD and allowing the
MOSFET to fully turn on, reducing power loss in
the amplifier.
Pop Elimination
The capacitor C9 passes only AC currents to
the load. To insure that the amplifier passes low
frequency signals, the time constant of
C9*RLOAD needs to be long. However, when EN
is asserted, the capacitor charges over a long
period and in a normal amplifier can result in a
turn on and/or turn off “pop.” The MP7720
includes integrated circuitry that eliminates the
turn on and turn off pop associated with the
charging of the AC coupling capacitor.
Short Circuit/Overload Protection
The MP7720 has internal overload and short
circuit protection. The currents in both the high-
side and low-side MOSFETs are measured and
if the current exceeds the 5.0A short circuit
current limit, both MOSFETs are turned off. The
MP7720 then restarts with the same power up
sequence that is used for normal starting to
prevent a pop from occurring after a short
circuit condition is removed.
Mute/Enable Function
The MP7720 EN input is an active high enable
control. To enable the MP7720, drive EN with a
2.0V or greater voltage. To disable the
amplifier, drive it below 0.4V. While the MP7720
is disabled, the VDD operating current is less
than 5µA and the output driver MOSFETs are
turned off. The MP7720 requires approximately
500ms from the time that EN is asserted (driven
high) to when the amplifier begins normal
operation.
MP7720 – 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
12/04, Rev. 1.6 www.MonolithicPower.com 6
APPLICATION INFORMATION
COMPONENT SELECTION
The MP7720 uses a minimum number of
external components to complete a Class D
audio amplifier. The circuit of Figure 1 is
optimized for a 24V power supply and a 1.5V
RMS maximum input signal. This circuit should
be suitable for most applications. However, if
this circuit is not suitable, use the following
sections to determine how to customize the
amplifier for a particular application.
Setting the Voltage Gain
The maximum output voltage swing is limited by
the power supply. To achieve the maximum
power out of the MP7720 amplifier, set the gain
such that the maximum input signal results in
the maximum output voltage swing.
The maximum output voltage swing is ±VDD/2.
For a given input signal voltage, where VIN(pk)
is the peak input voltage, the maximum voltage
gain is:
)pk(V2
V
)MAX(A
IN
DD
V×
=
This voltage gain setting results in the peak
output voltage approaching it’s maximum for
the maximum input signal. In some cases the
amplifier is allowed to overdrive slightly,
allowing the THD to increase at high power
levels, and so a higher gain than AV (max) is
required.
Setting the Switching Frequency
The idle switching frequency is a function of
VDD, the capacitor C3 and the feedback resistor
R4. Lower switching frequencies result in more
inductor ripple, causing more quiescent output
voltage ripple and increasing the output noise
and distortion. Higher switching frequencies
result in more power loss. The optimum
quiescent switching frequency is approximately
600KHz to 700KHz. Refer to the Operating
Specifications for recommended values.
Table 4: Switching Frequency vs. Integrating
Capacitor and Feedback Resistor (see Figure 1)
Gain
(V/V)
Gain
(dB)
R4
()
R1
() C3 F
SW VDD
(V)
3.9 15.0 39k 10k 6.8nF 660KHz 12
8.2 18.3 82k 10k 3.3nF 660KHz 12
8.3 21.5 39k 4.7k 6.8nF 660KHz 12
12.0 21.6 120k 10k 2.2nF 610KHz 12
17.4 24.8 82k 4.7k 3.3nF 660KHz 12
25.5 28.1 120k 4.7k 2.2nF 610KHz 12
5.6 15.0 56k 10k 8.2nF 670KHz 24
8.2 18.3 82k 10k 5.6nF 720KHz 24
11.9 21.5 56k 4.7k 8.2nF 670KHz 24
12.0 21.6 120k 10k 4.7nF 620KHz 24
17.4 24.8 82k 4.7k 5.6nF 720KHz 24
25.5 28.1 120k 4.7k 4.7nF 620KHz 24
33.0 30.4 330k 10k 1.8nF 700KHz 24
Choosing the LC Filter
The Inductor-Capacitor (LC) filter converts the
pulse train at SW to the output voltage that
drives the speaker. Typical values for the LC
filter are shown in Figure 1, 10µH inductor and
0.47µF capacitor.
The characteristic frequency of the LC filter
needs to be high enough to allow high
frequency audio to the output, yet needs to be
low enough to filter out high frequency products
of the pulses from SW. The characteristic
frequency of the LC filter is:
()
2
1
0
LC2
1
f
π
=
The voltage ripple at the output is approximated
by the equation:
×
SW
0
DDRIPPLE f
f
VV
MP7720 – 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
12/04, Rev. 1.6 www.MonolithicPower.com 7
The quality factor (Q) of the LC filter is
important. If this is too low, output noise will
increase, if this is too high, then peaking may
occur at high signal frequencies reducing the
passband flatness. The circuit Q is set by the
load resistance (speaker resistance, typically
4 or 8). The Q is calculated as:
R
L
f2
R
L
Q00 ××π=×ω=
ω0 is the characteristic frequency in radians per
second and f0 is in Hz. Use an LC filter with Q
between 0.7 and 1
The actual output ripple and noise is greatly
affected by the type of inductor and capacitor
used in the LC filter. Use a film capacitor and
an inductor with sufficient power handling
capability to supply the output current to the
load. The inductor should exhibit soft saturation
characteristics. If the inductor exhibits hard
saturation, it should operate well below the
saturation current. Gapped ferrite, MPP,
Powdered Iron, or similar type toroidal cores
are recommended. If open or shielded bobbin
ferrite cores are used for multi-channel designs,
make sure that the start windings of each
inductor line up (all starts going toward SW pin,
or all starts going toward the output) to prevent
crosstalk or other channel-to-channel
interference.
Output Coupling Capacitor
The output AC coupling capacitor C9 serves to
block DC voltages and thus passes only the
amplified AC signal from the LC filter to the
load. The combination of the coupling capacitor,
C9 and the load resistance results in a first-
order high-pass filter. The value of C9 should
be selected such that the required minimum
frequency is still allowed to pass. The output
corner frequency (-3dB point), fOUT, can be
calculated as:
9CR2
1
f
LOAD
OUT ××π×
=
Set the output corner frequency (fOUT) at or
below the minimum required frequency.
The output coupling capacitor carries the full
load current, so a capacitor should be chosen
such that its ripple current rating is greater than
the maximum load current. Low ESR aluminum
electrolytic capacitors are recommended.
Input Coupling Capacitor
The input coupling capacitor C1 is used to pass
only the AC signal at the input. In a typical
system application, the source input signal is
typically centered around the circuit ground,
while the MP7720 input is at half the power
supply voltage (VDD/2). The input coupling
capacitor transmits the AC signal from the
source to the MP7720 while blocking the DC
voltage. Choose an input coupling capacitor
such that the corner frequency (fIN) is less than
the passband frequency. The corner frequency
is calculated as:
1C1R2
1
fIN ××π×
=
Power Source
For maximum output power, the amplifier circuit
requires a regulated external power source to
supply the power to the amplifier. The higher
the power supply voltage, the more power can
be delivered to a given load resistance,
however if the power source voltage exceeds
the maximum operating voltage of 24V, the
MP7720 may sustain damage. The power
supply rejection of the MP7720 is excellent
(typically 60dB), however noise at the power
supply can get to the output, so care must be
taken to minimize power supply noise within the
pass-band frequencies. Bypass the power
supply with a large capacitor (typically
aluminum electrolytic) along with a smaller 1µF
ceramic capacitor at the MP7720 VDD supply
pins.
Circuit Layout
The circuit layout is critical for optimum
performance and low output distortion and
noise. Place the following components as close
to the MP7720 as possible:
Power Supply Bypass, C5
C5 carries the transient current for the switching
input stage. To prevent overstressing of the
MP7720 and excessive noise at the output,
place the power supply bypass capacitor as
close to pins 6 (VDD) and 8 (PGND) as
possible.
MP7720 – 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
12/04, Rev. 1.6 www.MonolithicPower.com 8
Output Catch Diode, D1
D1 carries the current over the dead-time while
both MOSFET switches are off. Place D1
between pins 7 (SW) and 8 (PGND) to prevent
the voltage at SW from swinging excessively
below ground.
Input Modulator Capacitor, C3
C3 is used to set the amplifier switching
frequency and is typically on the order of a few
nanofarads. Place C3 as close to the differential
input pins (1 and 2) as possible to reduce
distortion and noise.
Reference Bypass Capacitor, C2
C2 filters the ½ VDD reference voltage at the
PIN input (pin 1). Place C2 as close to PIN as
possible to improve power supply rejection and
reduce distortion and noise at the output.
Use two separate ground planes, analog
ground (AGND) and power ground (PGND),
and connect the two grounds together at a
single point to prevent noise injection into the
amplifier input to reduce distortion. Power
components (C5, D1, C6 and C8) connect to
the power ground. The quiet analog
components (C2, C3, R2, and the input source
ground) connect to the analog ground.
Place the input and feedback resistors R1 and
R4 as close to the NIN input as possible. Make
sure that any traces carrying the switching node
(SW) voltage are separated far from any input
signal traces. If multiple amplifiers are used on
a single board, make sure that each channel is
physically separated to prevent crosstalk. If it is
required to run the SW trace near the input,
shield the input with a ground plane between
the traces. Make sure that all inductors used on
a single circuit board have the same orientation.
If multiple channels are used on a single board,
make sure that the power supply is routed from
the source to each channel individually, not
serially. This prevents channel-to-channel
coupling through the power supply input.
Electro-Magnetic Interference (EMI)
Considerations
Due to the switching nature of the Class D
amplifier, care must be taken to minimize the
effects of electromagnetic interference from the
amplifier. However, with proper component
selection and careful attention to circuit layout,
the effects of the EMI due to the amplifier
switching can be minimized.
The power inductors are a potential source of
radiated emissions. For the best EMI
performance, use toroidal inductors, since the
magnetic field is well contained inside the core.
However toroidal inductors can be expensive to
wind. For a more economical solution, use
shielded gapped ferrite or shielded ferrite
bobbin core inductors. These inductors typically
do not contain the field as well toroidal
inductors, but usually can achieve a better
balance of good EMI performance with low
cost.
The size of high-current loops that carry rapidly
changing currents needs to be minimized. To
do this, make sure that the VDD bypass
capacitor (C5) is as close to the MP7720 as
possible.
Nodes that carry rapidly changing voltage, such
as SW, need to be made as small as possible.
If sensitive traces run near a trace connected to
SW, place a ground shield between the traces.
MP7720 – 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
12/04, Rev. 1.6 www.MonolithicPower.com 9
TYPICAL APPLICATION CIRCUIT
+
AUDIO
INPUT
OFF ON
VDD
9.5V to 24V
MP7720
SW
BS
PGND
VDD
PIN
EN
NIN
AGND
MP7720_F01
+
C10
390pF
D2
6.2V
D1
1A
30V
C4
10pF
C3
5.6nF
Figure 1—20W Mono Typical Application Circuit
MP7720 – 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
NOTICE: MPS believes the information in this document to be accurate and reliable. However, it is subject to change without
notice. Contact MPS for current specifications. MPS encourages users of its products to ensure that third party Intellectual
Property rights are not infringed upon when integrating MPS products into any application. MPS cannot assume any legal
responsibility for any said applications.
MP7720 Rev. 1.6 Monolithic Power Systems, Inc. 10
12/29/04 983 University Avenue, Building A, Los Gatos, CA 95032 USA
© 2004 MPS, Inc. Tel: 408-357-6600 Fax: 408-357-6601 www.MonolithicPower.com
PACKAGE INFORMATION
SOIC8
NOTE:
1) Control dimension is in inches. Dimension in bracket is millimeters.
0.016(0.410)
0.050(1.270)
0o-8o
DETAIL "A"
0.011(0.280)
0.020(0.508) x 45
o
SEE DETAIL "A"
0.0075(0.191)
0.0098(0.249)
0.229(5.820)
0.244(6.200)
SEATING PLANE
0.001(0.030)
0.004(0.101)
0.189(4.800)
0.197(5.004)
0.053(1.350)
0.068(1.730) 0.049(1.250)
0.060(1.524)
0.150(3.810)
0.157(4.000)
PIN 1 IDENT.
0.050(1.270)BSC
0.013(0.330)
0.020(0.508)
PDIP8